Total Harmonic Distortion Input Research Articles

On the distortion analysis of electronic analog multipliers

This work presents a comparison between three distinct criteria for evaluating distortion of analog multipliers: the two-dimensional integral nonlinear function and the double input total harmonic distortion, both proposed by us, and the conventional single input total harmonic distortion. A methodology is proposed to experimentally determine these figures of merit using DC characterization. Intending to fit a two-variable polynomial to the multiplier DC transfer surface, distortion coefficients are obtained which can be used to assess the total harmonic distortions. Four different topologies of analog multipliers in CMOS technology have been characterized, by simulation or measurement, and the results demonstrate that DC analysis provides meaningful and reliable distortion figures of merit. An experimental analysis over three additional analog multipliers of commercial integrated circuits using DC characterization is also accomplished.

Исследование влияния параметров системы управления на качество входного тока трехфазного корректора мощности

The paper suggests a control system of a three-phase power factor corrector. The study of the control system operation is carried out and the expressions for calculating the permissible values of error amplifier factors are obtained. The influence of the error amplifier parameters on phase current quality is investigated. The dependence of total harmonic distortion input current on a combination of error amplifier parameters is obtained at a given value of power factor. The conditions under which the total harmonic distortion input current has the minimum value are found out. This article is of interest to power electronics engineers, who are aimed at developing a three-phase power factor corrector.

Intermediate DC-Link Capacitor Reduction in a Two-Stage Cascaded AC/DC Converter for More Electric Aircrafts

In this paper, an innovative method to minimize the intermediate dc-link capacitance in a cascaded two-stage combination of a three-phase six-switch power factor correction (PFC) and phase-shifted full-bridge (PSFB) dc/dc stage is introduced and analyzed. The proposed strategy has a significant impact on the minimization of the overall system weight and volume. Fundamentally, the method is based on minimizing the switching fundamental component of the dc-link current and is established by imposing a separate constraint on the phase duty ratios without compromising the unity PFC action. Furthermore, the control loop takes care of regulating the intermediate dc-link voltage along with the final output voltage. A 6 kW laboratory prototype of the integrated three-phase PFC and PSFB dc/dc as a part of auxiliary power unit in more-electric airplanes is developed and designed to validate the proposed algorithm. The experimental results show a conversion efficiency of 95.4% at full load, input total harmonic distortion of 4.1%, power factor of 0.998, output voltage ripple of ±1%, and a reduction of dc-link capacitor by 60%.

An Experimental Evaluation of Predictive Current Control and Predictive Torque Control for a PMSM Fed by a Matrix Converter

Predictive control has emerged as an attractive alternative for the control of matrix converters. The predictive control is a flexible method to control different variables through the minimization of a cost function. In drive system, the predictive control can be divided to predictive current control (PCC) and predictive torque control (PTC). In PCC, the stator current is evaluated in cost function, but in PTC the torque and stator flux are evaluated in the cost function. On the other hand, the ability of matrix converter in control of input source current can be easily included in both PCC and PTC. This paper introduces the methodology and the results of a comprehensive comparison of PCC and PTC techniques for a permanent-magnet synchronous motor (PMSM) fed by a matrix converter. The comparison involves the investigation of the torque and stator flux ripples, the total harmonic distortion of input and output currents, and the input filter resonance as figures of merit. Different performance indicators that present an instruction for the selection of predictive control methods for PMSM drive applications by matrix converters for engineering practices are provided with this comparative evaluation.

An Improved Single-Phase Direct PWM Inverting Buck–Boost AC–AC Converter

A single-phase inverting buck–boost ac–ac converter is proposed in this paper. The proposed converter has no shoot-through and dead-time problems and, like conventional dc–dc converters, it can be operated with simple pulse width modulation (PWM) control. It offers high frequency and high efficiency operation because high speed mosfet can be used as switching device without the reverse recovery issues and losses of its body diode. The proposed converter features quasi-continuous input and output currents, high input power factor, low total harmonic distortion of input and output currents, and high efficiency. A 460 W laboratory prototype was constructed and tested with interleaved and complementary PWM controls using a resistive and inductive load. Detailed experimental results are provided to show the novelty of the proposed converter. Experimental results confirmed that the proposed converter can obtain 93.8% efficiency at 60 kHz switching frequency.

A Reconfigurable Uninterruptible Power Supply System for Multiple Power Quality Applications

A novel topology of a modular per-phase uninterruptible power supply (UPS) system based on reduced-switch-count configuration is proposed in this paper. The proposed power conversion methodology offers active front-end filtering capability which ensures unity input power factor (reactive power compensation) and low input total harmonic distortion (harmonic power compensation). In addition, this UPS system provides dynamic voltage sag compensation capability, which consequently eliminates any series transformer or dc-dc boost converter that is typically used in conjunction with traditional stand-alone UPS systems. Furthermore, it has the desirable characteristics of making seamless transition from normal to backup mode during power failures and vice versa, as well as providing controlled voltage charging at the dc bus link. The proposed UPS is also impervious to load variations, which enables it to operate under nonlinear load condition. Lastly, the circuit structure is conceived from a commonly used three-leg six-switch building block, thereby making it simple and cost-effective, and offering improved power conversion efficiency as compared to a conventional line-interactive or on-line UPS schemes. A complete set of simulation and sample experimental results based on a 1-kW test prototype of the proposed UPS system are presented in this paper to demonstrate its viability and efficacy.