Time Violations Research Articles

Cloud computing and big data: Technologies and applications

Cloud computing and big data: Technologies and applications

Technological Optimization of Town-Planning Activity

The town-planning code of the Russian Federation allows to prepare the documents regulating design and planning activity independently by each subject of the town-planning relations. At the same time violations in the form of mismatch of information contents between separate town-planning documents are possible. These defects of a legal design can be eliminated by special federal instructive-methodological document preparation which is constructed on the basis of optimization of technological model of town-planning design activity which assumes in particular:1) strict execution of functional priorities establishment tasks of the Russian Federation Town-planning code in territories assignment at the Russian Federation territorial planning schemes level functional zones (land categories) dislocation definition in territorial planning schemes of the territorial subjects of the Russian Federation municipal districts and also in city district master plan drafts city and rural settlements2) town-planning zoning works reference to the level of territory planning documents preparation where the territorial zones of placement of capital construction projects would be established in the borders of planning structure elements of the settlement3) land plots surveying in the borders of territorial zones perform on the basis of the complex of conciliation procedures and public hearings of volume spatial decisions (sketches) of building undergoneThe offered town-planning design actions organization technological model is directed to planning solutions consecutive specification from different level territorial planning schemes, including city district master plans, city and rural settlements to theland plot planning organization schemes of the capital construction projects, i.e. from an investment plan to project realization.

A Method for Cross-Layer Analysis of Transmit Buffer Delays in Message Index Domain

In data transmission systems, quality-of-service constraints are commonly defined in the form of buffer overflow probability or delay violation probability at a transmitter buffer. Some of the studies that employ the large-deviation principle have taken the buffer overflow probability as the quality-of-service constraint and performed the associated analyses in the time domain. The delay violation probability has been investigated through the buffer overflow probability given that there exists a constant service rate from or a constant data arrival rate at a buffer. These studies cultivated the concepts of effective bandwidth and effective capacity, respectively. Different from the existing studies, we investigate the performance of a transmitter buffer in the message index domain rather than the time domain by taking the waiting time (buffering delay) as the primary quality-of-service constraint. We characterize the waiting time violation probability when both the data arrival and service processes are stochastic, and provide two new concepts: effective interarrival time and effective service time, which are the duals of effective bandwidth and effective capacity, respectively, in the message index domain. The effective interarrival time of a data arrival process determines the maximum constant service time for a message that can sustain the arrival process under a stochastic waiting time constraint, and the effective service time of a data service process determines the minimum constant interarrival time between successive messages arriving at a buffer that the service process can sustain. We show that we can obtain the effective capacity of a service process or the effective bandwidth of an arrival process through the effective service time or the effective interarrival time of the corresponding process, respectively, in cases where it is difficult to formulate the effective capacity and the effective bandwidth without numerical techniques or particular assumptions. Noting that our proposed techniques can be applied in vehicular communication scenarios, e.g., highways, urban areas, and rural areas, we finally analyze a typical data dissemination and collection task in vehicular networks using a broadcast downlink and a slotted Aloha uplink transmission.

National trends in drinking water quality violations.

Ensuring safe water supply for communities across the United States is a growing challenge in the face of aging infrastructure, impaired source water, and strained community finances. In the aftermath of the Flint lead crisis, there is an urgent need to assess the current state of US drinking water. However, no nationwide assessment has yet been conducted on trends in drinking water quality violations across several decades. Efforts to reduce violations are of national concern given that, in 2015, nearly 21 million people relied on community water systems that violated health-based quality standards. In this paper, we evaluate spatial and temporal patterns in health-related violations of the Safe Drinking Water Act using a panel dataset of 17,900 community water systems over the period 1982-2015. We also identify vulnerability factors of communities and water systems through probit regression. Increasing time trends and violation hot spots are detected in several states, particularly in the Southwest region. Repeat violations are prevalent in locations of violation hot spots, indicating that water systems in these regions struggle with recurring issues. In terms of vulnerability factors, we find that violation incidence in rural areas is substantially higher than in urbanized areas. Meanwhile, private ownership and purchased water source are associated with compliance. These findings indicate the types of underperforming systems that might benefit from assistance in achieving consistent compliance. We discuss why certain violations might be clustered in some regions and strategies for improving national drinking water quality.

Reducing the number of response time service level objective violations by a cloud‐HPC convergence scheduler

SummaryJob scheduling is an old topic in High‐Performance Computing (HPC), and it is more and more studied in data centers. Large data centers are often split into separate partitions for cloud computing and HPC; each partition normally has its specific scheduler. The possibility of migrating jobs from the HPC partition to the cloud one is a topic widely discussed in the literature. However, job migration from cloud to HPC is a much less explored topic. Nevertheless, such migration may be useful in many situations, in particular when the HPC platform has a low resource usage level, and the cloud usage level is high. A large number of jobs that could migrate from the cloud to the HPC partition may be observed in Google data center workloads. Job scheduling using overbooking strategy is seen as the main reason for the high resource usage level in clouds. However, overbooking can lead to a high rate of rescheduling and job dumping, which potentially causes response time violations. This work shows that HPC platforms can host and execute some cloud jobs with low interference in HPC jobs and a low number of response time violations. We introduce the definition of a cloud‐HPC convergence area and propose a job scheduling strategy for it, aiming at reducing the number of response time violations of cloud jobs without interfering with HPC jobs execution. Our proposal is formally defined and then evaluated in different execution scenarios, using the SimGrid simulation framework, with workload data from production HPC grid. The experimental results show that often, there is a large number of empty areas in the scheduling plan of HPC platforms, which makes it possible to allocate cloud jobs by backfilling. This is due to the sparse HPC job submission pattern and the low resource usage level in some HPC platforms. One performed simulation scenario considered a set of 11K parallel HPC jobs running on a 2560‐processor platform having an average resource usage level of 38.0%. The proposed convergence scheduler succeeded to inject around 267K cloud jobs in the HPC platform, with a response time violation rate under 0.00094% for such jobs, considering 80 processors in the convergence area and no effects on the HPC workload. This experiment considered cloud jobs based on job features of Google public cloud workloads, with a processing time slack factor of 1.25 (which is considered as high priority in the Google cloud SLA—Service Level Agreement). Usually, most cloud jobs show a slack factor higher than 1.25 (most cloud jobs are medium or low priority). The same simulation, repeated with a higher slack factor (4), showed no response time violations.

Surgical Pathology Resident Rotation Restructuring at a Tertiary Care Academic Center

Changes in the field of pathology and resident education necessitate ongoing evaluation of residency training. Evolutionary change is particularly important for surgical pathology rotations, which form the core of anatomic pathology training programs. In the past, we organized this rotation based on subjective insight. When faced with the recent need to restructure the rotation, we strove for a more evidence-based process. Our approach involved 2 primary sources of data. We quantified the number of cases and blocks submitted per case type to estimate workload and surveyed residents about the time required to gross specimens in all organ systems. A multidisciplinary committee including faculty, residents, and staff evaluated the results and used the data to model how various changes to the rotation would affect resident workload, turnaround time, and other variables. Finally, we identified rotation structures that equally distributed work and created a point-based system that capped grossing time for residents of different experience. Following implementation, we retrospectively compared turnaround time and duty hour violations before and after these changes and surveyed residents about their experiences with both systems. We evaluated the accuracy of the point-based system by examining grossing times and comparing them to the assigned point values. We found overall improvement in the rotation following the implementation. As there is essentially no literature on the subject of surgical pathology rotation organization, we hope that our experience will provide a road map to improve pathology resident education at other institutions.

High-speed single cable synchronization system for data-converters

A clock-cycle accurate synchronization technique for fully integrated data-converters is presented. Only a single cable is needed to distribute both the required synchronization signal and the converter clock. Different possible implementations, both to generate and decompose the distributed signal, are presented. A discrete component generator circuit is discussed. To avoid setup and hold time violations, on-chip signal reconstruction is unavoidable. A 40 nm CMOS recovery circuit was developed. Simulation results, including layout parasitics, show the wide frequency operating range of the proposed technique.

A Simple and Reliable System to Detect and Correct Setup/Hold Time Violations in Digital Circuits

In this article, a fully digital system to detect and correct setup/hold time violations in digital circuits, is presented. The proposed system benefits from simple, low-power, small-area, and easy-to-modify design. The system is composed of two separate blocks, detector and corrector connected through a 2-bit control signal. The detector is placed near flip-flops or memory elements and sends control signals to the corrector. Corrector circuitry consists of only CMOS inverters and a multiplexer, either after global clock source to correct clock globally or before the elements to correct them locally. Because of its simplicity, this system can be repeatedly used throughout the chip. Also it is proved that the correction circuitry may be realized by employing only a few CMOS inverters without any need for adjusting the delay of the inverters. Furthermore, mathematical proof for the ability of the inverter-based correction circuitry is provided. The system continuously monitors and corrects any setup/hold time violations up to the highest possible operating frequency a given process allows.

Fundamental Study on a Mechanism of Faulty Outputs from Cryptographic Modules Due to IEMI

SUMMARYThis paper investigates the mechanism underlying faulty outputs from cryptographic modules due to intentional electromagnetic interference (IEMI), which causes information leakage in electronic devices without disrupting their functions or damaging their components. We show this fault mechanism through experiments using the faulty ciphertexts and pulse injection to a specific round in the encryption process. The experimental results indicate that faulty outputs from cryptographic modules are caused by setup time violation in the cryptographic module.

Analyzing the Efficiency of Biased-Fault Based Attacks

In this letter, we analyze a class of recently proposed fault analysis techniques, which adopt a biased fault model. The purpose of our analysis is to evaluate the relative efficiency of several recently proposed biased-fault attacks. We compare the relative performance of each technique in a common framework, using a common circuit and a common fault injection method. We show that, for an identical circuit and fault injection method (setup time violation through clock glitching), the number of faults per attack greatly varies according to the analysis technique. In particular, DFIA is more efficient than FSA, and FSA is more efficient than both NUEVA and NUFVA. In terms of number of fault injections until full key disclosure, for a typical case, FSA uses 8x more faults than DFIA, and NUEVA uses 33x more faults than DFIA. Hence, the postprocessing technique selected in a biased-fault attack has a significant impact on the success of the attack.

A bipolar resource management framework for resource provisioning in Cloud’s virtualized environment

Cloud’s profitability is mainly driven by the business, and on the other hand, a successful business is hardly geared with clients’ satisfaction. Therefore, there is high competition between cloud providers for satisfying clients and attracting more of them. In this way, long term business success factors should also be considered in addition to short term profit factors regarded in conventional resource provisioning procedures. Conventional resource management approaches to achieve short term profit inevitably lead to job rejection and violation from response time based SLAs while short response time and low job rejection are of those important factors to clients’ satisfaction. Therefore, this paper proposes a novel bipolar resource management framework which results in preventing from job rejection and having considerably reduced violations from response time based SLAs as well as providing short term profits. The proposed framework uses a neural network based predictor and genetic algorithm for optimal resource management through live migration. It also employs a prediction based temporal infinite pool, called the temporal cloud, which regards job rejection prevention. The evaluation of the proposed framework demonstrates that it can provide short term profits, beside it prevents from job rejection and reduces response time violations considerably.

Price and Lead Time Quotation for Contract and Spot Customers

We study price and lead time quotation decisions in a make-to-order system with two customer classes: (1) contract customers whose orders are practically always accepted and fulfilled based on a contract price and lead time agreed on at the beginning of the time horizon, and (2) spot purchasers who arrive over time and are quoted a price and lead time pair dynamically. The objective is to maximize the long-run expected average profit per unit time, where profit from a customer is defined as revenues minus lateness penalties incurred because of lead time violations. We model the dynamic quotation problem of the spot purchasers as an infinite horizon Markov decision process, given a fixed price and lead time for contract customers. We analyze the impact of customer preferences (e.g., price and lead time sensitivity) on the optimal price and lead time decisions for spot purchasers and characterize the optimal policy. We explore the benefits of dynamic quotation compared to the use of fixed price and lead times, and provide recommendations for firms. Finally, we analyze the optimal contract terms given the dynamic quotation strategy for spot purchasers and discuss the profit improvements offered by the optimal mix of spot and contract customers.

Workload Consolidation using VM Selection and Placement Techniques in Cloud Computing

Cloud computing provides a consumer pay-per-use computing model over the Internet using numerous data centers across the globe. Power consumption by the huge data centers in Cloud environment has attracted the attention of research community. Efficient usage of energy in Cloud can be addressed in many facets. Virtual Machine (VM) consolidation is one of the techniques to save or reduce energy in virtualized data centers. VM Migration in Cloud also provides us an opportunity for reducing energy consumption. In this research, we intend to study various VM placements & selection policies and VM migration algorithms for underloaded and overloaded hosts to reduce energy consumption and SLA violation. We propose a novel method using combination of two methods, Least Increase Power (LIP) consumption with Host Sort and Minimum Correlation Coefficient (MCC) for consolidation of VM placement, placing a migratable VM on a host based on utilization thresholds. The results show performance of each combination of algorithms varies with the changing value of the parameters brings better in terms of energy consumption, VM migration time and SLA violation. The reader may plunge the appropriate method for energy consumption.

Post-Silicon Tuning Based on Flexible Flip-Flop Timing

Clock skew scheduling is one of the essential steps to be carefully performed during the design process. This work addresses the clock skew optimization problem integrated with the consideration of the inter-dependent relation between the setup and hold times, and clock to-Q delay of ip-ops, so that the time margin is more accurately and reliably set aside over that of the previous methods, which have never taken the integrated problem into account. Precisely, based on an accurate exible model of setup time, hold time, and clock-to-Q delay, we propose a stepwise clock skew scheduling technique in which at each iteration, the worst slack of setup and hold times is systematically and incrementally relaxed to maximally extend the time margin. The effectiveness of the proposed method is shown through experiments with benchmark circuits, demonstrating that our method relaxes the worst slack of circuits, so that the clock period (Tclk) is shortened by 4.2% on average, namely the clock speed is improved from 369 MHz~2.23 GHz to 385 MHz~2.33 GHz with no time violation. In addition, it reduces the total numbers of setup and hold time violations by 27.7%, 9.5%, and 6.7% when the clock periods are set to 95%, 90%, and 85% of the value of Tclk, respectively.

The relationship between the Zimbardo Time Perspective Inventory and violations of business ethics in China: Unbalanced time perspective increases the acceptance of unethical business behavior

Scope of researchIn a sample of 316 Chinese MBA students, the influence of Time Perspective on two types of unethical behaviors was tested. We differentiated between rule-based and social-concern issues. Time Perspective was measured by using a Chinese version of the Zimbardo Time Perspective Inventory. Participants’ evaluation of the issues as ethical—or unethical—and their behavioral intention to violate business ethics were measured.HypothesesWe assumed that Past-Positive and Future will enhance ethical orientation, whereas Past-Negative, Present-Fatalistic and deviance from balanced time perspective (DBTP) will reduce ethical orientation (evaluation of unethical practices as ethical and high behavioral intention to apply unethical practices).ResultsFor evaluation of rule-based issues, Past-Positive, Present-Hedonistic and Future significantly influenced in the predicted direction, whereas no significant effects of time perspectives for social concern issues were observed. According to behavioral intention, only Present-Fatalistic reached significance for both types of ethical issues in the predicted direction. Further, it was shown in a mediation-model that the influence of DBTP on behavioral intention to show unethical practices is mediated by the evaluation as ethical/unethical in the case of rule-based issues (in the case of social concern, the factors reached no significance or only nearby significances, respectively). Chinese managers with a high deviation from a balanced time perspective showed reduced evaluation of unethical practices as unethical, and an enhanced behavioral intention to show unethical practices. Other potential variables of influence, such as age, gender, the size of company, and the degree of globalization were considered, and their influences were controlled.Conclusions and limitationsTime perspectives are of relevance for business ethics, but the relationship was only shown for rule-based issues. In the case of social concern, the relationship was only shown for Present-Fatalistic on behavioral intention.

A Digitally Intensive Transmitter/PA Using RF-PWM With Carrier Switching in 130 nm CMOS

A digitally intensive transmitter using RF pulse-width-modulation (PWM) with a class-D power amplifier (PA) is described. The use of carrier switching for alleviating the dynamic range limitation that can be observed in classical RF-PWM implementations is introduced. The approach employs full carrier frequency for half of the amplitude range and the second harmonic of half of the carrier frequency, for the remainder of the amplitude range. This concept not only allows the transmitter to drive modulated signals with large peak-to-average power ratios (PAPR) but also improves back-off efficiency due to reduced switching losses in the half carrier-frequency mode. A glitch-free phase selector is proposed that removes the deleterious glitches that can occur at the input data transitions. The phase-selector also prevents D flip-flop setup-and-hold time violations. The transmitter has been implemented in a 130-nm CMOS process. The measured peak output power and power-added-efficiency (PAE) are 25.6 dBm and 34%, respectively. While driving 802.11g 20 MHz 64-QAM OFDM signals, the average output power is 18.3 dBm and the PAE is 16% with an EVM of $-25.5\; \text{dB}$ .

Quantum phase transitions detected by a local probe using time correlations and violations of Leggett-Garg inequalities

In the present paper we introduce a way of identifying quantum phase transitions of many-body systems by means of local time correlations and Leggett-Garg inequalities. This procedure allows to experimentally determine the quantum critical points not only of finite-order transitions but also those of infinite order, as the Kosterlitz-Thouless transition that is not always easy to detect with current methods. By means of simple analytical arguments for a general spin-$1 / 2$ Hamiltonian, and matrix product simulations of one-dimensional $X X Z$ and anisotropic $X Y$ models, we argue that finite-order quantum phase transitions can be determined by singularities of the time correlations or their derivatives at criticality. The same features are exhibited by corresponding Leggett-Garg functions, which noticeably indicate violation of the Leggett-Garg inequalities for early times and all the Hamiltonian parameters considered. In addition, we find that the infinite-order transition of the $X X Z$ model at the isotropic point can be revealed by the maximal violation of the Leggett-Garg inequalities. We thus show that quantum phase transitions can be identified by purely local measurements, and that many-body systems constitute important candidates to observe experimentally the violation of Leggett-Garg inequalities.

Dynamic Flip-Flop Conversion: A Time-Borrowing Method for Performance Improvement of Low-Power Digital Circuits Prone to Variations

Dynamic flip-flop (FF) conversion is a method of time borrowing (TB) for improving the performance of digital systems prone to variations. The first type of this method (Type A), which was previously presented, suffers from a large inefficient transparency window. In this brief, we present an improved structure for this method (Type B) that mitigates this problem by automatically closing the window after the arrival of late data at timing critical FFs. This method was compared with soft edge FF and dynamic clock stretching through simulations on different ITC’99 benchmarks. We defined a parameter called improvement efficiency, which is the ratio of the timing yield improvement to the power overhead of TB. According to the simulation results, the efficiency of Type A is on average 269% more than the best results of other methods when considering only the setup time violations. But, when taking both the setup time and the hold time violations into account, Type B is on average 46% more efficient than the best results of other methods. The simulations also show that the yield improvement of this method increases in higher clock frequencies and it remains the most efficient method when reducing the voltage down to near-threshold region.

The vehicle routing problem with multiple prioritized time windows: A case study

This paper addresses Multi-objective Vehicle Routing Problem with Multiple Prioritized Time Windows (VRPMPTW) in which the distributer proposes a set of all non-overlapping time windows with equal or different lengths and the customers prioritize these delivery time windows. VRPMPTW aims to find a set of routes of minimal total traveling cost and maximal customer satisfaction (with regard to the prioritized time windows), starting and ending at the depot, in such a way that each customer is visited by one vehicle given the capacity of the vehicle to satisfy a specific demand. This problem is inspired from a real life application. The contribution of this paper lies in its addressing the VRPMPTW from a problem definition, modeling and methodological point of view. We developed a mathematical model for this problem. This model can simply be used for a wide range of applications where the customers have multiple flexible time windows and violation of time windows may drop the satisfaction levels of customers and lead to profit loss in the long term. A Cooperative Coevolutionary Multi-objective Quantum-Genetic Algorithm (CCMQGA) is also proposed to solve this problem. A new local search is designed and used in CCMQGA to reach an appropriate pareto front. Finally, the proposed approach is employed in a real case study and the results of the proposed CCMQGA are compared with the current solution obtained from managerial experience, the results of NSGA-II and the multi-objective quantum-inspired evolutionary algorithm.

A Silicon-Level Countermeasure Against Fault Sensitivity Analysis and Its Evaluation

In this paper, we present an efficient countermeasure against fault sensitivity analysis (FSA) based on configurable delay blocks (CDBs). FSA is a new type of fault attack, which exploits the relationship between fault sensitivity (FS) and secret information. Previous studies reported that it could break cryptographic modules equipped with conventional countermeasures against differential fault analysis (DFA), such as redundancy calculation, masked and–or, and wave dynamic differential logic. The proposed countermeasure can thwart both DFA and FSA attacks based on setup time violation faults. The proposed ideas are to use a CDB as a time base for detection and to combine the technique with Li’s countermeasure concept that removes the dependency between FSs and secret data. The postmanufacture configuration of the CDBs allows minimization of the overhead in operating frequency that comes from manufacture variability. In this paper, we also present an implementation of the proposed countermeasure in application-specified integrated circuit, and describe its configuration method. We then investigate the hardware overhead of the proposed countermeasure for an advanced encryption standard processor and demonstrate its validity through an experiment.