Three-dimensional Multichip Module Research Articles

Structural Strength and Temperature Condition of Multi-Chip Modules

The general principles of designing three-dimensional multichip modules are presented. The multichip modules are simulated and the effect of the design variables on the strength and temperature condition of the products is studied. The values of thermomechanical stresses, heat resistance, and overheating temperatures of the materials are determined, and the heat removal efficiency in various structural variations of three-dimensional modules is also found. Methods for providing an intensive heat transfer in the structures of the modules and increasing the strength consistency of the products are developed. Recommendations on the design of multichip modules are given.

Integrated Silicon Nanophotonic Data Processing Devices: A Brief Review

Significant scientific efforts are constantly invested in the attempts to develop photonic circuitry integrated in microelectronic chip. Such circuitry should be capable of realizing fundamental processing building blocks such as modulators (or transistors) and logic gates in order to improve the performance of an optics communication short and/or long range links. The improvement is to be obtained in the sense of reduced power dissipation, lower noise level and increased information bandwidth. This paper reviews some of the technologies involved in those efforts. Specifically we focus on silicon based integrated nanophotonic modulation devices (based upon plasma dispersion as well as fundamental non linear processes in silicon) as well as passive devices for directing and spectrally filtering light via silicon nanophotonic crystal structures. The patents mentioned in this review relate to the realization of nanophotonic logic gates for data processing, they are related to photonic nano communication link apparatus, apparatus and method for switching, modulation and dynamic control of light transmission using photonic crystals and to modulator-based photonic chip-tochip interconnections for dense three-dimensional multichip module integration. Keywords: Integrated optics, optical circuitry, silicon.

Embedded Power: A 3-D MCM Integration Technology for IPEM Packaging Application

Embedded power (EP) is the name for an integration technology for the power electronics switching stage, in which the multiple bare power chips, such as IGBTs, MOSFETs, and diodes, are buried in a ceramic frame and covered by a dielectric layer with via holes on the Al pads of the chips. Then, a planar metallization pattern is deposited onto it both for bonding to the power chips and a circuit wiring. The ceramic frame can be used as an extra thermal path and substrate for fabrication of the hybrid circuit with compatible thin- or thick-film techniques. When this integrated chips component is stacked with a base substrate and the associated components, a novel three-dimensional (3-D) multichip module (MCM) is produced. Such an integrated power electronics module (IPEM) offers performance improvement, functional integration, and process integration, as compared to conventional power hybrid modules. This paper presents the details of this technology, including the process design and implementation. A subsystem IPEM, incorporating power factor correction (PFC) and dc/dc switching stages for a distributed power system (DPS) front-end converter application, has been fabricated and characterized to demonstrate the feasibility of this power electronics integration technology. The capability for functional integration and the electrical performance improvement, which includes reduction in parasitics and increase in efficiency, are presented

Thermal simulations of three-dimensional integrated multichip module with GaN power amplifier and Si modulator

A finite-element simulation was used to quantitatively estimate the heat transfer in a three-dimensional multichip module (MCM) consisting of a GaN power amplifier with solder-bump-bonded Si modulator and integrated antenna on a high-resistivity SiC substrate under various conditions of power density and substrate and epi thicknesses via wire thickness and effective heat transfer coefficient. The maximum temperature in the integrated-antenna approach occurred in the center of the MCM. At a GaN power amplifier power level of 3W∕mm, a steady-state temperature of ∼125°C was reached in ∼20s. Bulk GaN substrates were also found to provide good thermal transfer characteristics, while sapphire produced an increase in temperature almost a factor of 3 higher than for SiC. At a power density of 10W∕mm, the steady-state operating temperature was ∼400°C even with SiC substrates.

MEMS Enablement and Analysis of the Miniature Autonomous Submersible Explorer

The miniature autonomous submersible explorer (MASE) was designed as a vehicle for astrobiology science by Behar et al. . This paper focuses on the MASE concept and extrapolates a future design based on microelectromechanical systems (MEMS), multifunctional microsystems (MMS), and three-dimensional multichip modules (3-D-MCM). Miniaturization of the electronics increases the payload volumes and power capabilities significantly and this is the main rationale for pursuing extreme miniaturization. The original MASE vehicle accommodated 1-2 instruments while the MEMS enhanced miniature autonomous submersible explorer (MEMSEMASE) accommodates up to six instruments. It is shown that the occupied area of the electronics components is reduced eight times, and the volume 25 times. The vehicle is shaped as a tube with 5 cm in diameter and 20 cm in length and can support 8 W continuously over 5 h. The maximum range is 25 km while the typical onboard instrumentation is conductivity, temperature, depth (CTD), and a high resolution camera. An optical fiber is used for bidirectional communication with the vessel. The goal of this enriched concept is to present an extremely miniaturized submersible design. The vehicle volume is defined to fit inside host vehicles with the goal of future deployment on Europa, oceans on Earth, and bore holes. The paper will focus on showing how electronics can be densely packed into micromachined silicon modules and how these can be designed and interconnected theoretically.

Synthesis of Thermal RC-Networks for System-in-Packages

The applicability of system-in-package (SiP) type structures may be limited due to chip-to-chip thermal interactions. Therefore all significant heat sources have to be considered in the design to ensure safe operating temperatures. In this paper, we propose a generic compact thermal model (CTM) synthesis method for multichip packages that takes dynamic chip-to-chip interactions and different boundary conditions into account. The method is demonstrated with a stacked three-dimensional multichip module. Dynamic thermal characteristics of the module are studied by means of detailed finite element simulations and the results are considered as reference data in the synthesis. The CTM is optimized to diverse conditions typical to the application-specific environment, and the accuracy of the model is found sufficient for thermal design purposes.

A circuit-fed tile-approach configuration for millimeter-wave spatial power combining

In this paper, a circuit-fed spatially combined transmitter array is described for operation at 44 GHz. The array contains 256 elements where each element consists of a monolithic-microwave integrated-circuit amplifier and a circularly polarized microstrip patch antenna. The array is constructed using 16-element tile-approach subarrays. Each subarray is a two RF-level (three-dimensional) multichip module containing integrated microstrip patch antennas. The basic construction of the transmitter array resembles tile-approach phased arrays; however, the implementation has been tailored for the power-combining application. The peak performance at 43.5 GHz is equivalent isotropic radiated power of 40.6 dBW (11570 W), effective transmitted power (P/sub eff/) of 5.9 W, dc-to-RF efficiency of 7.3%, and system gain of 35 dB.

Chip mounting and interconnection in multi-chip modules for spaceapplications

The objective of this study is to develop processing knowledge andtechnology of three-dimensional multi-chip modules for space applications. The aim isto test the reliability as well as to optimize the different process steps.Bisbenzocyclobuthene (BCB) was chosen as the interdielectric material as itfulfills the requirements for space qualification and process compatibility.Integrated circuit chips have been mounted recessed in silicon using BCB asglue. Metal interconnects of thin-film aluminum are isolated with spin-ondeposited BCB as an interlayer dielectric (ILD). Two layers of BCB, totalthickness 30 µm, are needed to achieve chip edge step coverage. Viainterconnections, minimum dimensions 100×100 µm2 havesuccessfully been patterned in a 30 µm thick BCB layer. Measuring I-Vcharacteristics has validated the connections.

Manufacturing and packaging of sensors for their integration in a vertical MCM microsystem for biomedical applications

Demonstrates the feasibility of integrating fragile micromachined chips into a complex three-dimensional (3-D) multichip module (MCM) microsystem for a biomedical application. The system is based on the vertical integration of the different parts: micropumps and valves, a multisensor chip for on-line control of the system and a signal-processing chip. In this paper, packaging of the microsystem is studied in order to minimize the induced stress that can affect the integrity of the different micromachined parts of the system. Standard commercially available components and materials were used so as to minimize costs for the case of high volume packaging. For testing the approach, a multisensor chip which includes thin silicon membrane-based devices has been used as the main test structure to compare different packaging materials. In addition, for the fabrication of such a sensor chip in an efficient mode, technological modules needed to fabricate sensors on complementary metal-oxide-semiconductor (CMOS) wafers are discussed. The definition of standardized add-on sensor modules to the CMOS process of a foundry is intended to limit the development cost of smart sensors.

An efficient thermal simulation tool for ICs, microsystem elements and MCMs: the μS-THERMANAL

Integrated microsystems raise new problems in thermal simulation. The frequently used structures such as cantilevers and membranes have different heat transfer properties than the simple silicon cubes of conventional integrated circuits (ICs). To take advantage of this, numerous functions are realized on these structures based on the thermal principle. Quick and correct thermal simulation of these structures is needed during the design process. The paper presents the μS-THERMANAL thermal simulation tool which is capable of simulating, beyond the IC chips and three-dimensional multi-chip module packaging structures, the cantilever, the bridge and the membrane structures as well, both in steady-state and in the frequency-domain case. The algorithms of the program, based on the Fourier method, are detailed in the paper and numerous examples illustrate the capabilities of the tool.

Design and evaluation of an epoxy three-dimensional multichip module : Jon M. Sternet al. IEEE Transactions on Components, Packaging and Manufacturing Technology—Part B, 19 (1), 188 (1996)

Design and evaluation of an epoxy three-dimensional multichip module : Jon M. Sternet al. IEEE Transactions on Components, Packaging and Manufacturing Technology—Part B, 19 (1), 188 (1996)

Design and evaluation of an epoxy three-dimensional multichip module

A low-cost, three-dimensional multichip module (MCM) technology provides greatly improved system density and reduced mass over planar packaging technologies. The technology offers a high degree of testability that negates the need for known good die (KGD) procurement. Testing is achieved with very low cost overheads and with no increase in the volume of the module. The technology allows complete, heterogeneous systems to be packaged and interconnected in a single, ultra-dense module. The electrical characteristics of the technology are comparable to standard chip packages. However, the parasitics due to package-to-package interconnects are eliminated. This removes the dominant cause of parasitics, dramatically improving the electrical characteristics. A programmable integrated camera and image processing system has been developed which incorporates a grayscale camera, analog-to-digital conversion, four programmable processors and memory. Utilizing the three-dimensional multichip module technology, the system, which consists of nine chips and 36 discrete components, has an overall volume of 4.77 ml. This is approximately six times more dense than an advanced PCB implementation. The system forms the first stage in the design and manufacture of a portable video communications device. For such applications, low system volume and mass are key attributes. The system demonstrates the potential of the packaging technique for the integration of complete mixed signal systems incorporating sensors and processing. Further developments to the technology will provide increased module density, improved routing capacity, and electrical performance.

Analysis of transient behavior of vertical interconnects in stacked circuit board layers using quasi-static techniques

Fuzz-buttons can interconnect up to fifty circuit board substrate layers in conjunction with metallic vias. As a result, the use of three-dimensional multichip modules (MCM's) with fuzz-buttons may be able to achieve very high packaging densities. On the other hand, the vertical interconnects, surrounded by different dielectric materials and passing through many ground mesh holes, are three-dimensional nonuniform transmission lines. Therefore, the electromagnetic analysis of fuzz-button interconnects is not straightforward. In this paper, we propose a method to analyze fuzz-buttons under quasistatic assumptions. We apply the electrostatic method to find the charge distribution and the distributed capacitance of the fuzz-buttons, and a quasimagnetostatic approach to calculate the inductance. By using image theory, a free space Green's function is formulated. The effect of the via holes is taken into account by utilizing the equivalence principle. A set of integral equations is established and solved by a combination of the point-matching method and Galerkin's method. An iterative algorithm is imposed to solve the matrix equations. After the equivalent nonuniform transmission line model is established, we then apply the transmission (ABCD) matrix method, allowing the propagation parameters to be obtained easily. Finally, we employ the fast fourier transform (FFT) to convert the frequency results into the tine domain. Waveform distortion, time delay, and crosstalk values for a 60 ps risetime input signal are evaluated. The quasistatic approach is compared against the finite difference time domain (FDTD) algorithms and good agreement is observed. >

Electronic systems in dense three-dimensional packages

A new packaging technology has been developed which permits the production of systems in a single miniature three-dimensional multichip module (MCM) and a prototype ‘smart camera’ has been developed as a technological demonstrator. The demonstrator is a complex microsystem incorporating standard commodity parts such as a camera chip, integrated circuits and discrete components. This smart camera has been produced in a lightweight, low-volume package. The packaging technique is scalable to a low-cost manufacturing process and offers improved electrical performance over conventional methods.

Three-dimensional modeling of multichip module interconnects

The finite-difference time-domain method with nonuniform grid is applied to the analysis of novel three-dimensional (3D) multichip module (MCM) interconnects. The vertical interconnects involved in this technology consist of small plated via holes defined by a photolithography system. The via dimensions are of the same order as the microstrip and stripline linewidths to reduce the transmission line discontinuities. Two 3D transitions are investigated: 1) microstrip-via-stripline and 2) microstrip-via-90 degrees stripline. Electric field distributions and pulse propagation under the microstrip and the stripline are presented. The scattering parameters for various cases are calculated and compared. Geometrical effects such as different conductor extensions on top of the vias and different hole sizes in the reference plane are also investigated. It is found that the 90 degrees bend structure shows less reflection than the straight one. Designers may introduce such 90 degrees bends intentionally to improve signal transmission.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>