Mobility Of Thin-film Transistors Research Articles

Optimisation of geometric aspect ratio of thin film transistors for low-cost flexible CMOS inverters and its practical implementation

A low-cost, flexible processor is essential to realise affordable flexible electronic systems and transform everyday objects into smart-objects. Thin film transistors (TFTs) based on metal-oxides (or organics) are ideal candidates as they can be manufactured at low processing temperatures and low-cost per unit area, unlike traditional silicon devices. The development of complementary metal–oxide–semiconductor (CMOS) technology based on these materials remains challenging due to differences in performance between n- and p-type TFTs. Existing geometric rules typically compensate the lower mobility of the metal-oxide p-type TFT by scaling up the width-to-length (W/L) ratio but fail to take into account the significant off-state leakage current. Here we propose the concept of an optimal geometric aspect ratio which maximises the inverter efficiency represented by the average switching current divided by the static currents. This universal method is especially useful for the design of low-power CMOS inverters based on metal-oxides, where the large off-current of the p-type TFT dominates the static power consumption of the inverter. We model the inverter efficiency and noise margins of metal-oxide CMOS inverters with different geometric aspect ratios and compare the performance to different inverter configurations. The modelling results are verified experimentally by fabricating CMOS inverter configurations consisting of n-type indium-silicon-oxide (ISO) TFTs and p-type tin monoxide (SnO) TFTs. Notably, our results show that reducing W/L of metal-oxide p-type TFTs increases the inverter efficiency while reducing the area compared to simply scaling up W/L inversely with mobility. We anticipate this work provides a straightforward method to geometrically optimise flexible CMOS inverters, which will remain relevant even as the performance of TFTs continues to evolve.

Study of high-pressure hydrogen annealing effects on InGaZnO thin-film transistors

High-pressure hydrogen annealing (HPHA) treatment is an effective hydrogen doping method to improve electrical characteristics and stability of InGaZnO (IGZO) thin film transistors (TFTs). The HPHA effects on IGZO TFTs under various pressure conditions were investigated using analytical techniques. Drive current, field effect mobility, subthreshold swing, and bias stress stability of IGZO TFTs were significantly improved as the HPHA pressure was increased up to 20 atm. To analyze the performance enhancement, secondary ion mass spectroscopy, capacitance–voltage analysis, and x-ray photoelectron spectroscopy analysis techniques were performed. As a result, it was confirmed that doped hydrogen is combined with interface trap sites and oxygen vacancy related bulk defect sites, leading to improved subthreshold swing and bias stress stability. Furthermore, bulk trap passivation also contributes to high carrier density, thereby increasing driving current and field effect mobility. With increasing HPHA pressure condition, these effects of trap passivation and increase in the carrier density are more effective due to the heavily injected hydrogen.

Design Concept of CT Plate Detector and CT Machine

Because the mobility ratio of thin film transistors is too low, it is recognized that flat detector can not be used in CT machine.The current research direction is to find the detector material with higher mobility ratio, but with little success. This study puts forward a new scheme to solve the core problem that limits the application of CT, which is the mobility of thin film transistors:by moving various TFT functions in the thin film transistor to the peripheral circuit, the restriction of the mobility of thin film transistor on the CT machine is completely overcome, and the reading speed of the flat panel detector becomes very fast, which can perfectly meet the requirements of the scanning speed of the CT machine.This will provide new research ideas for the application of flat panel detector in CT machine.

Effect of oxygen defect on the performance of Nd: InZnO high mobility thin-film transistors

High mobility and stability are eternal themes for oxide semiconductor TFT. However, there is a natural contradiction between mobility and stability. The oxygen defect state has a great influence on oxide semiconductor devices, so we adopt different sputtering oxygen percentages to prepare Nd: InZnO films of different deposition states. The type and number of oxygen defects were extracted and fitted by μ-PCD, XPS, and CV. Through a series of characterization tests on thin films and devices, the influence mechanism of oxygen-related defect states on the performance and instability of high mobility oxide TFT was analyzed. The results show that the stability of TFT can be improved by appropriately increasing the oxygen percentage, but some mobility will be lost. Finally, we have achieved devices with high mobility and good stability by cleverly designing homojunction TFT. The best device performance is μsat=38.2 cm2V–1S–1, SS= 0.13 V/dec, Vth≈ 0 V, Ion/off= 4.3 × 108. This is a simple and effective way to prepare high-performance TFT circuits.

Humidity effect on electrical performance and bias stability of solution-processed In2O3 thin film transistor

ABSTRACT Relative humidity (RH) in storage environment has a great impact on the electrical performance of thin film transistors (TFTs), and the RH is critical for semiconductor manufacturing and device packaging. In this work, solution-processed indium oxide (In2O3) TFT is fabricated, and the electrical performance of the device is investigated after being exposed to various RH conditions. It is found that the threshold voltage (Vth) and the mobility of In2O3 TFT exhibit clear responses to the RH ranging from 23% to 85%. The inherent mechanism about the humidity effect on the electrical performance is elaborated, and this is due to the “donor effect” from the absorbed water molecules. In addition to the effect on Vth and mobility, RH also exhibits a significant effect on the electrical stability of the TFT. The experimental result indicates that the In2O3 TFT exposed to RH <50% exhibits excellent stability with an applied positive bias stressing for 2000s.

Combustion-assisted low-temperature solution process for high-performance SnO2 thin-film transistors

In this study, high-performance SnO2 thin-film transistors (TFTs) were fabricated at temperatures below 300 °C using the combustion-assisted sol-gel method. The internal energy induced by the exothermic reaction of the fuel and the oxidizer in the combustion precursors facilitates precursor conversion even at low processing temperatures, leading to the development of crystalline SnO2. Compared to the conventional solution process, it was confirmed that the precursor was converted to crystalline SnO2 at below 300 °C through thermogravimetric analysis, differential scanning calorimetry, and grazing incidence X-ray diffraction. In addition, X-ray photoelectron spectroscopy spectra indicate the formation of complete metal-oxygen-metal networks with an increase in the oxygen corresponding to the lattice, as well as a decrease in hydroxyl groups. As a result, compared with the conventional SnO2 TFTs, the field-effect mobility of combustion-assisted SnO2 TFTs increased significantly from 0.014 ± 0.01 to 2.43 ± 0.22 cm2/Vs at 250 °C (by ∼ 170 times) and from 0.38 ± 0.15 to 6.53 ± 0.41 cm2/Vs at 300 °C (by ∼ 17 times). Therefore, the combustion-assisted solution process is expected not only to realize fully low-cost solution-processed electronics by fabricating high-quality SnO2 at low temperatures, but also to be combined with plastic substrates to fabricate flexible electronics.

Large-area photonic lift-off process for flexible thin-film transistors

Fabricating flexible electronics on plastic is often limited by the poor dimensional stability of polymer substrates. To mitigate, glass carriers are used during fabrication, but removing the plastic substrate from a carrier without damaging the electronics remains challenging. Here we utilize a large-area, high-throughput photonic lift-off (PLO) process to rapidly separate polymer films from rigid carriers. PLO uses a 150 µs pulse of broadband light from flashlamps to lift-off functional thin films from glass carrier substrates coated with a light absorber layer (LAL). Modeling indicates that the polymer/LAL interface reaches above 800 °C during PLO, but the top surface of the PI remains below 120 °C. An array of indium zinc oxide (IZO) thin-film transistors (TFTs) was fabricated on a polyimide substrate and photonically lifted off from the glass carrier. The TFT mobility was unchanged by PLO. The flexible TFTs were mechanically robust, with no reduction in mobility while flexed.

High-mobility hydrogenated polycrystalline In2O3 (In2O3:H) thin-film transistors

Oxide semiconductors have been extensively studied as active channel layers of thin-film transistors (TFTs) for electronic applications. However, the field-effect mobility (μFE) of oxide TFTs is not sufficiently high to compete with that of low-temperature-processed polycrystalline-Si TFTs (50–100 cm2V−1s−1). Here, we propose a simple process to obtain high-performance TFTs, namely hydrogenated polycrystalline In2O3 (In2O3:H) TFTs grown via the low-temperature solid-phase crystallization (SPC) process. In2O3:H TFTs fabricated at 300 °C exhibit superior switching properties with µFE = 139.2 cm2V−1s−1, a subthreshold swing of 0.19 Vdec−1, and a threshold voltage of 0.2 V. The hydrogen introduced during sputter deposition plays an important role in enlarging the grain size and decreasing the subgap defects in SPC-prepared In2O3:H. The proposed method does not require any additional expensive equipment and/or change in the conventional oxide TFT fabrication process. We believe these SPC-grown In2O3:H TFTs have a great potential for use in future transparent or flexible electronics applications.

Electron donor or acceptor behavior of a AuCl3 dopant manipulated by dip-pen nanolithography on a MoS2 thin-film transistor

Gold (III) chloride (AuCl3) is a well-known electron acceptor (p-type dopant). Here, the electron donor or acceptor behavior of a AuCl3 dopant on a molybdenum disulfide (MoS2) thin-film transistor (TFT) is demonstrated by line patterning a concentration-adjusted AuCl3 ink with dip-pen nanolithography (DPN). At a low ink concentration (clow) (<3 mM AuCl3), the Au molecules (Au0) are transferred and contact with the MoS2, resulting in an electron donor effect on the MoS2. In contrast, at a high ink concentration (chigh) (≥3 mM), the Au3+ is transferred from the AuCl3 salt loaded on the DPN tip probe and reacts with the MoS2, resulting in an electron acceptor effect. For a clow, the mobility of the MoS2 TFT increases when the Au coverage is larger than 10%. For a chigh, the mobility decreases regardless of the Au coverage. This DPN patterning of the concentration-adjusted AuCl3 inks can be applied to fabricate junction in the local area of MoS2 devices without using complicated lithography. As a result, enhancement of the photoresponse as well as increasing the rectifying behavior of MoS2 devices are demonstrated with the bandgap controlled junction obtained by two direct DPN line patterning operations with the concentration-adjusted AuCl3 inks.

Bias-stress stability of top-gate coplanar a-ITGZO TFTs with HfO2 and HfAlO gate dielectrics

In this study, we investigated the electrical characteristics of amorphous indium–tin–gallium–zinc-oxide thin-film transistors (TFTs) (a-ITGZO TFTs) with HfO2 and HfAlO gate dielectrics. The mobilities of the a-ITGZO TFTs with HfO2 and HfAlO were 32.3 and 26.4 cm2/V &·s, respectively. The TFT with HfO2 showed a subthreshold swing (SS) of 206 mV/dec and a hysteresis window of 0.60 V, and the TFT with HfAlO showed an SS of 160 mV/dec and a hysteresis window of 0.12 V. The hysteresis windows were related to the interface trap density. The TFT with HfO2 was more vulnerable to positive bias stress; in contrast, the TFT with HfAlO operated stably even after it experienced positive and negative bias stresses for 3000 s.

Mechanism of Non-Ideal Transfer Characteristic at Low Drain Voltage in Metal-Capped Amorphous Oxide Thin Film Transistor

Issues of amorphous oxide semiconductors (AOSs) thin-film transistors (TFTs) mainly focus on improving electrical performance and stability. Currently, the hump, the abnormal transfer characteristic, is also an essential factor of AOSs TFT. The hump phenomenon was observed for AOS-TFTs with a metal capping (MC) layer under various measurement conditions. The mobility in the MC TFT was improved from 14.8 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs to 19.2 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs compared to that of the conventional TFTs. The improved electrical characteristics in the MC structure are representative of the carrier injection effect and the change of the current path. This reason reveals that the MC structure has a hump phenomenon under the low drain to source voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{DS}$ </tex-math></inline-formula> ). The hump characteristic does not significantly affect the overall MC TFT characteristics (transfer characteristic, improved electrical characteristics through MC structure, etc.). In addition, it was confirmed that it exhibits very stable hump characteristics through repeated measurements and uniformity. It was found that two current paths are formed mainly due to carrier injection from the metal capping layer in the hump phenomenon observed at low <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{DS}$ </tex-math></inline-formula> . These divided current paths can lead to two on-currents ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$I_{on}$ </tex-math></inline-formula> ) in the transfer curve. Many studies have recently been conducted to fabricate semiconductor devices with multi-values such as 0, 1, and 2. This divided current path could propose a simple method to achieve multi-values with an easy process.

Mist CVD deposited amorphous InSnZnO thin films with different nitrogen/oxygen ratios carrier gases and their applications to thin-film transistors

This study investigates InSnZnO thin films deposited using mist chemical vapor deposition with different nitrogen (N2)/oxygen (O2) ratios of carrier gases. The crystallinity and bandgap of InSnZnO are not affected by the carrier gases; however, the content of the oxygen deficiency of the InSnZnO thin films reduces when the N2/O2 mixed carrier gases have higher oxygen ratio. The InSnZnO thin-film transistor (TFT) shows the highest field-effect mobility (65.04 cm2V−1s−1) when N2 is used as the carrier gas to deposit the InSnZnO thin film. Although the field-effect mobility of the InSnZnO TFT that uses the N2 (60 vol%)/O2 (40 vol%) mixed carrier gas to deposit InSnZnO thin film is the lowest (47.65 cm2V−1s−1), it is still higher than those of the amorphous InGaZnO thin film transistors (∼10 cm2V−1s−1). Furthermore, the InSnZnO TFT using the N2 (60 vol%)/O2 (40 vol%) mixed carrier gas to deposit InSnZnO thin film exhibits the steepest subthreshold slope (102 mV/dec), the largest on/off current ratio (4.6 × 107), and the most stable electrical characteristics after the negative bias stress test for 10,800 s.

High-Performance P-Channel Tin Halide Perovskite Thin Film Transistor Utilizing a 2D-3D Core-Shell Structure.

Metal halide perovskites (MHPs) are plausible candidates for practical p‐type semiconductors. However, in thin film transistor (TFT) applications, both 2D PEA2SnI4 and 3D FASnI3 MHPs have different drawbacks. In 2D MHP, the TFT mobility is seriously reduced by grain‐boundary issues, whereas 3D MHP has an uncontrollably high hole density, which results in quite a large threshold voltage (V th). To overcome these problems, a new concept based on a 2D–3D core–shell structure is herein proposed. In the proposed structure, a 3D MHP core is fully isolated by a 2D MHP, providing two desirable effects as follows. (i) V th can be independently controlled by the 2D component, and (ii) the grain‐boundary resistance is significantly improved by the 2D/3D interface. Moreover, SnF2 additives are used, and they facilitate the formation of the 2D/3D core–shell structure. Consequently, a high‐performance p‐type Sn‐based MHP TFT with a field‐effect mobility of ≈25 cm2 V−1 s−1 is obtained. The voltage gain of a complementary metal oxide semiconductor (CMOS) inverter comprising an n‐channel InGaZnO x TFT and a p‐channel Sn‐MHP TFT is ≈200 V/V at V DD = 20 V. Overall, the proposed 2D/3D core–shell structure is expected to provide a new route for obtaining high‐performance MHP TFTs.

Atomically Thin Tin Monoxide-Based p-Channel Thin-Film Transistor and a Low-Power Complementary Inverter.

Atomically thin oxide semiconductors are significantly expected for next-generation cost-effective, energy-efficient electronics. A high-performance p-channel oxide thin-film transistor (TFT) was developed using an atomically thin p-type tin monoxide, SnO channel with a thickness of ∼1 nm, which was grown by a vacuum-free, solvent-free, metal-liquid printing process at low temperatures, as low as 250 °C in an ambient atmosphere. By performing oxygen-vacancy defect termination for the bulk-channel and back-channel surface of the ultrathin SnO channel, the presented p-channel SnO TFT exhibited good device performances with a reasonable TFT mobility of ∼0.47 cm2 V-1 s-1, a high on/off current ratio of ∼106, low off current of <10-12 A, and a subthreshold swing of ∼2.5 V decade-1, which was improved compared with the conventional p-channel SnO TFTs. We also fabricated metal-liquid printing-based n-channel oxide TFTs such as n-channel SnO2 and In2O3-TFTs and developed ultrathin-channel oxide-TFT-based low-power complementary inverter circuits with the developed p-channel SnO TFTs. The full swing of voltage-transfer characteristics with a voltage gain of ∼10 and a power dissipation of <4 nW for p-SnO/n-SnO2 and ∼120 and <2 nW for p-SnO/n-In2O3-CMOS inverters were successfully demonstrated.

15.2: Invited Paper: Atomic Layer Deposited Oxide Semiconductor Enabling High Mobility and Low Driving Voltage in TFTs

The amorphous indium‐gallium‐zinc oxide (a‐IGZO) thin‐film transistors (TFTs) have become the standard backplane technology for large‐area active‐matrix organic light‐emitting diode (AMOLED) TV. The high‐end mobile OLED demands the high mobility of ∼100 cm2/Vs. So far, the various approaches to improve the mobility of electron carriers in IGZO TFTs have been researched, including the optimization of cation composition, stacked channel structure, and the lattice ordering‐induced crystallization. In this paper, we presented our recent efforts toward the high‐performance and good reliability for IGZO TFTs, which is based on the atomic layer deposition process. First, the merits of the ALD‐derived IGZO compared to sputtered IGZO in terms of the electrical performance of IGZO TFT were investigated. Second, the quantum confinement effect in the IGZO heterojunction channel stacks was exploited, leading to 2DEG‐like high mobility. Finally, the IGZO TFTs with the high‐mobility and low‐driving‐voltage was realized through the bilayer IGZO channel and HfO2‐based gate dielectric stack.

Effect of Polypyrimidine Structure and Purity of Semiconducting SWCNTs on Thin‐Film Transistor Performance

AbstractAdvancements in the selective isolation and purification of semiconducting single‐walled carbon nanotubes (SWCNTs) through the use of conjugated polymers have allowed for incorporation of high‐quality SWCNTs into solution‐processed thin‐film transistors (TFTs). In this study, copyrimidine‐alt‐diethynyl, copyrimidine‐alt‐carbazole, and copyrimidine‐alt‐dioctylfluorene that are capable of selectively dispersing semiconducting SWCNTs are reported and obtained polymer/SWCNTs dispersion solution is applied to TFTs for observing relationship between carrier mobilities and purity of sc‐SWCNTs. The exceptional sc‐SWCNT purity of the dispersion is confirmed by UV‐vis and Raman spectroscopy, of which the pyrimidine‐alt‐fluorene polymer‐selected sc‐SWCNT purity is up to 99.9%. On the contrary, among the average carrier mobility of TFTs prepared by the polymer‐SWCNT complex, the carrier mobility based on the pyrimidine‐alt‐ethynyl complex is the highest (4.47 cm2 V−1 s−1). The results indicate that the relationship between carrier mobility and sc‐SWCNTs purity reveals that polymer structure has great impact more than sc‐SWCNTs purity.

Ultrathin Mg0.05Sn0.95O x -Based Thin-Film Transistor by Mist Chemical Vapor Deposition

The 5-nm-thick Mg0.05Sn0.95O x thin film deposited using mist chemical vapor deposition is used as a channel layer of the thin-film transistor (TFT). Mg0.05Sn0.95O x improves the crystallinity, reduces the number of oxygen deficiencies, and enlarges the energy bandgap compared with SnO2. Mg0.05Sn0.95O x -based TFT shows higher field-effect mobility (144.9 cm2V−1s−1), steeper subthreshold slope (134 mV/decade), and significant ON/OFF current ratio (>109) than the SnO2-based TFT. Owing to fewer oxygen-related defects, wide energy bandgaps, and stable Mg-O chemical bonding, the Mg0.05Sn0.95O x -based TFT exhibits more stable electrical performance than the SnO2 TFT after negative bias illumination stress testing. These results suggest that Mg0.05Sn0.95O x is a promising material for high electron mobility TFT applications.

Enhancement of Photodetective Properties on Multilayered MoS2 Thin Film Transistors via Self-Assembled Poly-L-Lysine Treatment and Their Potential Application in Optical Sensors.

Photodetectors and display backplane transistors based on molybdenum disulfide (MoS2) have been regarded as promising topics. However, most studies have focused on the improvement in the performances of the MoS2 photodetector itself or emerging applications. In this study, to suggest a better insight into the photodetector performances of MoS2 thin film transistors (TFTs), as photosensors for possible integrated system, we performed a comparative study on the photoresponse of MoS2 and hydrogenated amorphous silicon (a-Si:H) TFTs. As a result, in the various wavelengths and optical power ranges, MoS2 TFTs exhibit 2~4 orders larger photo responsivities and detectivities. The overall quantitative comparison of photoresponse in single device and inverters confirms a much better performance by the MoS2 photodetectors. Furthermore, as a strategy to improve the field effect mobility and photoresponse of the MoS2 TFTs, molecular doping via poly-L-lysine (PLL) treatment was applied to the MoS2 TFTs. Transfer and output characteristics of the MoS2 TFTs clearly show improved photocurrent generation under a wide range of illuminations (740~365 nm). These results provide useful insights for considering MoS2 as a next-generation photodetector in flat panel displays and makes it more attractive due to the fact of its potential as a high-performance photodetector enabled by a novel doping technique.

Formulation and characterization of screen printable dopant ink for fabrication of polysilicon TFTs

To move the promise of printed electronics from the laboratory to volume production required adopting a new approach eliminating ink-jet printing and adopting instead a hybrid mature print and conventional process. Novel screen printable N+ and P+ dopant inks were developed to fabricate polysilicon thin film transistors (TFTs). Semiconductor-grade dopant inks were formulated from a combination of thermoset plastic with boron and phosphor compounds. Inks were screen printed on polysilicon active islands on a 300 mm square stainless-steel foil substrate. The drain and source of the top gate TFTs were then formed via a thermal anneal activation. The residue after annealing was removed with an inoffensive process to avoid damage to the thin silicon layer and gate oxide. Doping was uniform across 300 mm sheet substrate. The sheet resistance was modulated to 200 Ω sq−1 for the N+ and 1000 Ω sq−1 for the P+ active layer. Field mobility of polysilicon TFTs fabricated using this screen-printed dopant process were 80 cm2V s−1 for PMOS and 200 cm2V s−1 for NMOS using low-cost, mature equipment, and an easily manageable process that is both scalable and compatible with roll-to-roll manufacturing.

Realization of low-power and high mobility thin film transistors based on MoS2 layers grown by PLD technique

Molybdenum disulfide (MoS2) layers have been successfully grown and optimized for the realization of low power thin film transistors (TFTs) using catalysis free, economical and environment-friendly pulsed laser deposition (PLD) technique on comparably large sized passivated silicon (SiO2/Si) substrate of area 1.2 cm×1.0 cm. Growth of MoS2 monolayer is confirmed by reflection high-energy electron diffraction (RHEED), Raman spectroscopy, photoluminescence (PL) analysis and atomic force microscopy (AFM). The effect of planar electrodes of different metal system (Au/Ag, Pt/Ti, Al, Ni) on the electrical characteristics of MoS2 layers have been inspected in detail. Au/Ag bilayer system proved to be the best electrode for efficient charge injection into the MoS2 layers. A Back-gated field effect transistor (FET) was fabricated with Au/Ag was used as source-drain contacts and MoS2 as the semiconducting channel has been successfully developed. The fabricated transistor shows an accumulation electron mobility around 44.6 cm2 V-1s−1, current ION/OFF ratio of 1.4×105, subthreshold slope of nearly 360 mV/dec, interface trap density of 1.18×1012 /cm2eV and robust current saturation at lower Vds, suggesting that fabricated devices can be used in making low power switching devices.