Temperature Shock Tests Research Articles

A method for wafer level hermetic packaging of SOI-MEMS devices with embedded vertical feedthroughs using advanced MEMS process

This paper presents a novel, inherently simple, and low-cost fabrication and hermetic packaging method developed for SOI-MEMS devices, where a single SOI wafer is used for the fabrication of MEMS structures as well as vertical feedthroughs, while a single glass cap wafer is used for hermetic encapsulation and routing metallization. Hermetic encapsulation can be achieved either with the silicon-glass anodic or Au–Si eutectic bonding techniques. The dies sealed with anodic and Au–Si eutectic bonding provide a low vertical feedthrough resistance around 50 Ω. Glass-to-silicon anodically and Au–Si eutectic bonded seals yield a very stable cavity pressure below 10 mTorr with thin-film getters, which are measured to be stable even after 311 d. The package pressure can be adjusted from 5 mTorr to 20 Torr by using different outgassing, cavity depth, and gettering options. The packaging yield is observed to be around 64% and 84% for the anodic and Au–Si eutectic packages, respectively. The average shear strength of the anodic and eutectic packages is measured to be higher than 17 MPa and 42 MPa, respectively. Temperature cycling, high temperature storage, and ultra-high temperature shock tests result in no degradation in the hermeticity of the packaged chips, proving perfect thermal reliability.

Advanced MEMS Process for Wafer Level Hermetic Encapsulation of MEMS Devices Using SOI Cap Wafers With Vertical Feedthroughs

This paper reports a novel and inherently simple fabrication process, so-called advanced MEMS ( aMEMS ) process, that is developed for high-yield and reliable manufacturing of wafer-level hermetic encapsulated MEMS devices. The process enables lead transfer using vertical feedthroughs formed on an Silicon-On-Insulator (SOI) wafer without requiring any complex via-refill or trench-refill processes. It requires only seven masks to fabricate the hermetically capped sensors with an experimentally verified process yield of above 80%. Hermetic encapsulation is achieved by Au–Si eutectic bonding at 400 °C, and the pressure inside the encapsulated cavity has been characterized to be as low as 1 mTorr with successfully activated thin-film getters. The pressure inside the encapsulated cavity can also be adjusted in the range of 1 mTorr-5 Torr by various combinations of outgassing and gettering options in order to satisfy the requirements of different applications. The package pressure is being monitored for the selected chips and is observed to be stable below 10 mTorr since their fabrication about 10 months ago. The shear strengths of several packages are measured to be as high as 30 MPa with average shear strength of 22 MPa, indicating a mechanically strong bonding. The robustness of the packages is tested by thermal cycling between 100 °C and 25 °C, and absolutely no degradation is observed in the hermeticity and the package pressure. The package pressure is also verified to remain unchanged after storing the packages at a high storage temperature of 150 °C for 24 h. Furthermore, the packaged chips are observed to withstand a high temperature shock test performed at 300 °C for 5 min, at the end of which the characteristics of the encapsulated sensor indicates that the package still remains hermetic (no detectable leaks) and also the package pressure remains constant at $\sim 20$ mTorr. [2014-0338]

Investigation of the effects of LIFT printing with a KrF-excimer laser on thermally sensitive electrically conductive adhesives

Laser induced forward transfer is an emerging material deposition technology. We investigated the feasibility of this technique for printing thermally sensitive, electrically conductive adhesives with and without using an intermediate dynamic release layer. A 248 nm KrF-excimer laser was used to print the epoxy-based conductive adhesives containing silver flakes down to 75 μm dot size. The process is particularly relevant for realizing electrical connections to surface mount devices in the microelectronics industry. Characterization of the printed materials was analyzed by Fourier transform infrared spectroscopy, four-point electrical measurements, die-shear testing and temperature shock testing, to establish that the properties of the adhesive were not affected by direct or indirect laser irradiation. The lack of degradation by the laser onto the adhesives confirms the potential of this technique for interconnection applications.

Corrosion Resistance of Sintered NdFeB Magnets with Various Surface Coatings

Pure Ni coating and multi-layered Ni-P coatings were deposited on sintered NdFeB magnets by ion beam sputtering and electroless plating to improve the corrosion resistance of magnets, respectively. The structure and preferred growth orientation, surface morphology, the adhesive strength between coatings and magnets, and corrosion properties of samples were investigated by XRD, SEM, high-low temperature shock test and potentiodynamic polarization curves, respectively. It was found that electroless Ni-P coatings are amorphous with nodules distributed, Ni coating deposited by ion beam sputtering is crystalline and spherical Ni grains are densely packed. Ni coating deposited by ion beam sputtering can provide better protection for sintered NdFeB than that of electroless Ni-P coating.

Preparation of a prototype radioactive probe for treatment of lacrimal ducts stenosis and a study of its dose distribution.

Our aim was to prepare a radioactive lacrimal passages probe, study its dose distribution in a phantom and suggest security indexes and therapeutic effective doses for brachytherapy. We prepared the radioactive probes by laying 125I particles into plastic tubes. We conducted temperature tests, pressure tests, soak tests and shock tests, to obtain security indexes. The dose distributions in phantom and wax matrix were also detected, and the surface dose rates on different parts of the phantom and the dose absorbed by the operator were examined. The radioactive lacrimal passage probe demonstrated no form changes in temperature tests, pressure tests and soak tests when using a surface radioactive contamination dose lower than 185 Bq. The probe was waferinged in shock tests with a surface radioactive contamination dose lower than 185 Bq. The dose detection in the phantom and the wax matrix showed that for distances of 1 mm-12 mm off the tube, there were statistical differences of the absorbed dose (P<0.05). However, for the range of 12 mm-40 mm, there was no statistical difference (P>0.05). The dose rates administered by the radioactive probe used for radiotherapy to the lacrimal passages were within safe limits both for the phantom (Sichuan Keyi Corporation, China) and the operator. In conclusion, our study showed that this prototype lacrimal passages probe can be a useful and effective method for clinical brachytherapy of lacrimal ducts stenosis.

Assessment of Aging Properties of Anti-Scratch Coatings by Nanoindentation

The assessment of aging properties of organic coatings on plastics is critical to the using safety and service life evaluation. This paper was dedicated to evaluate the aging properties, including humidity-heat and temperature shock tests, of various anti-scratch silicon coatings deposited on polycarbonate (PC) by adhesion and nanoindentation measurements. Adhesion behaviors through conventional cross-cut and tap peel tests reveal that there are no obvious changes of these coatings after aging experiments, all ranked as 5B. However, the changes of nanomechanical properties (elastic modulus and hardness) of coatings on PC after aging tests are obvious different for these coatings. Base on these results, it is proved that nanoindetation technique could be an available method to assess aging behaviors of thin coatings.

Reliability Failure Analysis of PCB and its Technological Improvement

Reliability failure analysis is extremely important in the manufacturing process of PCB (Printed Circuit Board). In this paper, we use thermal shock test method to analysis the electrical interconnection reliability of PCB in harsh environment. Also taking into account the reliability of PCB is closely related to its design and technology, approaches of technological improvement are proposed. Finally through temperature shock test method, the results show that the reliability of PCB designed with improved technology is enhanced.

Failure Mechanism Analysis of Multilayer Chip Inductors

The common failure modes and failure mechanisms of multilayer chip inductors were studied and a detailed study on the open-circuit failure mechanism, the short-circuit failure mechanism and the mechanism of poor tinning was made in this paper. Then some prevention and improvement measures were given. At last, combined with the pulse current test, the temperature shock test, the resistance to soldering heat and the resistance to dissolution of metallization test, the experiments results indicated that the relevant failure mechanisms were correct.

The properties of aluminium coating on sintered NdFeB by DC magnetron sputtering

Pure aluminium coating was deposited on sintered NdFeB magnets by direct current (DC) magnetron sputtering to improve the corrosion resistance. The corrosion behaviour of sintered NdFeB coated with aluminium was characterized by potentiodynamic polarization measurement. The adhesive strength between the aluminium coating and the sintered NdFeB was characterised by vertical tensile test and high-low temperature shock test. The influence of the coating on the magnetic properties of the sintered NdFeB was also characterised. It was found that the aluminium coating can improve the corrosion resistance of the sintered NdFeB evidently. The aluminium coating was well adhesive with the substrate and did not deteriorate the magnetic properties of the sintered NdFeB magnets. These two characters may overcome the disadvantages of NiCuNi coating which is usually electroplated on NdFeB in industry.

Supercapacitor ageing at constant temperature and constant voltage and thermal shock

This paper presents supercapacitor ageing according to the voltage, the temperature and thermal shock tests. To investigate this effect, a test bench of accelerated supercapacitor calendar ageing was carried out. Experimental tests are realized at constant temperature when the supercapacitors are polarized at the maximum voltage. To quantify the supercapacitor ageing, the equivalent series resistance (ESR) and the equivalent capacitance (C) are measured using the DC and AC characterization. To lead to the determination of the supercapacitor lifetime, Arrhenius law, that describes the effect of temperature on the velocity of a chemical reaction, is considered. Finally, experimental results of supercapacitor thermal shock are presented.

Reliability test and failure analysis of high‐density packages assembled with a low‐temperature lead‐free solder (SnBiAg)

PurposeThe High Density Packaging Users Group Consortium has conducted a study of process development and solder‐joint reliability of high‐density packages on printed circuit boards (PCB) using a low‐melting temperature lead‐free solder. The purpose of this paper is to investigate the reliability tests (e.g. temperature cycling and shock and vibration) and failure analysis (FA) of high‐density packages on PCB with the low‐melting temperature lead‐free solder (Sn‐57 wt%Bi‐1 wt%Ag).Design/methodology/approachThe design for reliability, materials, and assembly process aspects of the project have been discussed in “Design, materials, and assembly process of high‐density packages with a low‐temperature lead‐free solder (SnBiAg)” also published in this journal issue. In this study, reliability tests (e.g. temperature cycling and shock and vibration) and FA of high‐density packages on PCB with the low‐melting temperature lead‐free solder (Sn‐57 wt%Bi‐1 wt%Ag) are investigated.FindingsLead‐free solder‐joint reliability of high‐density packages, such as the PBGA388, PBGA256, PBGA208, PBGA196, PBGA172, PQFP80, and TSSOP56 were determined by temperature cycling, shock, and vibration tests. Temperature cycling test data for over 8,100 cycles between 0 and 100°C in a 44 min. cycle were statistically analyzed. Shock and vibration test data based on the HP Standard Class Bi‐II Products SPEC have also been reported.Originality/valueCurrently there is a lack of experimental and simulation data and field experience in respect of one of the critical issues for industry – that of solder joint reliability in lead‐free soldering. The paper contains some important research results and recommendations.

Reliability assessment for SnPb solder and Ag‐Pd bond pad metallization

PurposeTo predict the reliability life for SnPb solder and Ag‐Pd bond pad metallization. The aim of selected artificial aging using temperature shock test (TST) and high temperature storage test (HTS). These tests are produced in a short time, the same deterioration in solder joint strength that would occur by natural aging in the actual field condition of up to 10 years or 5,000 h service life.Design/methodology/approachThis paper using Arrhenius model describes the results of TST and HTS. The TST is aimed to verify the resistance of the assembly to cyclic temperature loading. The HTS test is aimed to check the effect of inter‐diffusion between solder and component and substrate finish, on the mechanical strength of the joints. The paper is organized in four sections: introduction, experimental procedure, experimental results and discussion, conclusion and recommendation.FindingsThe accelerated aging procedures used in this study had successfully modified mainly the outer surface and the interface between a solderable coating and the base metal. The tests that rely on higher temperature increase the diffusivity and the reactivity of the species and so modify internal interfaces such as the intermetallic compound layer, as well as the surface oxide layer. This has provided an effective screening test in understanding the reliability field performance.Research limitations/implicationsFor future work it is recommended to run HTS at 175C to validate the estimate for the effective activation energy for diffusion. Next, perform scanning electron microscopy &amp; energy dispersive X‐ray (SEM/EDX) analysis to compare results at 150C for SMD components and studs and explain the different behaviour. Finally, continue T‐shock testing to 2000 cycles.Practical implicationsThis has provided an effective screening test in understanding the reliability field performance.Originality/valueThis paper provides a cost effective and practical procedure in screening test for SnPb Solder and Ag‐Pd bond pad metallization. It is an effective solution to electronic manufacturing industry.

Coatings on plastics with the PICVD technology

Plasma impulse chemical vapor deposition (PICVD) was developed by Schott more than 10 years ago. It was the first CVD – based coating technology for the mass production of optical coatings on glass components (cold light mirrors, infrared reflective coatings and others). During the last few years, a modified PICVD-process for the deposition of three different functional coatings on plastics has been developed. These functions—anti-reflective, anti-scratch and easy-to-clean layers—are provided by only one technology—PICVD. This is a major progress compared for instance to the standard production line of polymer based eyeglass lenses, which uses a PVD process for anti-reflective coating, dip coating for anti-scratch and plasma polymerization for easy-to-clean coatings. Moreover, the development was extended to different kinds of plastics including optical polymers like polymethylmethacrylate (PMMA) and polycarbonate (PC). Until now, plasma CVD coating technologies were not capable of depositing durable functional coatings on PMMA with a sustained adhesion to the substrate. A completely new layer system on PMMA with an adapted adhesive layer has been developed for these coatings. Durability has been proven by passing different types of functionality tests like tape test, grid test, climate tests or temperature shock tests. In the near future, Schott will start the first mass-production of coatings on plastics with the PICVD technology, e.g. in the telecommunications and automotive business.

Low-cost flip-chip on board

For hand-held communication products, like the DECT telephone system, flip-chip on board offers minimization of both the package size and the occupied area on the boards. As a result of the reduction in interconnection lengths, the self-inductance is reduced. For high volume production, the compatibility of the flip-chip mounting technique with standard surface mount technology (SMT) reflow is essential. During reflow, the eutectic PbSn bump wets along the copper track, so the stand-off between integrated circuits (IC's) and the board is accurately defined by the layout of the board and the dimensions of the bump. The eutectic PbSn flip-chip processing is evaluated by impedance and cross-talk measurements, and in several reliability tests. For the electrical measurements, a zero-IF front-end IC is used. Wide-band measurements of the input impedance showed that the residual parasitics associated with the eutectic PbSn bumps are negligible compared with the parameters of the internal IC components. To accommodate the residual stresses from differences in coefficient of thermal expansion (CTE), the gap between the IC and the substrate is underfilled. This underfill material marginally affects the electrical behavior of the IC at frequencies up to a few GHz. As expected, a slight increase in the residual capacitance is observed. The effect of the underfill is studied by both temperature cycle and shock tests; cumulative failure distributions have been plotted. Results show that the adhesion properties and flow characteristics of the underfill material are the dominating factors for the number of cycles to failure. By selecting the proper underfill and curing conditions, the eutectic PbSn flip-chip construction can meet the test requirements for consumer communication products.

Inner lead gang-bonded devices with stacked Ni-Au bumps

Tape automated bonding (TAB) is a technique which is characterized by a small lead pitch, a small size, and a good high frequency behavior. To bond the inner leads of the TAB foil on the straight wall bumps on the integrated circuit (IC), thermocompression gang bonding is usually applied. If simple thin silicon nitride passivation layers are used, cracks are often observed in the sputtered TiW barrier layer (beneath the bump) and in the passivation layer of the IC. A theoretical model has been used to describe the deformation of the bump-lead structure. Comparison of this model with experimental results of the cracking behavior shows that both stress and strain at the bond pad-bump interface exceed the critical values for cracking. Plastic deformation at the bondpad is avoided if a two layer Ni-Au bump structure is used. While the plastic deformation required at the bond interface is kept constant, nickel layers with a thickness of at least 10 /spl mu/m are required to avoid even the smallest cracks. If the gold layer thickness is at least 15 /spl mu/m, the resulting bond strength is comparable with that of standard gold bumps. Deformation of the leads is restricted within acceptable limits, and the long-term reliability is not affected. Accelerated testing has been performed by high temperature storage, pressure cooker and air-to-air temperature shock testing. >