Step-down Switched-capacitor DC-DC Converter Research Articles

On optimization of manufacturing of a step-down DC-DC converter to increase integration density of elements

<p>We consider possibility to increase field-effect transistor's density in a switched-capacitor step-down DC-DC converter. Based on this approach we analyzed manufacturing of the converter in a heterostructure with special structure. Some specific sections of the heterostructure must be doped by ion implantation or by diffusion. After this procedure optimized annealing has been done. We also obtained conditions for decreasing of mismatch-induced stress value in this heterostructure. An analytical approach for analysis of heat and mass transport in multilayer structures has been introduced. The approach gives a possibility without crosslinking of solutionson interfaces between layers, take into account (i) spatial variation of parameters of considered processes; (ii) temporal variation of parameters of considered processes; (iii) nonlinearity of considered processes; (iv) mismatch-induced stress.</p>

On Approach to Increase Integration Rate of Elements of a Switched-capacitor Step-down DC-DC Converter

On Approach to Increase Integration Rate of Elements of a Switched-capacitor Step-down DC-DC Converter

A Fully Integrated Step-Down Switched-Capacitor DC–DC Converter With Dual Output Regulation Mechanisms

This letter proposes a fully integrated step-down switched-capacitor (SC) DC-DC converter using 0.18- $\mu \text{m}$ CMOS technology for system-on-chip applications. The proposed step-down switched-capacitor DC-DC converter used two control mechanisms: the switch array modulation technique to regulate the output voltage and the voltage ripple modulation technique to adjust the output voltage ripple of the converter as the loading current varied. As a result, the proposed converter could generate a regulated output voltage with low voltage ripple. The converter core performed at conversion ratios of 1/3 and 1/2 under an input voltage of 1.8 V. The measurement results on 180-nm technology showed that the proposed fully integrated step-down switched-capacitor DC-DC converter could achieve a peak power conversion efficiency of 74.1% and maintain power conversion efficiency at levels over 70% within loading ranges between 1.4 and 5 mA. The output voltage ripple was controlled at levels under 63.4 mV within a loading current ranging between 0.1 and 5 mA.

Smart power management with combined current-feedback low-dropout voltage regulator and switched capacitor DC-DC converter in 180 nm CMOS

Achieving high efficiency over a wide range of input voltages for digital signal processing modules is a key focus in integrated electronic system applications. This paper proposes a current-feedback low-dropout (LDO) voltage regulator functioning in parallel with a step-down switched capacitor DC-DC converter to implement a smart power management in 180 nm CMOS technology. The proposed switched capacitor DC-DC converter is divided into four cell to reduce the output voltage ripple. The smart power management delivers a 0.71 V power supply with an efficiency as high as 69.4% while maintaining tolerable ripple, and operates over a wide input voltage range of 1.1 V–3.0 V while occupying only 1.5 mm2. The highest value of ripple is only 14 mV. Measurement results confirm that the proposed implementation achieves a higher efficiency and wider input voltage range than conventional implementations.

A dual mode step-down switched-capacitor DC-DC converter with adaptive switch width modulation

This paper proposes a step-down switched-capacitor (SC) DC-DC converter with pulse frequency modulation (PFM) and burst mode. This design proposes a novel dual mode control strategy to achieve high performance over a wide load range. PFM is adopted at heavy load to achieve the small output voltage ripple while burst mode is adopted at light load to improve transient response and power efficiency. To further improve the efficiency, an adaptive switch width modulation (ASWM) is proposed to reduce switching losses. The measured results show that the proposed four conversion ratios converter can operate with a 2.0–3.6 V input voltage range, load current from 0 to 2 mA at the output voltage of 1.2 V. The peak power efficiency is up to 84.2% from a 2.7 V input voltage supply at a load current of 2 mA. At a load of 60 μA, the burst mode achieves an 11% maximum efficiency improvement, and the average efficiency improvement of 6% is achieved with ASWM.

Wide input range hybrid DC-DC conversion system for solar energy harvesting

Presented is a wide input range hybrid DC-DC conversion system designed for use in solar energy harvesting. The proposed architecture achieves high conversion efficiency over a wide 2.6V input voltage (from 0.7 to 3.3V) for an output of 0.7V. The proposed system is optimally designed for solar energy harvesting systems. The combination of a variable conversion ratio switched-capacitor step-down DC-DC converter and a low drop-out voltage regulator makes the drop-out voltage lower. A power multiplexer and a voltage doubler reduce the power dissipation of the entire system.

A New Approach to Reducing Output Ripple in Switched-Capacitor-Based Step-Down DC–DC Converters

Rapidly dropping power supply voltages and tight voltage regulation requirements for integrated circuits challenges power supply designers. A novel interleaved discharging (ID) approach is presented to reduce the output ripple in step-down switched-capacitor (SC) dc-dc converters. Simulation and experimental results of a four-stage SC dc-dc converter show that the ID approach can reduce the output ripple by a factor of three. The proposed approach also improves the converter efficiency by 7%. The ID method provides flexibility in the design optimization of step-down SC dc-dc converters

Design of a Step-Down Switched-Capacitor DC-DC Converter with Charge-Average Processes

A step-down DC-DC converter with charge-average processes is proposed in this paper. The converter is designed by using switched-capacitor (SC) techniques. Different from conventional converters such as a series-parallel type power converter and a Dickson-type power converter, the ripple noise of the proposed converter is small, because the output voltage is always obtained irrespective of the states of the clock pulses. The output voltage of the proposed converter is expressed by (Q/P) × Vin (P ∈{1, 2,..., N} and Q∈{1, 2,..., N}). Furthermore, when the number of the capacitors is small, the hardware-cost for the proposed circuit is less than that for the conventional converters such as a series-parallel type power converter and a ring-type power converter. Concerning 3-stage power converters, SPICE simulations are performed to confirm the validity of the circuit design. For the input voltage 3.6 V, the power efficiency of the proposed circuit is 92.7 % in the output current about 320 mA.

Mathematical analysis of [formula omitted] step-down switched-capacitor DC-DC converter with low ripple

In 1990, a new 1 2 step-down switched-capacitor type DC-DC converter was proposed by Ueno and others. This converter is well known that its ripple is small, but the method of its optimum design is not known. In this paper, we obtain various data required for the design by analyzing mathematically this converter. As a result, it becomes clear that if certain conditions hold, this converter is little influenced by the values of the capacitors, and that its output voltage is very stable.