Superconducting Logic Circuits Research Articles

Macromodeling of Josephson logic circuits

A scheme for macromodeling superconducting logic circuits is presented which takes into account propagation effects along transmission lines. Simulations performed on a desktop computer illustrate the importance of signal propagation in Josephson circuits. The efficiency of the simulator is compared with ASTEC III on some test circuits.

A superconducting sampler for Josephson logic circuits

A method is described for automating a technique which is used to sample transition duration (rise time) in superconducting logic circuits. The method is based on measuring the time at which a biased Josephson junction switches under the influence of an applied signal. The system transition duration is limited primarily by time jitter which is estimated to be 7 ps. Transition durations of as little as 9 ps have been observed.