Subthreshold Regime Research Articles

(Invited) Improved Thin Film Transistor Model Predicts TFT Operation in the THz Range

Novel Thin-film-transistor (TFT) TFT materials such as ZnO, InGaZnO, AMO-CNT, and organic materials dramatically improved the achieved and projected TFT performance. The low field mobility of oxide materials has reached values comparable to those for short-channel Si CMOS. The effects related to electron inertia and electron density oscillations in field effect transistors channels (FETs) diminish the role of the low field mobility as a figure of merit in short channel devices making the performance gap between TFTs and Si CMOS smaller enabling high frequency TFT applications even reaching sub-THz and THz frequencies (for the operating regimes using the rectification of the plasma oscillations. We report on an improved compact model based on the RPI TFT model [1] and using the Unified Charge Control Model (UCCM). [2, 3] This model accounts for a non-exponential slope in the subthreshold regime by introducing a varying subthreshold slope and accounts for non-trivial capacitance dependence on the gate bias. It also accommodates the inclusion of the parasitics related to the gate impedance. These new features allowed us to obtain an excellent agreement with the measured I-V/C-V characteristics for both long and short n-channel and p-channel TFTs. The application of this new TFT model to the analysis of the TFT response requires accounting for non-local potential distribution in the device channel. This is achieved by using a multi-segment nonlinear transmission line model of the TFT channel reproducing the approach that has been previously used for the THz SPICE/ADS Si CMOS model implementation. As a possible application example, we simulated a TFT complementary inverter. Our simulations showed that using the phase-matched THz signal feeding should yield a very sensitive detection of THz radiation impinging on a short channel TFT. These results show that the TFT RFID and other applications could be extended into the THz range of frequencies.

(Invited) Improved Thin Film Transistor Model Predicts TFT Operation in the THz Range

Novel materials such as ZnO, InGaZnO, AMO-CNT, and organic materials and improved fabrication processes dramatically enhanced the achieved and projected thin film transistor (TFT) performance. The effective field-effect mobility of metal oxide TFT materials has reached values comparable to those for short-channel Si CMOS. We report on an improved compact model based on the RPI TFT model, the unified charge control model (UCCM), and the multi-segment TFT compact model. This improved model accounts for a non-exponential slope in the subthreshold regime by introducing a varying subthreshold slope and accounts for non-trivial capacitance dependence on the gate bias. The application of this new TFT model to the analysis of the TFT response showed that a TFT complementary inverter using the phase-matched THz signal feeding should yield a very sensitive detection of THz radiation impinging on a short channel TFT.

Electronic transport in doped and dielectric inserted MLGNR interconnects: Crosstalk induced delay and stability analyses at sub-threshold regime

A simplified equivalent distributed temperature-dependent RLC circuit model of coupled multilayer graphene nanoribbon (MLGNR) interconnects has been discussed by considering the relaxation time induced mean free path (MFP), and its impact on line resistance (R) has been examined in detail. Further, the performance of copper, undoped, doped and dielectric inserted MLGNRs has been compared in terms of crosstalk induced delay and frequency response at sub-threshold operating conditions. It is revealed that the various scattering mechanisms (acoustic scatterings, edge roughness etc.) control the overall MFP in undoped and doped MLGNRs, however, the electron MFP in dielectric inserted MLGNRs depends on surrounding dielectric environment. Out of the five different cases of dielectric inserted MLGNRs, the insertion of hafnium oxide (HfO2) between GNR layers, along with silicon dioxide (SiO2) provides the best performance characteristics. To obtain minimum crosstalk delay at the subthreshold operating mode, copper, undoped, doped, and dielectric inserted MLGNRs have been optimized for thicknesses of 36, 38.25, 41.4, and 43.65 nm.

Modeling Non-Equilibrium Ion-Transport in Ion-Selective-Membrane/Electrolyte Interfaces for Electrochemical Potentiometric Sensors

We present an approach to simulate ion’s drift and diffusion in chemical sensors based on ion-selective-membranes (ISMs) in either ion-selective electrode structures or coupled to field-effect transistors. The model is used to analyze the sensitivity, selectivity, and transient response of ISMs in non-equilibrium conditions upon real-time concentration changes. Our simple implementation combines advanced features from semiconductor theory and analytical electrochemistry, such as the Schafetter-Gummel discretization scheme and Chang-Jaffé boundary conditions for ions at the interfaces, thus allowing to perform simulations beyond sensing. The results are in agreement with experimental transient responses reported in the literature. As relevant case studies, we examine the ISM preconditioning in miniaturized sensors and the electrostatic interaction between the FET channel and ISMs. In the first case, simulations reveal that calibration curves performed on incomplete ISM conditioning can lead to hysteretical responses when the ion affinity in the electrolyte and ISM is similar (e.g., with organic ions). In the second case, we find that the gate oxide field in contact with the ISM affects the device characteristics such that the ion concentrations not only change the FET threshold voltage but also the slope of its IV curve. This effect can be minimized by working in the subthreshold regime or using extended gates.

Electrical contact properties between Yb and few-layer WS2

The charge injection mechanism from contact electrodes into two-dimensional (2D) dichalcogenides is an essential topic for exploiting electronics based on 2D channels, but remains not well understood. Here, low-work function metal ytterbium (Yb) was employed as contacts for tungsten disulfide (WS2) to understand the realistic injection mechanism. The contact properties in WS2 with variable temperature (T) and channel thickness (tch) were synergetically characterized. It is found that the Yb/WS2 interfaces exhibit a strong pinning effect between energy levels and a low contact resistance (RC) value down to 5 kΩ μm. Cryogenic electrical measurements reveal that RC exhibits weakly positive dependence on T until 77 K as well as a weakly negative correlation with tch. In contrast to the non-negligible RC values extracted, an unexpectedly low effective thermal injection barrier of 36 meV is estimated, indicating the presence of significant tunneling injection in the subthreshold regime and the inapplicability of the pure thermionic emission model to estimate the height of the injection barrier.

Specific features of radiation flux formation in diode-pumped lasers and amplifiers with active elements made of Nd : YAG ceramics

The spatial, temporal, and spectral characteristics of the output radiation of diode-pumped laser systems and optical amplifiers with active elements made of Nd : YAG ceramics are studied. It is shown that the divergence of radiation in the subthreshold regime has the form of concentric nested cones emerging from the active element (AE) faces at angles of 2 – 4 °. A model explaining the experimentally observed phenomenon is proposed based on the mechanism of scattering of the generated beam from the granular structure of the optical ceramics. Analysis of the divergence pattern makes it possible to estimate the grain size and the optical quality of ceramics. The output beam divergence in the lasing regime is determined mainly by the cavity parameters and does not exceed several milliradians. The scattering events in this case serve as sources of additional optical losses. Luminescence enhancement and parasitic oscillations in the AE volume restrict the possibility of using Nd : YAG ceramics for fabricating AEs of high-power optical amplifiers.

Fault-tolerant fidelity based on few-qubit codes: parity-check circuits for biased error operators

In the shallow sub-threshold regime, fault-tolerant quantum computation requires a tremendous amount of qubits. In this paper, we study the error correction in the deep sub-threshold regime. We estimate the physical error rate for achieving the logical error rates of $10^{-6} - 10^{-15}$ using few-qubit codes, i.e.~short repetition codes, small surface codes and the Steane code. Error correction circuits that are efficient for biased error operators are identified. Using the Steane code, when error operators are biased with a ratio of $10^{-3}$, the logical error rate of $10^{-15}$ can be achieved with the physical error rate of $10^{-5}$, which is much higher than the physical error rate of $10^{-9}$ for depolarising errors.

An Accurate, Error-Tolerant, and Energy-Efficient Neural Network Inference Engine Based on SONOS Analog Memory

We demonstrate SONOS (silicon-oxide-nitride-oxide-silicon) analog memory arrays that are optimized for neural network inference. The devices are fabricated in a 40nm process and operated in the subthreshold regime for in-memory matrix multiplication. Subthreshold operation enables low conductances to be implemented with low error, which matches the typical weight distribution of neural networks, which is heavily skewed toward near-zero values. This leads to high accuracy in the presence of programming errors and process variations. We simulate the end-to-end neural network inference accuracy, accounting for the measured programming error, read noise, and retention loss in a fabricated SONOS array. Evaluated on the ImageNet dataset using ResNet50, the accuracy using a SONOS system is within 2.16% of floating-point accuracy without any retraining. The unique error properties and high On/Off ratio of the SONOS device allow scaling to large arrays without bit slicing, and enable an inference architecture that achieves 20 TOPS/W on ResNet50, a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$&gt; 10\times $ </tex-math></inline-formula> gain in energy efficiency over state-of-the-art digital and analog inference accelerators.

Impact of Interface Trap Charges on the Performances of Junctionless MOSFET in Sub-Threshold Regime

Interface trap charge (ITC) can induce device reliability issues in long/short channel junctionless (JL) MOSFET. The impact of positive (donor)/ negative (acceptor) ITC on the power and delay of the JL MOSFET circuits in the sub-threshold regime has been analyzed here. The presence of ITC and trap occupational probability variation modulates the threshold voltage of the device which also can affect the device/ circuits performances. So, the Power, Delay and Power delay products of JL-MOSFET have been modeled analytically first and then validated using the device simulator. For Device Simulation and modeling, SILVACO ATLAS and MATLAB have been used respectively. Extensive simulations show the accuracy of the proposed modeled data. Also, the optimum supply voltage is shifted in presence of the ITC. This framework will help the researchers to understand the device reliability issues and their limitations due to the ITC in sub-threshold ultra-large scale of integration applications.

Modeling and simulations of FDSOI five-gate qubit MOS devices down to deep cryogenic temperatures

FD-SOI five-gate (5G) qubit MOS devices are electrically characterized in linear regime down to deep cryogenic temperatures. The Lambert-W function is successfully used for the modelling of such 5G MOS devices from subthreshold regime to strong inversion. Its applicability is demonstrated down to deep cryogenic temperatures. The 5G device is modeled as a series of five independent transistors: the “active” one, that directly controls the current, and the “external” ones, that act as access resistances. The Lambert-W function enables to accurately reconstruct the inversion charge and the active channel resistance from weak to strong inversion. This approach allows reproducing the drain current characteristic avoiding the evaluation of the mobility attenuation factors. The main device parameters are extracted versus temperature. Furthermore, the role of different scattering mechanisms has been investigated, underlying the impact of defects for the gates in proximity of source and drain. The experimental characterizations have been completed with some Poisson-solver based simulations, carried out down to cryogenic temperatures. In this regime, Maxwell-Boltzmann carrier statistic has been replaced by an analytical expression of the Fermi-Dirac function.

A 0.5 V Sub-Threshold CMOS Current-Controlled Ring Oscillator for IoT and Implantable Devices

A current-controlled CMOS ring oscillator topology, which exploits the bulk voltages of the inverter stages as control terminals to tune the oscillation frequency, is proposed and analyzed. The solution can be adopted in sub-1 V applications, as it exploits MOSFETS in the subthreshold regime. Oscillators made up of 3, 5, and 7 stages designed in a standard 28-nm technology and supplied by 0.5 V, were simulated. By exploiting a programmable capacitor array, it allows a very large range of oscillation frequencies to be set, from 1 MHz to about 1 GHz, with a limited current consumption. Considering, for example, the five-stage topology, a nominal oscillation frequency of 516 MHz is obtained with an average power dissipation of about 29 µW. The solution provides a tuneable oscillation frequency, which can be adjusted from 360 to 640 MHz by controlling the bias current with a sensitivity of 0.43 MHz/nA.

Temperature and Gate-Length Dependence of Subthreshold RF Detection in GaN HEMTs.

The responsivity of AlGaN/GaN high-electron mobility transistors (HEMTs) when operating as zero-bias RF detectors in the subthreshold regime exhibits different behaviors depending on the operating temperature and gate length of the transistors. We have characterized in temperature (8–400 K) the detection performance of HEMTs with different gate lengths (75–250 nm). The detection results at 1 GHz can be reproduced by a quasi-static model, which allows us to interpret them by inspection of the output − curves of the transistors. We explain the different behaviors observed in terms of the presence or absence of a shift in the zero-current operating point originating from the existence of the gate-leakage current jointly with temperature effects related to the ionization of bulk traps.

Compact analytical modeling of underlap gate stack graded channel junction accumulation mode junctionless FET in subthreshold regime

This paper presents the compact analytical model of underlap gate stack (GS) graded channel (GC) junction accumulation mode (JAM) junctionless (JL) FET. At first, a comparative analysis between the two different graded channel schemes and non-graded channel is performed based on ION, IOFF and ION/IOFF ratio. The scheme that yields the higher ION/IOFF ratio along with smaller IOFF, is adopted in the proposed JL FET for further analysis. The 2D analytical modeling of the GS-GC-JAM-JL FET deals with the determination of surface potential, threshold voltage, subthreshold drain current, DIBL and subthreshold swing. Results obtained from analytical model and simulations are compared and an excellent match is found. Thus the present paper establishes the outstanding ability of proposed underlap GS-GC-JAM-JL FET architecture to shield the short channel effects without sacrificing its performance, and therefore, proves it as a potential candidate for ultra-low power applications.

Ephaptic entrainment in hybrid neuronal model

In recent decades, there has been a growing interest in the impact of electric fields generated in the brain. Transmembrane ionic currents originate electric fields in the extracellular space and are capable of affecting nearby neurons, a phenomenon called ephaptic neuronal communication. In the present work, the Quadratic Integrated-and-Fire model (QIF-E) underwent an adjustment/improvement to include the ephaptic entrainment behavior between neurons and electric fields. Indeed, the aim of our study is to validate the QIF-E model, which is a model to estimate the influence of electric fields on neurons. For this purpose, we evaluated whether the main properties observed in an experiment by Anastassiou et al. (Nat Neurosci 14:217–223, 2011), which analyzed the effect of an electric field on cortical pyramidal neurons, are reproduced with the QIF-E model. In this way, the analysis tools are employed according to the neuronal activity regime: (i) for the subthreshold regime, the circular statistic is used to describe the phase differences between the input stimulus signal (electrode) and the modeled membrane response; (ii) in the suprathreshold regime, the Population Vector and the Spike Field Coherence are used to estimate phase preferences and the entrainment intensity between the input stimulus and Action Potentials. The results observed are (i) in the subthreshold regime the values of the phase differences change with distinct frequencies of the input stimulus; (ii) in the supra-threshold regime the preferential phase of Action Potentials changes for different frequencies. In addition, we explore other parameters of the model, such as noise and membrane characteristic-time, in order to understand different types of neurons and extracellular environment related to ephaptic communication. Such results are consistent with results observed in empirical experiments based on ephaptic phenomenon. In addition, the QIF-E model allows further studies on the physiological importance of ephaptic communication in the brain, and its simplicity may open a door to simulate the ephaptic response in neuronal networks and assess the impact of ephaptic communication in such scenarios.

Giant parametric amplification and spectral narrowing in atomically thin MoS2 nanomechanical resonators

Pre-amplification of ultrasmall signals directly in the mechanical domain and boosting quality (Q) factors in nanoelectromechanical systems (NEMS) are intriguing scientific questions and technical challenges. These are particularly enticing in resonant NEMS enabled by emerging two-dimensional (2D) layered crystals, toward revealing fundamental limits and potential of 2D NEMS in both science explorations and engineering applications. Fortunately, their ultimately thin nature and unconventional elastic properties offer rich opportunities for manipulating oscillations via parametric and nonlinear effects. Here, we report on the experimental demonstration of giant parametric amplification and spectral linewidth narrowing in atomically thin molybdenum disulfide (MoS2) 2D NEMS resonators vibrating at ∼30–60 MHz. Parametric amplification is examined by photothermally modulating the stiffness of each atomic layer resonator at twice its resonance frequency (2f). Thanks to exceptionally efficient parametric effects in these atomically thin membranes, the parametric amplification of undriven thermomechanical resonance leads to giant parametric gains up to 3605 (71 dB) and spectral linewidth narrowing factors up to 1.8 × 105, before the onset of parametric oscillation. The remarkable parametric amplification and spectral narrowing (including effective Q boosting in the sub-threshold regime) in 2D NEMS validated in this study may open new possibilities for creating ultimately thin yet high-performance resonators and oscillators for signal transduction and sensing in classical and quantum engineering applications.

An Ultrasensitive Silicon-Based Electrolyte-Gated Transistor for the Detection of Peanut Allergens.

The highly sensitive detection of peanut allergens (PAs) using silicon-based electrolyte-gated transistors (Si-EGTs) was demonstrated. The Si-EGT was made using a top-down technique. The fabricated Si-EGT showed excellent intrinsic electrical characteristics, including a low threshold voltage of 0.7 V, low subthreshold swing of <70 mV/dec, and low gate leakage of <10 pA. Surface functionalization and immobilization of antibodies were performed for the selective detection of PAs. The voltage-related sensitivity (SV) showed a constant behavior from the subthreshold regime to the linear regime. The current-related sensitivity (SI) was high in the subthreshold regime and then significantly decreased as the drain current increased. The limit of detection (LOD) was calculated to be as low as 25 pg/mL based on SI characteristics, which is the lowest value reported to date in the literature for various sensor methodologies. The Si-EGT showed selective detection of PA through a non-specific control test. These results confirm that Si-EGT is a high-sensitivity and low-power biosensor for PA detection.

Modeling and Analysis of Cu-Carbon Nanotube Composites for Sub-Threshold Interconnects

The sub-threshold regime is suited for applications requiring ultra-low power consumption with low to medium frequency (tens to hundreds of MHz) of operation. Therefore, this paper presents electrical modeling and comprehensive analysis of copper-carbon nanotube (Cu-CNT) composite interconnects for sub-threshold circuit design. At lower operating frequencies, the effective complex conductivity of Cu-CNT composites in the nanoscale is formulated by developing an analytical model. Based on the proposed equivalent single conductor model, the frequency-dependent resistance and inductance of composite interconnects are computed. Finally, the sub-threshold crosstalk effect, transfer gain, and Nyquist stability of coupled Cu-CNT composite interconnect are analyzed using <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ABCD</i> matrix approach.

Process Tolerant and Power Efficient SRAM Cell for Internet of Things Applications

The use of Internet of Things (IoT) applications become dominant in many systems. Its on-chip data processing and computations are also increasing consistently. The battery enabled and low leakage memory system at subthreshold regime is a critical requirement for these IoT applications. The cache memory designed on Static Random-Access Memory (SRAM) cell with features such as low power, high speed, and process tolerance are highly important for the IoT memory system. Therefore, a process tolerant SRAM cell with low power, improved delay and better stability is presented in this research paper. The proposed cell comprises 11 transistors designed with symmetric approach for write operations and single ended circuit for read operations that exhibits an average dynamic power saving of 43.55% and 47.75% for write and 35.59% and 36.56% for read operations compared to 6 T and 8 T SRAM cells. The cell shows an improved write delay of 26.46% and 37.16% over 6 T and 8 T and read delay is lowered by 50.64% and 72.90% against 6 T and 10 T cells. The symmetric design used in core latch to improve the write noise margin (WNM) by 17.78% and 6.67% whereas the single ended separate read circuit improves the Read Static Noise Margin (RSNM) by 1.88x and 0.33x compared to 6 T and 8 T cells. The read power delay product and write power delay product are lower by 1.94x, 1.39x and 0.17x, 2.02x than 6 T and 8 T cells respectively. The lower variability from 5000 samples validates the robustness of the proposed cell. The simulations are carried out in Cadence virtuoso simulator tool with Generic Process Design Kit (GPDK) 45 nm technology file in this work.

A Low-Power Logarithmic CMOS Digital-to-Analog Converter for Neural Signal Recording

Benefitting from the exponential I-V characteristic curve of CMOS transistors operating in the subthreshold regime, we propose a logarithmic digital-to-analog converter (DAC) for neural recording systems. The reported 8-bit logarithmic DAC converts small voltages with lower resolution and as the input signal increases the resolution of the conversion also increases. The step size changes from 65 mV for the first step to 0.15 mV for the last step. The DAC is designed and implemented in a 0.18- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS technology. Operating at 5 MHz the circuit consumes 3.11 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> from a 1.8-V supply. The input-output characteristic of the DAC resembles a logarithmic curve with the difference between measurement results and the ideal logarithm function having a root-mean-square error (RMSE) of 2.4 mV.

Bulk-driven current conveyor optimization using simulation-based method

This paper presents the optimization of a novel low-voltage (LV) and low-power (LP) bulk driven current conveyor (CCII). For the bulk-driven circuits, the transistors are biased at the subthreshold regime for LV and LP operation. In contrast, the input transistors of the differential stage are controlled from the bulk terminals to achieve a rail-to-rail input voltage range. A simulation-based technique is adapted for the optimal design of LV-LP bulk driven CCII, using the single-objective particle swarm optimization (PSO) algorithm. It is designed using CMOS 0.18 μm technology to operate at a voltage of 0.3 V and have a power consumption of 37 nW. Optimization results and also process/temperature corner results confirm the correct operation of the designed circuit.