Stray Inductance Research Articles

Combined Current Sensing Method for the Three-Phase Quasi-Z-Source Inverter

The impedance-source network converter, utilizing a unique LC network and previously forbidden shoot-through states, provides the ability to buck and boost the input voltage in a single stage. However, the inrush shoot-through current (STC) in startup or transient process might cause undesired current stresses on converter devices. This paper focuses on the STC sensing for an effective inrush current limitation by the combined current sensing technique in the quasi-Z-source inverter. STC and phase currents for the inverter control strategy are obtained simultaneously. No extra hardware is needed and the effects of current sensor bandwidth and duty cycle on the sensing accuracy are analyzed mathematically. The voltage spike gets avoided by integrating the stray inductance into the impedance network. Finally, an STC control loop based on proposed method are embedded in the field-oriented control strategy. The inrush STC and the device current stress in the transient process get suppressed. Simulation and experimental results from a quasi-Z-source inverter validate the feasibility of the proposed methods.

Capacitive effects in IGBTs limiting their reliability under short circuit

The short-circuit oscillation mechanism in IGBTs is investigated in this paper by the aid of semiconductor device simulation tools. A 3.3-kV IGBT cell has been used for the simulations demonstrating that a single IGBT cell is able to oscillate together with the external circuit parasitic elements. The work presented here through both circuit and device analysis, confirms that the oscillations can be understood with focus on the device capacitive effects coming from the interaction between carrier concentration and the electric field. The paper also shows the 2-D effects during one oscillation cycle, revealing that the gate capacitance changes according with the shape of the electric field due to the charge distribution in the n-base. It has been identified that the time-varying capacitance leads to parametric oscillations together with the stray gate inductance, which limit the reliability of the IGBT.

Modelling of the shoot-through phenomenon introduced by the next generation IGBT in inverter applications

The shoot-through phenomenon has not been fully discussed for high-power inverters with IGBTs. This is because a negative gate voltage is applied to IGBTs during off states. Recently, attention is paid to an improved gate driver with only a positive gate voltage in order to meet demands for simplification, integration, and reduction in power consumption as well as in cost of the gate driver. Moreover, the threshold voltage of the next-generation IGBT will decrease with microfabrication techniques of the gate structure. This will make the shoot-through phenomenon severer and degrade the inverter reliability with the next-generation IGBTs. The influence of the parasitic parameters in both the IGBT and circuit on the shoot-through mechanism has not been investigated so far.This paper clarifies the shoot-through mechanism and investigates the impact of the next generation IGBTs on the inverter reliability. The influence of the internal capacitance of IGBT including stray inductance on inverter reliability is experimentally confirmed.

High‐gain soft‐switching interleaved switched‐capacitor DC–DC converter with phase‐shedding technique

This study experimentally verifies the performance of a high-gain soft-switching interleaved switched-capacitor (ISC) DC–DC converter based on phase-shedding technique. Efficiency improvement especially under light load condition is achieved by introducing the phase-shedding technique, which adjusts the number of active interleaved converters based on the input power level. The interleaved configuration and modular characteristic of the converter increase the voltage gain as well as the current rating of the converter. Moreover, pulsating input current issue of conventional switched-capacitor converter is solved by the stray inductances distributed in the converter. The converter achieves high-voltage gain, improved efficiency, magnetic components free design and low output capacitance requirement. Simulation and experimental results taken from 1.5 kW prototype operating at 120 kHz are documented in this study to validate the operation and characteristics of the proposed ISC DC–DC converter.

Thermal Topology Optimization of a Three-Layer Laminated Busbar for Power Converters

This paper focuses on a topology optimization method for laminated busbars in power converters that minimizes the quantity of copper used while keeping the temperature under the allowed limits. Busbars are widely studied for adding their stray inductance to the commutation loop, which causes surge voltage across the power devices. However, the study of heat dissipation is essential to control hotspots in the busbar and preserve the converter components. Current density and temperature are sensitive to shape modifications; hence, topology optimization based on multiphysics simulations is an aspect to be considered when designing prototypes for a good cost performance ratio. The temperature is calculated by an electrothermal two-dimensional (2-D) finite element method (FEM) superposition approach. Busbar plates are modeled in 2-D since the thickness is constant. Furthermore, the different layers are related by the thermal equations reproducing the heat transfers regarding the overlap in the laminated busbar. Simulation results are validated by experimental tests. Comparison with 3-D FEM proves the 2-D approach to be faster while remaining accurate and a perfect method for topology optimization resolutions, which are very time consuming for three-dimensional (3-D) geometries. The busbar topology optimization is made by maximizing the energy transfer with the environment and by varying the electric and thermal conductivities of the mesh elements. Optimization leads to more than 50% volume reduction.

A Built-In High Temperature Half-Bridge Power Module with Low Stray Inductance and Low Thermal Resistance for In-Wheel Motor Application

In order to integrate a five-phase inverter system into the limited space of an in-wheel motor, a high temperature low stray inductance SiC half-bridge power module with a volume of about 5 ml was designed, fabricated and tested. The stray inductance in the module was calculated by an electromagnetic simulator and confirmed by measurements to be 4.4 nH. Double-pulse switching tests were conducted at temperatures up to 200°C. Thermal resistance, including that of the substrate, was calculated to be 0.153 °C/W. Fast switching capability was accomplished with an external gate resistance of 1 Ω.

Switching Analysis for All-SiC Module

In this paper, we propose a method to accurately calculate the turn-off switching loss. For that purpose, a simple analytical model is proposed in which the parasitic capacitances and stray inductances are integrated within the power module. Experiment confirmed that the turn-off loss analyzed by this model is correct.

Design of Acceptable Stray Inductance Based on Scaling Method for Power Electronics Circuits

Recently, high-speed switching circuits using SiC and GaN power devices have been developed for next-generation power electronics circuits and applied to actual traction systems in Japan. Stray inductance caused by the wiring structures between dc capacitors and power devices is one of the most critical parameters that influences high-speed switching circuits. This paper presents a design procedure of acceptable stray inductance for high-speed switching circuits based on a scaling method. It should be noted that the stray inductance is designed for not minimization but optimization, and also is shown not as an absolute value [H] but as a percentage value [%]. By applying the proposed procedure, a maximum stray inductance can be designed for power electronics circuits, considering the switching period, the voltage, and the current ratings of the circuits. To verify the proposed procedure, the experimental results are demonstrated using a SiC-MOSFET and a SiC-Schottky Barrier Diode, with voltage and current ratings of 500 V and 400 A, respectively.

Analysis and Optimization of Switched Capacitor Power Conversion Circuits With Parasitic Resistances and Inductances

For a switched-capacitor converter (SCC) built by discrete components, its performance is inevitably influenced by parasitic resistances and stray inductances. A basic SCC unit including parasitic resistances and stray inductances behaves as an RLC series circuit operated in charging and discharging states alternatively. Hard-switching SCC with small Q factor, due to the small stray inductance, is analyzed based on overdamping RLC circuit theory. And the underdamping RLC series network is used to analyze soft-switching SCC whose Q factor is greater than 0.5. New mathematical equations are derived to evaluate the impact of parasitic resistances and inductances on the performance of SCCs. Following that, the corresponding design methodologies are proposed for both hard- and soft-switching SCCs. The effectiveness of the proposed analysis and design methods are experimentally demonstrated by a 300-W double-mode SCC prototype.

A Zero-Current-Switching High Conversion Ratio Modular Multilevel DC–DC Converter

As the demand of dc-dc converter for medium and high voltage application is increasing in recent years, more and more attention has been paid to modular multilevel converters (MMC). This paper proposes a novel transformerless MMC to achieve high-conversion-ratio DC-DC power conversion purpose. This converter can be used in Medium Voltage Direct Current (MVDC) system, as a high step-up ratio solid-state transformer (SST). The proposed converter possesses scalability, simplicity as well as inherent voltage balancing capability. No complex control algorithm is needed to balance the voltages in each submodule. By using the MMC concept, N low voltage submodules are connected in series to generate a high voltage output. The conversion ratio can be regulated by the phase-shifted control. Two kinds of submodules are outlined to build the MMC. By utilizing stray inductance distributed on wire, the bulky inductors with high power loss can be removed from the system. Resonant operation between wire stray inductance and submodule capacitors assists the converter to work under ZCS mode at high efficiency. A design example with 11-time step-up ratio is analyzed and simulated. And a 200W scaled down lab prototype with 7-time voltage step-up capability has been built to verify the proposed concept.

Conceptual design of Dump resistor for Superconducting CS of SST-1

Under upgradation activities for SST-1, the existing resistive central solenoid (CS) coil will be replaced with Nb3Sn based superconducting coil. Design of Central solenoid had been completed and some of the initiative has already taken for its manufacturing. The superconducting CS will store upto 3 MJ of magnetic energy per operation cycle with operating current upto 14 kA. During quench, energy stored in the coils has to be extracted rapidly with a time constant of 1.5 s by inserting a 20 mΩ dump resistor in series with the superconducting CS which is normally shorted by circuit breakers. As a critical part of the superconducting CS quench protection system, a conceptual design of the 20 mΩ dump resistor has been proposed. The required design aspects and a dimensional layout of the dump resistor for the new superconducting CS has been presented and discussed. The basic structure of the proposed dump resistor comprises of stainless steel grids connected in series in the form of meander to minimize the stray inductance and increase the surface area for cooling. Such an array of grids connected in series and parallel will cater to the electrical as well as thermal parameters. It will be cooled by natural convection. During operation, the estimated maximum temperature of the proposed dump resistor will raise upto 600 K.

Next Generation IGBT and Package Technologies for High Voltage Applications

In this paper, we will present an overview of the latest results covering both Insulated Gate Bipolar Transistor (IGBT) and packaging technologies intended for demanding high-power applications. We will present the recently developed press pack module rated at 4500 V and 3000 A utilizing an advanced reverse conducting RC-IGBT for hard switching application, which together with the improved module layout yields the most powerful IGBT-based device up to date. For applications that require isolated modules, we will show our new dual IGBT module rated up to 3.3 kV and 450 A. The module layout was optimized to allow highly scalable converter designs with overall low stray inductances. This opens up new possibilities to further reduce losses due to the fact that the devices can be made thinner than today’s limits for achieving lower switching losses with soft performance. We will show the latest results from the enhanced trench IGBT-cell development and give an outlook for the power levels that can be achieved by combining the new cell with the RC-IGBT concept.

Dynamic Electrothermal Model of Paralleled IGBT Modules With Unbalanced Stray Parameters

Compared with single-module applications, unbalanced stray parameters come about frequently in the process of installing paralleled IGBT modules, which could result in some distinctions of current sharing and temperature distributions. To focusing on depicting this practical issue, a novel dynamic electrothermal model extended to paralleled systems is proposed in this paper to establish a comprehensive transient model to characterize the relations of power losses, junction temperature, and unbalanced parasitic elements. The model can describe the interactions of current distributions and thermal dissipations between paralleled modules. In addition, the variation of unbalanced temperature during transient process can be obtained with the proposed electrothermal model. First, the stray inductance parameters in the paralleled branches are analyzed in detail by finite-element-method simulation tool. And based on impedance analysis, an improved power loss model is built up, considering the interaction of paralleled devices. Moreover, by the method of resistor-capacitor networks extracted from numerical simulations of 3-D structural model, the transient thermal impedance of devices and cooling system is obtained for fast and accurate electrothermal cosimulation of the paralleled system. Experimental results are carried out to verify the proposed model and coincide with the theoretical analysis.

Implementation and Switching Behavior of a PCB-DBC IGBT Module Based on the Power Chip-on-Chip 3-D Concept

With the emergence of new power semiconductor devices, the switching speeds in power converters are increasing. The stray inductances of switching cells must, therefore, be minimized to limit overvoltages on transistors. One relatively new approach, called power chip-on-chip (PCoC), considers the integration of power dies, one on top of the other, directly in the busbar. This allows for the reduction of the stray inductance. This paper first presents the implementation of a PCoC module using classical packaging techniques. Then, a description of the different technological steps for the realization is outlined. Finally, experimental characterization results confirm the lower stray inductances offered by the PCoC package compared with the planar one.

SiC-MOSFETを対象とした直流側寄生インダクタンスに起因するスイッチング損失の影響評価

Recently, high-speed switching circuits using SiC power devices have been developed for next-generation power electronics circuits and applied to actual traction systems in Japan. Stray inductances caused by DC capacitors, bus bars and power devices are one of the most critical parameters that influences over-voltage and switching loss. This paper presents an investigation into the influence of stray inductance on the switching performance of power devices. In particular, this paper focuses on the effects of stray inductance on both turn-on loss and turn-off loss, and can be estimated using the proposed impedance ratio method of the stray inductance. To verify the proposed procedure, experimental results are demonstrated using an all-SiC power module.

An Ultralow Loss Inductorless $dv/dt$ Filter Concept for Medium-Power Voltage Source Motor Drive Converters With SiC Devices

In this paper, a novel $dv/dt$ filter is presented targeted for 100-kW to 1-MW voltage source converters using silicon carbide (SiC) power devices. This concept uses the stray inductance between the power device and the converter output as a filter component in combination with an additional small RC -link. Hence, a lossy, bulky, and costly filter inductor is avoided and the resulting output $dv/dt$ is limited to 5–10 kV/ $\mu$ s independent of the output current and switching speed of the SiC devices. As a consequence, loads with $dv/dt$ constraints, e.g., motor drives can be fed from SiC devices enabling full utilization of their high switching speed. Moreover, a filter-model is proposed for the selection of filter component values for a certain $dv/dt$ requirement. Finally, results are shown using a 300-A 1700-V SiC metal–oxide–semiconductor field-effect transistor ( mosfet ). These results show that the converter output $dv/dt$ can be limited to 7.5 kV/ $\mu$ s even though values up to 47 kV/ $\mu$ s were measured across the SiC mosfet module. Hence, the total switching losses, including the filter losses, are verified to be three times lower compared to when the mosfet $dv/dt$ was slowed down by adjusting the gate driver.

On the matter of building high-frequency amplifiers minimally influenced by interstage stray reactances

The expedience of building wideband multistage amplifiers, the stages of which are connected with each other so, that the “modes of impedance mismatch” are realized, is justified. Those modes allow us to reduce considerably the sensitivity of amplifier transfer factors to the stray (constructional) capacitances and inductances of interstage circuits. The procedure of synthesizing the schematics of such amplifiers is proposed, the efficiency and clarity of which are provided by using the method of signal graphs.

単相フルブリッジインバータにおける各相に分割配置したDCキャパシタの相間共振電流

A design for an inverter circuit configuration of integrated half-bridge modules with focus on the circulating resonant current is clarified in this paper. Although this configuration has the advantages of a small DC-side stray inductance, an analysis of the equivalent circuit suggests that the DC-link capacitor current increases depending on the relationship between the resonant and switching frequencies. This leads to an increase in the capacitor volume. The capacitor current was experimentally investigated under PWM operation at switching frequencies up to 100kHz using SiC-MOSFETs. The experimental results demonstrate that the resonant current is remarkable when the resonant frequency was close to either the fundamental or the third harmonics of the switching frequency. Using the proposed design considering the quality factor and the resonant frequency, the increase in the capacitor current based on the resonant phenomenon can be avoided.

Analysis of Electrochemical Machining Process with Ultrashort Pulses Considering Stray Inductance of Pulse Power Supply

Analysis of Electrochemical Machining Process with Ultrashort Pulses Considering Stray Inductance of Pulse Power Supply

Physics‐based spice model on the dynamic characteristics of silicon carbide Schottky barrier diode

Silicon carbide Schottky barrier diodes (SiC SBDs) are poised to replace silicon PIN diodes as a new choice for the high power and high frequency applications. However, SiC SBDs suffer from ringing which may induce additional power losses when applied in chopper circuit, regarded as the interaction among the depletion capacitance, depletion resistance, parasitic stray inductance and series resistance. The existing SiC SBD models generally treat the resistances as constants and ignore the influence of the MOS, which deviate the switching commutation process significantly on the ringing frequency and amplitude. In this study, a more accurate Spice model of SiC SBD has been developed in which voltage dependent non-linear depletion capacitance and resistances are all considered in the transient analysis based on semiconductor physics, while the Miller capacitance of the MOS performing as a switch in the circuit is also taken into account. The improved model and analysis are validated by the better agreement with the experiments compared with the existing models on the dynamic characteristics.