Spintronic Memory Research Articles

Nonvolatile Magnetic Memory Combined With AND/NAND Boolean Logic Gates Based on Geometry-Controlled Magnetization Switching

Spin-orbit torque (SOT) has been widely used in data writing of spintronic memory devices by current-induced magnetization switching. The typical structure of SOT-induced magnetization switching of ferromagnetic multilayers with perpendicular magnetic anisotropy such as Ta/CoFeB/MgO allowed the ferromagnetic and adjacent nonmagnetic layer to be patterned independently. In this letter, we study the role of device geometry in the manipulation of magnetization switching by placing two separated CoFeB magnetic bits at different locations on a Ta layer with trapezoid shape. Manipulation of the magnetization states of the magnetic bits was achieved simply by applying different write current. Both memory writing and Boolean logic functions <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">and/nand</small> with large logic output ratio have been demonstrated experimentally.

Gigantic Current Control of Coercive Field and Magnetic Memory Based on Nanometer-Thin Ferromagnetic van der Waals Fe3 GeTe2.

Controlling magnetic states by a small current is essential for the next-generation of energy-efficient spintronic devices. However, it invariably requires considerable energy to change a magnetic ground state of intrinsically quantum nature governed by fundamental Hamiltonian, once stabilized below a phase-transition temperature. Here, it is reported that, surprisingly, an in-plane current can tune the magnetic state of the nanometer-thin van der Waals ferromagnet Fe3 GeTe2 from a hard magnetic state to a soft magnetic state. It is a direct demonstration of the current-induced substantial reduction of the coercive field. This surprising finding is possible because the in-plane current produces a highly unusual type of gigantic spin-orbit torque for Fe3 GeTe2 . In addition, a working model of a new nonvolatile magnetic memory based on the principle of the discovery in Fe3 GeTe2 , controlled by a tiny current, is further demonstrated. The findings open up a new window of exciting opportunities for magnetic van der Waals materials with potentially huge impact on the future development of spintronic and magnetic memory.

Comparative Analysis of Spintronic Memories for Low Power on-chip Caches

The continuous downscaling in CMOS devices has increased leakage power and limited the performance to a few GHz. The research goal has diverted from operating at high frequencies to deliver higher performance in essence with lower power. CMOS based on-chip memories consumes significant fraction of power in modern processors. This paper aims to explore the suitability of beyond CMOS, emerging magnetic memories for the use in memory hierarchy, attributing to their remarkable features like nonvolatility, high-density, ultra-low leakage and scalability. NVSim, a circuit-level tool, is used to explore different design layouts and memory organizations and then estimate the energy, area and latency performance numbers. A detailed system-level performance analysis of STT-MRAM and SOT-MRAM technologies and comparison with 22[Formula: see text]nm SRAM technology are presented. Analysis infers that in comparison to the existing 22[Formula: see text]nm SRAM technology, SOT-MRAM is more efficient in area for memory size [Formula: see text][Formula: see text]KB, speed and energy consumption for cache size [Formula: see text][Formula: see text]KB. A typical 256[Formula: see text]KB SOT-MRAM cache design is 27.74% area efficient, 2.97 times faster and consumes 76.05% lesser leakage than SRAM counterpart and these numbers improve for larger cache sizes. The article deduces that SOT-MRAM technology has a promising potential to replace SRAM in lower levels of computer memory hierarchy.

Emergent Topological Hall Effect at a Charge-Transfer Interface.

Exploring exotic interface magnetism due to charge transfer and strong spin-orbit coupling has profound application in the future development of spintronic memory. Here, the emergence and tuning of topological Hall effect (THE) from a CaMnO3 /CaIrO3 /CaMnO3 trilayer structure are studied in detail, which suggests the presence of magnetic Skyrmion-like bubbles. First, by tilting the magnetic field direction, the evolution of the Hall signal suggests a transformation of Skyrmions into topologically-trivial stripe domains, consistent with behaviors predicted by micromagnetic simulations. Second, by varying the thickness of CaMnO3 , the optimal thicknesses for the THE signal emergence are found, which allow identification of the source of Dzyaloshinskii-Moriya interaction (DMI) and its competition with antiferromagnetic superexchange. Employing high-resolution transmission electron microscopy, randomly distributed stacking faults are identified only at the bottom interface and may avoid mutual cancellation of DMI. Last, a spin-transfer torque experiment also reveals a low threshold current density of ≈109 A m-2 for initiating the bubbles' motion. This discovery sheds light on a possible strategy for integrating Skyrmions with antiferromagnetic spintronics.

A Self-Matching Complementary-Reference Sensing Scheme for High-Speed and Reliable Toggle Spin Torque MRAM

While spintronic memories, for example, spin transfer torque magnetic random access memory (STT-MRAM), have shown huge potential for building next-generation memory due to their attractive characteristics, the relatively large write latency and deficient read mechanism preclude their further application for emerging concepts, such as in-memory-processing and neuromorphic computing. A toggle spin torque (TST) MRAM combining STT and spin orbit torque (SOT) has recently been proposed to alleviate the write issue. However, the sensing featuring a good balance between the reliability and speed has not been addressed. In this paper, we propose a self-matching complementary-reference (SMCR) sensing scheme, which provides not only a maximum sensing margin (SM) but also a high-speed read operation. Through applying it in the TST-MRAM, advantageous performance in terms of both write and read processes can be realized. To validate the functionality of our proposal, we design and evaluate an 8Kb TST-MRAM array, in which a read delay of 1 ns and a read bit error rate (BER) of $1.02\times 10^{-13}$ are achieved. Moreover, when being operated at 0.8 V supply voltage, it can reduce the read access energy by 7.5% and 20%, compared with conventional voltage sensing and dynamic reference sensing schemes, respectively.

Ultra-High-Performance Magnetic Nonvolatile Level Converter Flip-Flop with Spin-Hall Assistance for Dual-Supply Systems with Power Gating Architecture

Recently, nonvolatile spintronic memory elements have drawn a lot of attention for designing nanoscale integrated circuit design due to their several advantages such as near-zero static power, high endurance, good scalability, and compatibility with the current process technologies. In this paper, a high-speed and low-power spintronic-based nonvolatile level converter flip-flop (NVLCFF) is proposed. This efficient design facilitates the use of power gating and dual-supply techniques simultaneously for ultra-energy-efficient integrated circuits. The proposed NVLCFF uses the spin Hall effect-assisted spin-transfer torque magnetic tunnel junction (SHE-assisted STT-MTJ) to provide nonvolatile data storage. Furthermore, a new voltage level converter is presented to perform voltage level conversion in the proposed NVLCFF. Elimination of the contention condition, using one reconfigurable MTJ, and no static voltage division in the proposed design lead to considerably higher speed and lower power. The 7-nm FinFET, as one of the leading industrial technologies, is utilized to design the peripheral circuity. The HSPICE simulation results show on average, 64%, 62%, and 35% improvements regarding the power dissipation, backup energy, and restore energy as compared to the other NVLCFFs. Furthermore, comprehensive Monte Carlo simulations demonstrate the robustness of the proposed design in the presence of process variations.

Spintronics - A Dive Into the Future

We already know that electrons have a charge along with a spin, but until recently, these two have been considered separately. The motion of electric charge is considered as the heart of electronic circuits, and the flow of electron spin plays a crucial role in spintronic circuits. Adding the spin degree of freedom provides new capabilities, new effects, and new functionalities. It all started with the discovery of the Giant Magnetoresistance (GMR) in 1988, which opened the road to an effective control of the motion of the electron charges by focusing on their spin through the orientation of magnetization. Today, spintronics has entered into almost every household as the read sensors for the hard drives present in every desktop and most laptops. Magnetic Random Access Memory (MRAM) and Spin Transfer Torque (STT) RAM are replacing Static RAM where ultra-dense memories are not required. Soon these spintronic memories will penetrate the cell phone market because they offer lower power and are non-volatile. The potential held by Spintronics is very promising for new advancements in science and technology in the 21st century. This paper discusses the evolution of spintronics from the initial research of spin-dependent transport in ferromagnetic materials to the discovery of the giant magnetoresistance and to the most recent advances. Today, this field of research is extending considerably, with very encouraging new technologies like the phenomena of spin transfer, molecular spintronics, nanoscale spintronics, and single-electron spintronics.

Nonsilicon, Non-von Neumann Computing—Part II

The articles in this month’s special issue provide insight into future computing technologies such as novel architectures, spintronic memories, and quantum computing.

Deterministic all-optical magnetization writing facilitated by non-local transfer of spin angular momentum

Ever since its discovery around a decade ago, all-optical magnetization switching (AOS) using femtosecond laser pulses has shown potential for future data storage and logic devices. In particular, single pulse helicity independent AOS in certain ferrimagnetic alloys and multilayers is highly efficient and ultrafast. However, in most cases it is a toggle mechanism, which is not desirable for applications. Here we experimentally demonstrate conversion from toggle switching to a deterministic mechanism by biasing AOS in a Co/Gd bilayer with a spin polarized current which is optically generated in an adjacent ferromagnetic reference layer. We show deterministic writing of an ‘up’ and ‘down’ state using a sequence of one or two pulses, respectively, and demonstrate the non-local origin by varying the magnitude of the generated spin current. Our demonstration of deterministic magnetization writing could provide an essential step towards the implementation of future optically addressable spintronic memory devices.

Ferroelectric control of magnetic skyrmions in multiferroic heterostructures

Magnetic skyrmions with a topological particle nature are considered as potential information carriers for future spintronics memory and logic devices. The stabilization of magnetic skyrmions at zero magnetic field in nanostructured components is a prerequisite for incorporating them into advanced nonvolatile memory devices. Here, using a real-space phase field model based on Ginzburg-Landau theory, we demonstrate that ferroelectric polarization can stabilize magnetic skyrmions at zero magnetic field in multiferroic heterostructures composed of MnSi, ${\mathrm{PbTiO}}_{3}$, and ${\mathrm{SrTiO}}_{3}$. The stabilization of magnetic skyrmions in multiferroic heterostructures essentially depends on the directions of spontaneous polarizations and the size ratios of different constituents, in which polarization-induced inhomogeneous strain plays an important role. By applying an electric field, the polarization switching takes place in the ferroelectric constituent and the polarization-induced strain changes in the multiferroic heterostructures, resulting in a transition from skyrmion to helical phase in the ferromagnetic constituent. In addition, the skyrmion and helical phases can coexist in the absence of an external field and be switched reversibly by a local magnetic field with a small magnitude. Stabilization and control of magnetic skyrmions by spontaneous polarization at zero magnetic field may create additional opportunities for nonvolatile skyrmion memory devices.

In-plane magnetization switching characteristics of energy-efficient strain-mediated nanomagnets assisted by the spin Hall effect at room temperature

Magnetization switching of nanomagnets induced by voltage shows an energy-efficient way to spintronic devices. In-plane magnetization switching can be realized by simulating the magnetization dynamics under a combination of spin-orbit torque (SOT) and strain. The magnetization dynamics were simulated using the Landau-Lifshitz-Gilbert equation under macrospin approximation in the presence of thermal noise. Results show that a relatively small voltage (~60 mV) along with a charge current (1011 A/m2) can drive the magnetization flipping 180° (the switching probability near ~0.98), the energy required is ~0.25 pJ. The energy dissipation of Strain + SOT clocking scheme is 4 orders of magnitude less than that of SOT clocking scheme (~4.44 nJ). Low current density (<109 A/m2) makes no contributions to magnetization switching, which was dominated by the thermal noise (the probability ~0.5). If the current is too large, the probability of 180° flipping will not increase significantly when increasing the current, but the power consumption of the device is greatly increased. We should take a compromise between performance and energy dissipation. Moreover, the stochastic switching behavior of the SOT strain-mediated nanomagnets demonstrates the feasibility to mimic the artificial neurons that can be used to construct an artificial neural network to recognize the handwritten digits. The accuracy of the Strain + SOT neurons-based ANN is ~98%, which can work as well as traditional neurons. These results prove that Strain + SOT clocking scheme provides an additional feasible route to realizing energy-efficient spintronic neurons and memory.

A computational study of spin Hall effect device based on 2D materials

Efficient spin-charge conversion is indispensable in spintronic computing and memory technologies for achieving low power. Spin Hall and quantum spin Hall effects have been demonstrated in certain atomically thin two-dimensional (2D) materials. In this work, we develop a multiscale simulation method from atomistic quantum transport simulation to the circuit model for the spin Hall effect (SHE) device based on 2D materials. Numerical implementation to speed up atomistic transport simulations with the non-equilibrium Green's function formalism is described for the crossbar SHE device. The multiscale method can treat atomistic scale features and compute the spintronic device performance metrics of the modeled device. As an example, the effect of edge roughness on the SHE devices based on monolayer 2D materials is investigated. The results illustrate that aggressively scaled monolayer SHE devices can efficiently transduce charge to spin in the presence of edge roughness.

Accumulation of spin-polarized states of charge carriers and a spintronic battery

Spin valves based on materials in which the spin-flip is suppressed by the spatial separation of charge carriers, while maintaining electric neutrality in the valve volume, are considered. The possibility of using these valves as electric batteries is discussed. Regulating the potential difference on the valve, one can expect the effects of incommensurability of the type of “devil's staircase” associated with the Coulomb interaction and redistribution of electrons occurring while the battery is charged and discharged. The effects of the emergence and vanishing of spontaneous spin polarization of conduction electrons with a change in the Fermi level in the valve are predicted. Such spin valves can also be used in implementing spintronic memory cells, supercapacitors, and similar devices.

Symmetry-Protected Zero Modes in Metamaterials Based on Topological Spin Texture

The recent discovery of higher-order topological insulators (HOTIs) has significantly extended our understanding of topological phases of matter. Here, we predict that second-order corner states can emerge in the dipolar-coupled dynamics of topological spin textures in two-dimensional artificial crystals. Taking a breathing honeycomb lattice of magnetic vortices as an example, we derive the full phase diagram of collective vortex gyrations and identify three types of corner states that have not been discovered before. We show that the topological "zero-energy" corner modes are protected by a generalized chiral symmetry in the sexpartite lattice, leading to particular robustness against disorder and defects, although the conventional chiral symmetry of bipartite lattices is absent. We propose the use of the quantized $\mathbb{Z}_{6}$ Berry phase to characterize the nontrivial topology. Interestingly, we observe corner states at either obtuse-angled or acute-angled corners, depending on whether the lattice boundary has an armchair or zigzag shape. Full micromagnetic simulations confirm the theoretical predictions with good agreement. Experimentally, we suggest using the recently developed ultrafast Lorentz microscopy technique [M\"{o}ller \emph{et al}.,{arXiv:1907.04608}] to detect the topological corner states by tracking the nanometer-scale vortex orbits in a time-resolved manner. Our findings open up a promising route for realizing higher-order topologically protected corner states in magnetic systems and finally achieving topological spintronic memory and computing.

Perpendicularly magnetized Ni/Pt (001) epitaxial superlattice

A perpendicularly magnetized ferromagnetic layer is an important building block for recent/future highdensity spintronic memory applications. This paper reports on the fabrication of perpendicularly magnetized Ni / Pt superlattices and the characterization of their structures and magnetic properties. The optimization of film growth conditions allowed us to grow epitaxial Ni / Pt (001) superlattices on SrTiO$_{3}$ (001) single crystal substrates. We investigated their structural parameters and magnetic properties as a function of the Ni layer thickness, and obtained a high uniaxial magnetic anisotropy energy of 1.9 x 10$^{6}$ erg/cm$^{3}$ for a [Ni (4.0 nm) / Pt (1.0 nm)] superlattice. In order to elucidate the detailed mechanism on perpendicular magnetic anisotropy for the Ni / Pt (001) superlattices, the experimental results were compared with the first-principles calculations. It has been found that the strain effect is a prime source of the emergence of perpendicular magnetic anisotropy.

Benchmarking and Optimization of Spintronic Memory Arrays

In this article, we present a cross-layer optimization and benchmarking of various spintronic memory devices, including spin-transfer-torque magnetic random access memory (STT-MRAM), spin-orbit-torque (SOT) MRAM, voltage-controlled exchange coupling (VCEC) MRAM, and magnetoelectric (ME) MRAM. Various material, device, and circuit parameters are optimized to maximize array-level READ and WRITE performances and to benchmark spintronic devices against static random access memory (SRAM). It is shown that the optimized parameters, such as magnetic tunnel junction (MTJ) oxide thickness or transistor size, are quite different for various device options. The optimal oxide thickness of VCEC-MRAM is 1.6 nm because it is a voltage-controlled device; thus, thicker oxide gives smaller READ energy-delay product (EDP), whereas, for STT-MRAM, the optimal oxide thickness is 1.3 nm to keep the WRITE voltage low while avoiding READ disturbs. In addition, we find that the co-optimization of material, device, and circuit analyses are critical because it is not enough to identify the most promising material for various device options with only material- or device-level metrics. For instance, SOT materials with the highest spin conductivity may not result in the best array-level WRITE performance because of their large resistivity and, in some cases, READ disturb issues. We also present a new design and cell layout for ME-MRAM in which the number of access transistors depends on the WRITE voltage. The benchmarking results show that SOT-MRAM can be fast and low energy but would suffer from a 25% larger cell area compared with STT-MRAM. VCEC-MRAM can be denser than STT-MRAM (2T1MTJ) and dissipate less energy but would suffer from slower READ operations because of its large oxide thickness. ME-MRAM can be fast, low energy, and dense compared with all other options.

Ferromagnetic and ferroelectric two-dimensional materials for memory application

The discoveries of ferromagnetic and ferroelectric two-dimensional (2D) materials have dramatically inspired intense interests due to their potential in the field of spintronic and nonvolatile memories. This review focuses on the latest 2D ferromagnetic and ferroelectric materials that have been most recently studied, including insulating ferromagnetic, metallic ferromagnetic, antiferromagnetic and ferroelectric 2D materials. The fundamental properties that lead to the long-range magnetic orders of 2D materials are discussed. The low Curie temperature (Tc) and instability in 2D systems limits their use in practical applications, and several strategies to address this constraint are proposed, such as gating and composition stoichiometry. A van der Waals (vdW) heterostructure comprising 2D ferromagnetic and ferroelectric materials will open a door to exploring exotic physical phenomena and achieve multifunctional or nonvolatile devices.

Deterministic Spin-Orbit Torque Switching by a Light-Metal Insertion.

Spin-orbit torque (SOT) switching of magnetization is a promising emerging technology for nonvolatile spintronic memory and logic applications. However, deterministic switching of perpendicular magnetization with SOTs requires an additional symmetry breaking, which is typically provided by an external magnetic field, making it impractical for applications. In this work, we disclose that by the insertion of a slightly asymmetric light-metal layer at the heavy metal-ferromagnet interface of SOT heterostructures, current-induced out-of-plane effective magnetic fields are introduced that enable deterministic switching without an external magnetic field. We obtain uniform perpendicular magnetic anisotropy and switching current density despite the asymmetry of the light-metal layer, and we show the scalability of our approach by studying device sizes that differ by 2 orders of magnitude. Our work provides a practical route for utilization of SOTs for magnetization switching on the wafer scale and paves the way for the practical application of SOT-based technology.

Observation of charge to spin conversion in Weyl semimetal WTe2 at room temperature

Discovery of topological Weyl semimetals has revealed the opportunities to realize several extraordinary physical phenomena in condensed matter physics. Specifically, these semimetals with strong spin-orbit coupling, broken inversion symmetry and novel spin texture are predicted to exhibit a large spin Hall effect that can efficiently convert the charge current to a spin current. Here we report the direct experimental observation of a large spin Hall and inverse spin Hall effects in Weyl semimetal WTe2 at room temperature obeying Onsager reciprocity relation. We demonstrate the detection of the pure spin current generated by spin Hall phenomenon in WTe2 by making van der Waals heterostructures with graphene, taking advantage of its long spin coherence length and spin transmission at the heterostructure interface. These experimental findings well supported by ab initio calculations show a large charge-spin conversion efficiency in WTe2; which can pave the way for utilization of spin-orbit induced phenomena in spintronic memory and logic circuit architectures.

Design of an erasable spintronics memory based on current-path-dependent field-free spin orbit torque

Spin orbit torque magnetic random access memory (SOT-MRAM) has attracted massive research interests due to its promising application potential in high-speed computing systems (e.g. upper level caches). Here we propose an erasable spintronics memory based on a novel field-free SOT switching mechanism. The data writing is achieved through erase and subsequent program operations, both of which are implemented with unidirectional currents. For improving the storage density, the erase operation is shared by multiple bit-cells, meanwhile some access transistors could be replaced with diodes thanks to the use of unidirectional currents. The simulation results demonstrate that the proposed erasable spintronics memory is featured by sub-nanosecond write speed, femto-joule write energy and higher storage density than the conventional SOT-MRAMs.