Single-layer Graphene Transistors Research Articles

Graphene FETs with high and low mobilities have universal temperature-dependent properties

We use phenomenological modelling and detailed experimental studies of charge carrier transport to investigate the dependence of the electrical resistivity, ρ, on gate voltage, V g , for a series of monolayer graphene field effect transistors with mobilities, μ, ranging between 5000 and 250 000 cm2 V−1 s−1 at low-temperature. Our measurements over a wide range of temperatures from 4 to 400 K can be fitted by the universal relation for all devices, where is the resistivity maximum at the neutrality point and δn is an ‘uncertainty’ in the bipolar carrier density, given by the full width at half maximum of the resistivity peak expressed in terms of carrier density, n. This relation is consistent with thermal broadening of the carrier distribution and the presence of the disordered potential landscape consisting of so-called electron–hole puddles near the Dirac point. To demonstrate its utility, we combine this relation with temperature-dependent linearised Boltzmann transport calculations that include the effect of optical phonon scattering. This approach demonstrates the similarity in the temperature-dependent behaviour of carriers in different types of single layer graphene transistors with widely differing carrier mobilities. It can also account for the relative stability, over a wide temperature range, of the measured carrier mobility of each device.

Effect of Extrinsic Disorder on the Magnetoresistance Response of Gated Single-Layer Graphene Devices.

Analogous to the case of classical metal oxide semiconductor field-effect transistors, transport properties of graphene-based devices are determined by scattering from adventitious charged impurities that are invariably present. The presence of charged impurities renders experimental graphene samples "extrinsic" in that their electrical performances also depend on the environment in which graphene operates. While the role of such an extrinsic disorder component has been studied for conventional charge transport in graphene, its impact on the magnetotransport remains unexplored. Here, we show that single-layer graphene transistors with a low density of extrinsic disorder feature a larger magnetoresistance (MR) than those with a high density. Importantly, in gated single-layer devices with a low density of charged impurities, we find that MR peaks at gate voltage values far from the charge neutrality point not only at a low temperature but also at room temperature; in particular, MR approaches 800% at room temperature and 1400% at 50 K in such devices. In addition, dynamic measurements of MR on devices with a low degree of extrinsic disorder lead to stable and reliable single-layer graphene magnetosensors endowed with an ultralow power consumption of 2.5 nW. Our work indicates that the initial value of the minimum conductivity σ0 at room temperature along with carrier mobility must be looked at to select the most promising devices for magnetosensing.

Velocity Saturation Effect on Low Frequency Noise in Short Channel Single Layer Graphene Field Effect Transistors

Graphene devices for analog and RF applications are prone to Low Frequency Noise (LFN) due to its upconversion to undesired phase noise at higher frequencies. Such applications demand the use of short channel graphene transistors that operate at high electric fields in order to ensure a high speed. Electric field is inversely proportional to device length and proportional to channel potential so it gets maximized as the drain voltage increases and the transistor length shrinks. Under these conditions though, short channel effects like Velocity Saturation (VS) should be taken into account. Carrier number and mobility fluctuations have been proved to be the main sources that generate LFN in graphene devices. While their contribution to the bias dependence of LFN in long channels has been thoroughly investigated, the way in which VS phenomenon affects LFN in short channel devices under high drain voltage conditions has not been well understood. At low electric field operation, VS effect is negligible since carriers velocity is far away from being saturated. Under these conditions, LFN can be precicely predicted by a recently established physics-based analytical model. The present paper goes a step furher and proposes a new model which deals with the contribution of VS effect on LFN under high electric field conditions. The implemented model is validated with novel experimental data, published for the first time, from CVD grown back-gated single layer graphene transistors operating at gigahertz frequencies. The model accurately captures the reduction of LFN especially near charge neutrality point because of the effect of VS mechanism. Moreover, an analytical expression for the effect of contact resistance on LFN is derived. This contact resistance contribution is experimentally shown to be dominant at higher gate voltages and is accurately described by the proposed model.

The effect of ultraviolet light on structural properties of exfoliated and CVD graphene

We investigate the effect of UV processing of graphene with different structural properties prepared by mechanical exfoliation and CVD growth. Depending on UV exposure time, we observe different effects like oxidation, doping, and etching. For bi-layered and few-layered graphene flakes, we do not observe significant etching even after 3 h exposure which indicates the high resistance of graphene to reactive oxygen species intercalation between graphene layers. Single-layer CVD-grown graphene is fully etched after 2 h of UV treatment. The crystalline size of exfoliated single layer graphene after UV exposure drops from 45 to 5 nm while for CVD graphene from just 10 to 2 nm. We investigate the effect of UV irradiation on field effect transistors, demonstrating sequential cleaning from polymer residuals, oxidation (doping), and final etching of graphene. After 30 minutes of UV irradiation, we observe the hole mobility of a CVD single layer graphene transistor increasing up to 400 cm2/V·s.

Single-layer graphene doping through molecular interaction: field-effect transistor and atomic force microscopy investigations

AbstractThe single-layer graphene has attracted considerable attention for the promising applications in new generation nanoelectronics and optoelectronics devices because of the high deal carrier mobility. Present investigations deal with the effect of chemical/molecular doping with varying the concentration of strong electron acceptor molecule such as tetracyanoethylene (TCNE) on transfer characteristics of single-layer graphene transistor. The Dirac point shift toward the positive gate voltage as a function of increasing concentration of TCNE molecules clearly indicates that the graphene is P-type doped. Our results indicate that the fermi energy level can be controlled by the amount of molecular doping in order to obtain graphene transistors with tunable Dirac points, which can be easily configured into functional nanoelectronic devices.

Transistors: Charge Transfer and Current Fluctuations in Single Layer Graphene Transistors Modified by Self‐Assembled C60 Adlayers (Small 14/2013)

Transistors: Charge Transfer and Current Fluctuations in Single Layer Graphene Transistors Modified by Self‐Assembled C₆₀ Adlayers (Small 14/2013)

Charge Transfer and Current Fluctuations in Single Layer Graphene Transistors Modified by Self‐Assembled C60 Adlayers

Flicker noise in a "fullerene + graphene" hybrid transistor is investigated to reveal the electrical coupling between the graphene channel and C60 adsorbates. The charge trapping and detrapping events at the C60 /graphene interface induce current fluctuations in the devices. The evolution of noise characteristics at varying temperatures indicates the different contributions related to Coulomb scattering and charge exchange kinetics.

Graphene Transistors and Photodetectors

Single layer graphene transistors demonstrate low ION/IOFF ratio at room temperature. While they show promising results when applied for high-speed analog circuits in the gigahertz range, their implementation for logic devices is not favorable. Opening the band gap by means of quantum confinement improves the ION/IOFF dramatically, but at the cost of decrease of device channel mobility. Therefore, graphene based FET research will be concentrated around the band-gap opening in bilayer graphene (BLG) by means of vertical electric fields. Although there are several challenging points in the realization of BLG-FET, it has a chance to demonstrate high enough ION/IOFF ratio at a moderate carrier mobility. It is reasonable to assume that future graphene device research will also keep a strong focus on the tunneling or variable-barrier configuration structures.

Double Contacts for Improved Performance of Graphene Transistors

A new double-contact geometry for graphene devices is studied and compared to traditional top contacts. Double contacts consist of metal below and above the graphene in a sandwich-type configuration. Four-probe structures were tested for both single-layer [chemical-vapor-deposition (CVD)-grown] graphene and bilayer (mechanically exfoliated) graphene, with both showing a decrease in contact resistance of at least 40% and an increase in transconductance greater than 20%. CVD-grown single-layer graphene transistors exhibited contact resistance as low as 260 Ω·μm, with an average of 320 Ω·μm. This new geometry can help minimize the impact of contacts on graphene device performance.

The electrical properties of graphene modified by bromophenyl groups derived from a diazonium compound

Graphene field-effect transistors were fabricated with mechanically exfoliated single-layer graphene (SLG) and bilayer graphene (BLG) sheets and the functionalization effects of bromophenyl groups derived from a diazonium compound on its transfer properties were explored. Spectroscopic and electrical studies reveal that the bromophenyl grafting imposes p-doping to both SLG and BLG. The modification of SLG by bromophenyl groups significantly reduces the hole carrier mobility and the saturation current in SLG transistors, suggesting an increase in both long-range impurity and short-range defect scattering. Unexpectedly, the bromophenyl group functionalization on BLG does not obviously increase both types of scattering, indicating that the BLG is relatively more resistant to charge- or defect-induced scattering. The results indicate that chemical modification is a simple approach to tailor the electrical properties of graphene sheets with different numbers of layers.

Effects of Nanoscale Contacts to Graphene

Understanding and optimizing transport between metal contacts and graphene is one of the foremost challenges for graphene devices. In this letter, we present the first results on the effects of reducing contact dimensions to the nanoscale in single-layer graphene transistors. Using noninvasive voltage probes to the graphene channel, the contact resistance was extracted and observed to increase dramatically at contact lengths below 200 nm. Also affected was the extrinsic transconductance, reducing by more than 70% when scaling the contacts from 200 to 50 nm. No significant change in performance per unit width was observed when reducing the contact/device width from 500 to 80 nm. These results provide key insights into the ultimate scalability of graphene transistors, particularly when considering them for a densely integrated technology.

Effective mobility of single-layer graphene transistors as a function of channel dimensions

A detailed analysis of the extracted back gated FET mobility as a function of channel length, channel width, and underlying oxide thickness for both exfoliated and chemical vapor deposited (CVD) graphene is presented. The mobility increases with increasing channel length eventually saturating at a constant value for channel lengths of several micrometers. The length dependence is consistent with the transition from a ballistic to diffusive transport regime. The mobility as a function of channel width first increases and then decreases. The increase in mobility for very small channel widths is consistent with a reduction in edge scattering. The decrease in mobility for larger channel widths is observed to be strongly dependent on the oxide thickness suggesting that electrostatics associated with fringing fields is an important effect. This effect is further confirmed by a comparative analysis of the measured mobility of graphene devices with similar channel dimensions on oxides of different thicknesses. The observed electrical measurements are in excellent agreement with theoretical studies predicting the width dependence of conductivity and mobility. The mobility of CVD grown graphene is slightly lower than that of exfoliated graphene but shows similar trends with length and width. The mobility values reported in the literature are in agreement with the trend reported here.

Electron accumulation in graphene by interaction with optically excited quantum dots

Zero-dimensional semiconductor nanocrystals (quantum dots) are known to interact with other metallic or semiconductor medium by means of resonant energy transfer or transfer of electronic charge. In the present work we demonstrate efficient electronic interaction of quantum dots and recently discovered graphene, single atom thick two-dimensional carbon crystal. Transfer of optically generated carriers from a quantum dot to graphene is seen by the quench of quantum dots photoluminescence and confirmed by the electrical measurements on single-layer graphene transistor. The phenomenon reported could find an application in graphene-based optical switching and light harvesting.

Triple-Mode Single-Transistor Graphene Amplifier and Its Applications

We propose and experimentally demonstrate a triple-mode single-transistor graphene amplifier utilizing a three-terminal back-gated single-layer graphene transistor. The ambipolar nature of electronic transport in graphene transistors leads to increased amplifier functionality as compared to amplifiers built with unipolar semiconductor devices. The ambipolar graphene transistors can be configured as n-type, p-type, or hybrid-type by changing the gate bias. As a result, the single-transistor graphene amplifier can operate in the common-source, common-drain, or frequency multiplication mode, respectively. This in-field controllability of the single-transistor graphene amplifier can be used to realize the modulation necessary for phase shift keying and frequency shift keying, which are widely used in wireless applications. It also offers new opportunities for designing analog circuits with simpler structure and higher integration densities for communications applications.

Electron properties of fluorinated single-layer graphene transistors

We have fabricated transistor structures using fluorinated single-layer graphene flakes and studied their electronic properties at different temperatures. Compared with pristine graphene, fluorinated graphene has very large and strongly temperature dependent resistance in the electro-neutrality region. We show that fluorination creates a mobility gap in graphene's spectrum where electron transport takes place via localised electron states.

Single-layer graphene on Al2O3/Si substrate: better contrast and higher performance of graphene transistors

The fact that single-layer graphene can be visualized on 300 nmSiO2/Si substrate using an optical microscope has enabled the facile fabrication of single-layergraphene devices for fundamental studies and potential applications. Here we report on anAl2O3/Si substrate for the fabrication of graphene devices with better contrast and higherperformance. Our studies show that the contrast of single-layer graphene on 72 nmAl2O3/Si substrate is much better than that of single-layer graphene on 300 nmSiO2/Si substrate. Moreover, the transconductance of single-layer graphene transistors onAl2O3/Si substrate shows a more than sevenfold increase, due to the smallerdielectric thickness and higher dielectric constant in a 72 nmAl2O3 film. These studies demonstrate a new and superior substrate for the fabrication ofgraphene transistors, and are of significance for both fundamental studies and technologicalapplications.

Transfer-Free Batch Fabrication of Single Layer Graphene Transistors

Full integration of graphene into conventional device circuitry would require a reproducible large scale graphene synthesis that is compatible with conventional thin film technology. We report the synthesis of large scale single layer graphene directly onto an evaporated copper film. A novel fabrication method was used to directly pattern these graphene sheets into devices by simply removing the underlying copper film. Raman and conductance measurements show that the mechanical and electrical properties of our single layer graphene are uniform over a large area, ( Ferrari, A. C. et al. Phys. Rev. Lett. 2006, 97, 187401.) which leads to a high device yield and successful fabrication of ultra long (>0.5 mm) graphene channels. Our graphene based devices present excellent electrical properties including a promising carrier mobility of 700 cm(2)/V.s and current saturation characteristics similar to devices based on exfoliated graphene ( Meric, I.. et al. Nat Nanotechnol. 2008, 3, 654-659).

Low-frequency electronic noise in the double-gate single-layer graphene transistors

The authors report the results of an experimental investigation of the low-frequency noise in the double-gate graphene transistors. The back-gate graphene devices were modified via addition of the top gate separated by ∼20 nm of HfO2 from the single-layer graphene channels. The measurements revealed low flicker noise levels with the normalized noise spectral density close to 1/f (f is the frequency) and Hooge parameter αH≈2×10−3. The analysis of noise spectral density dependence on the top and bottom gate biases helped to elucidate the noise sources in these devices. The obtained results are important for graphene electronic and sensor applications.

Energy Dissipation in Graphene Field-Effect Transistors

We measure the temperature distribution in a biased single-layer graphene transistor using Raman scattering microscopy of the 2D-phonon band. Peak operating temperatures of 1050 K are reached in the middle of the graphene sheet at 210 kW cm(-2) of dissipated electric power. The metallic contacts act as heat sinks, but not in a dominant fashion. To explain the observed temperature profile and heating rate, we have to include heat flow from the graphene to the gate oxide underneath, especially at elevated temperatures, where the graphene thermal conductivity is lowered due to umklapp scattering. Velocity saturation due to phonons with about 50-60 meV energy is inferred from the measured charge density via shifts in the Raman G-phonon band, suggesting that remote scattering (through field coupling) by substrate polar surface phonons increases the energy transfer to the substrate and at the same time limits the high-bias electronic conduction of graphene.