Domain Signal Processing Research Articles

Frequency domain processing techniques for pulse shape modulated ultra wideband systems

In this paper, two frequency domain signal processing techniques for pulse shape modulation (PSM) ultra wideband (UWB) systems are presented. Firstly, orthogonal detection of UWB PSM Hermite pulses in frequency domain is addressed. It is important because time domain detection by correlation-based receivers is severely degraded by many sources of distortion. Pulse- shape, the information conveying signal characteristic, is deformed by AWGN and shape-destructive addition of multiple paths from the propagation channel. Additionally, because of the short nature of UWB pulses, timing mismatches and synchronism degrade the performance of PSM UWB communication systems. In this paper, frequency domain orthogonality of the Hermite pulses is exploited to propose an alternative detection method, which makes possible efficient detection of PSM in dense multipath channel environments. Secondly, a ranging method employing the Cepstrum algorithm is proposed. This method is partly processed in the frequency domain and can be implemented without additional hard- ware complexity in the terminal.

The Design of an Allo-Optical Packet Switching Network

Recent advances in the all-optical signal processing domain report high-speed and nontrivial functionality directly implemented in the optical layer. These developments mean that the all- optical processing of packet headers has a future. In this article we address various important control plane issues that must be resolved when designing networks based on all-optical packet-switched nodes.

Area-Power Efficient VLSI Implementation of Multichannel DWT for Data Compression in Implantable Neuroprosthetics

Time-frequency domain signal processing of neural recordings, from high-density microelectrode arrays implanted in the cortex, is highly desired to ease the bandwidth bottleneck associated with data transfer to extra-cranial processing units. Because of its energy compactness features, discrete wavelet transform (DWT) has been shown to provide efficient data compression for neural records without compromising the information content. This paper describes an area-power minimized hardware implementation of the lifting scheme for multilevel, multichannel DWT with quantized filter coefficients and integer computation. Performance tradeoffs and key design decisions for implantable neuroprosthetics are presented. A 32-channel 4-level version of the circuit has been custom designed in 0.18-mum CMOS and occupies only 0.22 mm(2) area and consumes 76 muW of power, making it highly suitable for implantable neural interface applications requiring wireless data transfer.

A SystemC-Based Design Methodology for Digital Signal Processing Systems

Digital signal processing algorithms are of big importance in many embedded systems. Due to complexity reasons and due to the restrictions imposed on the implementations, new design methodologies are needed. In this paper, we present a System C-based solution supporting automatic design space exploration, automatic performance evaluation, as well as automatic system generation for mixed hardware/software solutions mapped onto FPGA-based platforms. Our proposed hardware/software codesign approach is based on a System C-based library called SysteMoC that permits the expression of different models of computation well known in the domain of digital signal processing. It combines the advantages of executability and analyzability of many important models of computation that can be expressed in SysteMoC. We will use the example of an MPEG-4 decoder throughout this paper to introduce our novel methodology. Results from a five-dimensional design space exploration and from automatically mapping parts of the MPEG-4 decoder onto a Xilinx FPGA platform will demonstrate the effectiveness of our approach.

RMS value measurement based on classical and modified digital signal processing algorithms

If the RMS value is obtained by digital processing of a sequence of signal samples, both the uncertainty and the bias of the measured value depend on the algorithm used. Since in practice signal sampling is usually non-coherent, leakage occurs in the signal DFT spectrum and the definition of the RMS of periodic signals in the time domain is violated. This paper presents an overview of estimation of RMS values by comparing five different DSP algorithms of RMS measurements by non-coherent sampling from the point of view of measurement bias and uncertainty for various leakage levels and the data window used. The results of simulations and examples of measurements are evaluated for both monofrequency and multifrequency signals. For non-coherent signal sampling, we compare time domain signal processing based on signal windowing with classical RMS estimation. This is shown to be an effective approach to RMS value measurement. A new method for finding the exact signal frequency by non-coherent sampling is introduced, and a method for effective RMS value bias correction in the frequency domain is presented. Methods for estimating RMS values in the time and frequency domains are compared.

Utilizing the auditory systems processing capabilities in the development of methods to auto-steer signal processing strategies in hearing instruments

Hearing instruments have evolved in both the hardware and signal processing domains, providing more computational capabilities and sophisticated sound processing strategies. Static or adaptive methods are employed by these sound processing strategies to achieve a desired output. Due to the adaptive nature of some of these processing strategies and the continual increase in the number of parameters that can interact negatively with each other, there is a need to provide some method of global control over the parameter states. In addition, due to individual needs of the end user, parameter states in a hearing instrument may not satisfy the broad range of acoustic environments that a listener encounters, so identification of particular acoustic environment characteristics is also important. The purpose of this work is to introduce and discuss these problems and some of the current research efforts addressing environmental classification and global control of a hearing instrument’s parameter states. The scope of this discussion will be on strategies employed to meet the needs of the end user in reference to the acoustic environment they identify as having a negative impact on their auditory experience and the desired performance they expect from the hearing instrument in that environment.

Feature selection using Haar wavelet power spectrum.

BackgroundFeature selection is an approach to overcome the 'curse of dimensionality' in complex researches like disease classification using microarrays. Statistical methods are utilized more in this domain. Most of them do not fit for a wide range of datasets. The transform oriented signal processing domains are not probed much when other fields like image and video processing utilize them well. Wavelets, one of such techniques, have the potential to be utilized in feature selection method. The aim of this paper is to assess the capability of Haar wavelet power spectrum in the problem of clustering and gene selection based on expression data in the context of disease classification and to propose a method based on Haar wavelet power spectrum.ResultsHaar wavelet power spectra of genes were analysed and it was observed to be different in different diagnostic categories. This difference in trend and magnitude of the spectrum may be utilized in gene selection. Most of the genes selected by earlier complex methods were selected by the very simple present method. Each earlier works proved only few genes are quite enough to approach the classification problem [1]. Hence the present method may be tried in conjunction with other classification methods. The technique was applied without removing the noise in data to validate the robustness of the method against the noise or outliers in the data. No special softwares or complex implementation is needed. The qualities of the genes selected by the present method were analysed through their gene expression data. Most of them were observed to be related to solve the classification issue since they were dominant in the diagnostic category of the dataset for which they were selected as features.ConclusionIn the present paper, the problem of feature selection of microarray gene expression data was considered. We analyzed the wavelet power spectrum of genes and proposed a clustering and feature selection method useful for classification based on Haar wavelet power spectrum. Application of this technique in this area is novel, simple, and faster than other methods, fit for a wide range of data types. The results are encouraging and throw light into the possibility of using this technique for problem domains like disease classification, gene network identification and personalized drug design.

Efficient, recursively implemented differential operator, with application to edge detection

The estimation of derivatives is an important and sensitive task in digital image processing and analysis, both accuracy and computational efficiency being expected of a differential operator. Here we propose a new filter—designed through a strategy based on the Green’s function of a signal matching equation—that responds to such demands. When used for edge detection, it yields theoretical performance indices that rival, and even top, the best reported marks. It is also computationally efficient, allowing very simple recursive implementation. The results of extensive edge-detection experimentation are reported here. Being explicitly designed as a first-derivative operator, our filter should also find application in other signal processing domains.

A formal method for hardware IP design and integration under I/O and timing constraints

IP integration, which is one of the most important SoC design steps, requires taking into account communication and timing constraints. In that context, design and reuse can be improved using IP cores described at a high abstraction level. In this paper, we present an IP design approach that relies on three main phases: (1) constraint modeling, (2) IP constraint analysis steps for feasibility checking, and (3) synthesis. We propose a set of techniques dedicated to the digital signal processing domain that lead to an optimized IP core integration. Based on a generic architecture of components, the method we propose provides automatic generation of IP cores designed under integration constraints. We show the effectiveness of our approach with a DCT core design case study.

CORDIC-based unified VLSI architecture for implementing window functions for real time spectral analysis

Frequency analysis using DFT (discrete Fourier transform) or its faster computational technique (FFT) is an obvious choice for the entire image and signal processing domain where spectral leakage or picket fence effect is a major problem. Earlier works describe the software and ROM-based implementation of windowing functions to overcome the above-mentioned problems during spectral analysis. In this work we have proposed a CORDIC (co-ordinate rotation digital computer)-based unified windowing architecture to remove the spectral leakage, picket fence effect and resolution problems with different tradeoff between mainlobe and sidelobe in the frequency domain. A parallel-pipelined architecture has been adopted for the present design to ensure high throughput for real-time applications with the latency equal to twice of CORDIC length plus three extra cycles. This unified architecture includes a combination of linear CORDIC and circular CORDIC with FIFO and a few multiplexers where the selection of window and its length are user defined. We have synthesised this architecture with 0.18 μm CMOS technology using Synopsys Design Analyser. The total estimated dynamic power was found to be 350 mW with an operating frequency of 125 MHz and total cell area 11 mm2 (approximately).

Fourier-domain biophotoacoustic subsurface depth selective amplitude and phase imaging of turbid phantoms and biological tissue

A novel photothermoacoustic imaging modality utilizing a frequency-swept (chirped) intensity-modulated laser source and coherent frequency domain signal processing ("biophotoacoustics") was introduced for noninvasive imaging of biological tissues. The developed frequency-domain imaging system takes advantage of linear frequency modulation waveforms to relate depth of tissue chromophores to the frequency spectrum of the detected acoustic response and of a narrow signal detection bandwidth to improve signal-to-noise ratio (SNR). Application of frequency-domain photothermoacoustic (FD-PTA) imaging was demonstrated using turbid phantoms and ex-vivo specimens of chicken breast with embedded absorbing inclusions simulating tumors.

SPIRAL: Code Generation for DSP Transforms

Fast changing, increasingly complex, and diverse computing platforms pose central problems in scientific computing: How to achieve, with reasonable effort, portable optimal performance? We present SPIRAL, which considers this problem for the performance-critical domain of linear digital signal processing (DSP) transforms. For a specified transform, SPIRAL automatically generates high-performance code that is tuned to the given platform. SPIRAL formulates the tuning as an optimization problem and exploits the domain-specific mathematical structure of transform algorithms to implement a feedback-driven optimizer. Similar to a human expert, for a specified transform, SPIRAL "intelligently" generates and explores algorithmic and implementation choices to find the best match to the computer's microarchitecture. The "intelligence" is provided by search and learning techniques that exploit the structure of the algorithm and implementation space to guide the exploration and optimization. SPIRAL generates high-performance code for a broad set of DSP transforms, including the discrete Fourier transform, other trigonometric transforms, filter transforms, and discrete wavelet transforms. Experimental results show that the code generated by SPIRAL competes with, and sometimes outperforms, the best available human tuned transform library code.

General ICI Self-Cancellation Scheme for OFDM Systems

One of the challenges in designing orthogonal frequency-division multiplexing (OFDM) systems is their inherent sensitivity to any frequency shift in the signal. A frequency offset between the local oscillators at the transmitter and receiver causes a single frequency shift in the signal, while a time-varying channel can cause a spread of frequency shifts known as the Doppler spread. Frequency shifts ruin the orthogonality of OFDM subcarriers and cause intercarrier interference (ICI); therefore, quickly diminishing the performance of the system. ICI self-cancellation schemes have been proposed to reduce the sensitivity of OFDM systems to frequency shifts. These schemes use signal processing and frequency domain coding to reduce the amount of ICI generated as a result of frequency shifts, with little additional computational complexity. These methods can be used as an alternative to the fine frequency-offset estimation methods to battle oscillator frequency offset or simply be used as an ICI mitigation technique when the system is operating over time-varying channels. We propose a general ICI self-cancellation scheme that can be implemented through windowing at the transmitter and receiver. We show that the previously proposed self-cancellation schemes are equivalent to special cases of this method. Through theoretical analysis of the signal-to-interference ratio and bit-error rate and the use of Monte Carlo simulations, we demonstrate that the proposed system considerably outperforms the existing systems in the presence of frequency offset or time variations in the channel. We consider both coherent and noncoherent systems.

Bistability threshold inside hysteresis loop of nonlinear fiber Bragg gratings

We show the Cross Phase Modulation (XPM) effect between CW probe that operates in bistability region and strong Gaussian pump in a Fiber Bragg Grating (FBG) by Implicit 4th Order Runge-Kutta Method. The XPM effect results in three unique nonlinear switching behaviors of the probe transmission depending on the pump peak intensity and its Full Width Half Maximum (FWHM) value. From this observation, we offer the FBG three potential nonlinear switching applications in all-optical signal processing domain as: a step-up all-optical switching, an all-optical inverter, and an all-optical limiter. The bistability threshold that determines the nonlinear switching behaviors of probe transmission after Gaussian pump injection is defined numerically and shown to be equivalent to the unstable state inside hysteresis loop.

Implementing an OFDM receiver on the RaPiD reconfigurable architecture

Field-programmable gate arrays (FPGAs) have become an extremely popular implementation technology for custom hardware because they offer a combination of low cost and very fast turnaround. Because of their in-system reconfigurability, FPGAs have also been suggested as an efficient replacement for application-specific integrated circuits (ASICs) and digital signal processors (DSPs) for applications that require a combination of high performance, low cost, and flexibility. Unfortunately, the use of FPGAs in mobile embedded systems platforms is hampered by the very large overhead of FPGA-based architectures. Coarse-grained configurable architectures can reduce this overhead substantially by taking advantage of the application domain to specialize the reconfigurable architecture via coarse-grained components and interconnects. This paper presents the design and implementation of an OFDM receiver in the RaPiD reconfigurable architecture as a case study for comparing the relative cost and performance of ASIC, DSP, FPGA, and coarse-grained reconfigurable architectures. RaPiD is a coarse-grained reconfigurable architecture specialized to the domain of signal and image processing. The RaPiD architecture provides a reconfigurable pipelined datapath controlled by efficient reconfigurable control logic: We have implemented the computationally intensive parts of an OFDM receiver on the RaPiD architecture and have developed careful estimates of corresponding implementations in representative ASIC, DSP and FPGA technology. Our results show that, for this application, RaPiD fills the cost/performance gap between programmable DSP and ASIC architectures, achieving a factor of 6 better than a DSP implementation but a factor of 6 less than an ASIC implementation.

PATTERN DYNAMICS IN A NONLINEAR ELECTRICAL LATTICE

In this paper, we present experiments using a nonlinear electrical line, modeling the FitzHugh–Nagumo equation, without recovery term. Different patterns are studied according to the parameters of this medium and initial conditions. We then propose to apply these results to the domain of signal processing. We show that erosion and dilation of a binary signal, two kinds of binarization — one depending on an amplitude threshold, the other on an energetical threshold — and nonlinear filtering allowing noise removal can be obtained in the same medium.

PACT XPP—A Self-Reconfigurable Data Processing Architecture

The eXtreme Processing Platform (XPPTM) is a new runtime-reconfigurable data processing architecture. It is based on a hierarchical array of coarsegrain, adaptive computing elements, and a packet-oriented communication network. The strength of the XPPTM technology originates from the combination of array processing with unique, powerful run-time reconfiguration mechanisms. Parts of the array can be configured rapidly in parallel while neighboring computing elements are processing data. Reconfiguration is triggered externally or even by special event signals originating within the array, enabling self-reconfiguring designs. The XPPTM architecture is designed to support different types of parallelism: pipelining, instruction level, data flow, and task level parallelism. Therefore this technology is well suited for applications in multimedia, telecommunications, simulation, signal processing (DSP), graphics, and similar stream-based application domains. The anticipated peak performance of the first commercial device running at 150 MHz is estimated to be 57.6 GigaOps/sec, with a peak I/O bandwidth of several GByte/sec. Simulated applications achieve up to 43.5 GigaOps/sec (32-bit fixed point).

Virtual benchmarking and model continuity in prototyping embedded multiprocessor signal processing systems

The complexity of hardware/software codesign of embedded real-time signal processing systems can be reduced by rapid system prototyping (RSP). However, existing RSP frameworks do not provide a sound specification and design methodology (SDM) because they require the designer to choose the implementation target before specification and design exploration and they do not work together coherently across development stages. This paper presents a new SDM, called MAGIC, that allows the designer to capture an executable specification model for use in design exploration to find the optimal multiprocessor technology before committing to that technology. MAGIC uses a technique called benchmarking, for early validation of promising architectures. The MAGIC SDM also exploits emerging open-standards computation and communication middleware to establish model continuity between RSP frameworks. This methodology has been validated through the specification and design of a moderately complex system representative of the signal processing domain: the RASSP Synthetic Aperture Radar benchmark. In this case study, MAGIC achieves three orders of magnitude speedup over existing virtual prototyping approaches and demonstrates the ability to evaluate competitive technologies prior to implementation. Transfer of this methodology to the system-on-a-chip domain using Cadence's Virtual Component Codesign infrastructure is also discussed with promising results.

Unified CORDIC-based chip to realise DFT∕DHT∕DCT∕DST

Frequency analysis using the DFT, the DHT, the DCT or the DST is an obvious choice for the entire image and signal processing domain. A chip has been designed to obtain a unified architecture for the DFT/DHT/DCT/DST called DXT. For the low-power budget of many signal processing requirements, e.g. biomedical signal processing, a parallel and pipelined architecture is adopted for the unified design. The parallelism environment provides a real-time and low-power application of biomedical and other signal processing requirements, whereas the pipelined structure ensures high throughput of the design. The DXT architecture uses a CORDIC unit as the basic processing element. The UMC library (europractice) of 0.25 micron CMOS technology has been used to obtain a DXT chip of transform length ‘7’ for the synchronous design. The total dynamic power was found to be 204.89 mW, with an operating frequency of 160 MHz and an operating voltage of 2.5 V.

C-HEAP: A Heterogeneous Multi-Processor Architecture Template and Scalable and Flexible Protocol for the Design of Embedded Signal Processing Systems

The key issue in the design of Systems-on-a-Chip (SoC) is to trade-off efficiency against flexibility, and time to market versus cost. Current deep submicron processing technologiesenable integration of multiple software programmable processors (e.g., CPUs,DSPs) and dedicated hardware components into a single cost-efficient IC. Ourtop-down design methodology with various abstraction levels helps designingthese ICs in a reasonable amount of time. This methodology starts with a high-levelexecutable specification, and converges towards a silicon implementation.A major task in the design process is to ensure that all components (hardwareand software) communicate with each other correctly. In this article, we tacklethis problem in the context of the signal processing domain in two ways: wepropose a modular, flexible, and scalable heterogeneous multi-processor architecturetemplate based on distributed shared memory, and we present an efficient andtransparent protocol for communication and (re)configuration. The protocolimplementations have been incorporated in libraries, which allows quick traversalof the various abstraction levels, so enabling incremental design. The designdecisions to be taken at each abstraction level are evaluated by means of(co-)simulation. Prototyping is used too, to verify the system's functionalcorrectness. The effectiveness of our approach is illustrated by a designcase of a multi-standard video and image codec.