Si Interface Quality Research Articles

Improvement of transparent conductive indium tin oxide based multilayer films on p-silicon through the inclusion of thin copper-aluminium metals interlayer

The distinguished transparent conductive indium tin oxide (ITO) based multilayer films with thin copper-aluminium (Cu-Al) metals interlayer (ITO/Cu-Al/ITO) were prepared on p-type silicon (Si) by radio frequency and direct current magnetron sputtering methods. The ITO/Cu-Al/ITO (ICAI) films structural, topological, optical and electrical properties coupled with electronic properties of ICAI/p-type Si interface were investigated at different post annealing temperature up to 600 °C. Despite the inclusion of Cu-Al metals interlayer, structural analysis results yielded an amorphous structure for the as-deposited films. The films become polycrystalline with a cubic bixbyite structure after post annealing treatment. Dominant In2O3 (222) and Cu (111) peaks intensities were observed at 500 °C and 600 °C indicating substantial enhancement in the films crystallinity at high moderate temperatures. The ICAI films reveal a smooth surface roughness with improved growth in grain size after post annealing treatment as examined by microscopic equipment.The films optical transmittance promptly increased from 73.2% (for as deposited film) to 88.7% (for annealed film at 600 °C) at 470 nm in the visible region with increasing post annealing temperature. The film annealed at 600 °C exhibits excellent electrical characteristics with a very low electrical resistivity of 2.44 × 10−5 Ω cm and sheet resistance of 3.26 Ω/sq. The ICAI films optoelectronic properties as calculated by figure of merit (FOM) show outstanding performance at 600 °C with a high FOM of 92.47 × 10−3 Ω−1 in spite of the reduced ITO films thickness. In addition, admirable ICAI/p-type Si interface quality was observed after post annealing treatment (at 600 °C) as indicated by current-voltage characteristics results. These improved ICAI multilayer films can be favourable for silicon heterojunction solar cells and other low resistance optoelectronic applications.

The improvement of Si0.5Ge0.5/Si interface quality by using low energy hydrogen plasma cleaning process and positron annihilation spectroscopy

Positron Annihilation Spectra (PAS), Raman, and photoluminescence spectroscopy reveal that Si 0.5 Ge 0.5 /Si interface quality can be dramatically improved through a low energy plasma cleaning process using hydrogen. In the PAS, the particularly small values of lifetime and intensity near the Si 0.5 Ge 0.5 /Si interface in the treated sample indicate a 2.25 times reduction in defect concentration. Fewer defects were found in the interface, resulting in a high compressive strain of about 0.36 % in the top layer, which can be observed in Raman spectra, and a 1.39 times increase to the radiative recombination rate for the infrared emission, which can be observed in the photoluminescence spectra. Improved Si 0.5 Ge 0.5 /Si interface quality leads to improved optical and electrical characteristics in SiGe-based devices in a broader range of photovoltaic applications. The PAS is also shown to be a useful metrology tool for quantifying defects in SiGe-based devices.

Optimized Si0.5Ge0.5/Si Interface Quality by the Process of Low Energy Hydrogen Plasma Cleaning and Investigation by Positron Annihilation Spectroscopy

Positron Annihilation Spectra (PAS), Raman, and Photoluminescence spectroscopy reveal that Si0.5Ge0.5/Si interface quality can be significantly improved by the process of low energy plasma cleaning with hydrogen. In the PAS detection, the particularly small value of lifetime and intensity near the Si0.5Ge0.5/Si interface in the sample with the treatment indicate that the defect concentration is successfully reduced 2.25 times. Fewer defects existed in the interface result in the high compressive strain about 0.36% in the top epi-Si0.5Ge0.5 layer, which can be observed in the Raman spectra detection, and stronger radiative recombination rate about 1.39 times for the infrared emission, which can be observed in the photoluminescence spectra. With better interface quality, the SiGe-based devices can have better optical and electrical characteristics for more applications such as solar cells industry. The PAS is also demonstrated that it is the useful methodology tool to quantify the defect information in the SiGe-based devices.

Improved Si0.5Ge0.5/Si interface quality achieved by the process of low energy hydrogen plasma cleaning and investigation of interface quality with positron annihilation spectroscopy

The Positron Annihilation Spectra(PAS), Raman, and Photoluminescencespectroscopy reveal that Si0.5Ge0.5/Si interface quality can be significantly improved by the low energy plasma cleaning process using hydrogen. In the PAS, the particularly small value of lifetime and intensity near the Si0.5Ge0.5/Si interface in the sample with the treatment indicate that the defect concentration is successfully reduced 2.25 times, respectively. Fewer defects existed in the Si0.5Ge0.5/Si interface result in the high compressive strain about 0.36% in the top epi-Si0.5Ge0.5 layer, which can be observed in Raman spectra and stronger radiative recombination rate about 1.39 times for the infrared emission, which can be observed in the photoluminescencespectra. With better Si0.5Ge0.5/Si interface quality, the SiGe-based devices can have better optical and electrical characteristics for more applications in the industry. The PAS is also demonstrated that it is the useful methodology tool to quantify the defect information in the SiGe-based material.

A Novel Approach in Separating the Roles of Electrons and Holes in Causing Degradation in Hf-Based MOSFET Devices by Using Stress-Anneal Technique

A novel stress-anneal approach has been investigated to separate the role of electrons and hole charge trappings in Hf-based gate oxides. It is observed that heat treatment following a stress experiments on Hf-based MOSFET can effectively eliminate electron trapping in the oxide. We also report that hole accumulation in the bulk of the Hf-based dielectrics is primarily responsible for dielectric breakdown, though both holes and electrons are trapped in the dielectrics. The Si interface quality does not seem to degrade significantly

Metrology Challenges for 45-nm Strained-Si Device Technology

The semiconductor industry has maintained its historical exponential improvement in performance by aggressively scaling transistor dimensions. However, as devices approach sub-100-nm dimensions, scaling becomes more challenging and new materials are required to overcome the fundamental physical limitations imposed by existing materials. For example, as power supply voltages continue to decrease with successive scaling, enhancing carrier mobility using biaxially tensile-stressed Si on relaxed SiGe on SOI and on bulk substrates has become a viable option to sustain continual drive current increase without traditional scaling. Although the addition of strained-Si to conventional MOSFET devices is compatible with existing mainstream CMOS process technology, there are new device and process integration challenges, wafer quality monitoring demands, and stringent requirements for film morphology and strain uniformity, imposing new demands on material characterization. Material requirements for strained-Si CMOS devices include having uniform SiGe thickness, Ge composition, and strain distribution. These are required to maintain uniform device performance as well as low defect density for high minority carrier lifetimes and transconductance, as well as low surface roughness to minimize the impact of interface scattering on carrier mobilities. The parameters of interest in strained-Si CMOS technology include SiGe and Si channel thickness, Ge composition, strain, dislocation density, interface quality, and roughness. Nondestructive inline metrology techniques include spectroscopic ellipsometry for film thickness and Ge composition, X-ray reflectivity for thickness, density, and roughness measurements, X-ray fluorescence for Ge composition, UV-Raman spectroscopy for channel strain characterization, IR photoluminescence for defect detection, and X-ray diffraction for both Ge content and strain measurement. While most of these techniques are well established in the semiconductor industry, some will require development for application to volume manufacturing. This paper will focus on various metrology approaches used in strained-Si CMOS devices

Ultrathin gate oxide CMOS with nondoped selective epitaxial Si channel layer

The nondoped selective epitaxial Si channel technique has been applied to ultrathin gate oxide CMOS transistors. It was confirmed that drain current drive and transconductance are improved in the epitaxial channel MOSFETs with ultrathin gate oxides in the direct-tunneling regime. It was also found that the epitaxial Si channel noticeably reduces the direct-tunneling gate leakage current. The relation between channel impurity concentration and direct-tunneling gate leakage current was investigated in detail. It was confirmed that the lower leakage current in epitaxial channel devices was not completely explained by the lower impurity concentration in the channel. The results suggest that the improved leakage current in the epitaxial channel case is attributable to the improvement of some aspect of the oxide film quality, such as roughness or defect density, and that the improvement of the oxide film quality is essential for ultrathin gate oxide CMOS. AFM and 1/f noise results support that SiO/sub 2/-Si interface quality in epitaxial Si channel MOSFETs is improved. Good performance and lower leakage current of TiN gate electrode CMOS was also demonstrated.

Chemistry of SiO2 Plasma Deposition

The chemistry of deposition from undiluted and He‐diluted mixtures was studied by line‐of‐sight mass spectrometry of plasma species coupled with analysis of film IR absorption and dielectric properties. It was found that if RF power is sufficient to generate an O atom supply well in excess of that needed to convert all of the to , then clean IR spectra and high dielectric strength are obtained independent of dilution. Under these plasma conditions, many gas‐phase products of the form were detected. Their concentration increased steeply with the partial pressure of the reactants , and they are the likely source of the downstream particles and deposition rate loss which were seen at 130 Pa of reactant pressure. Reduction of reactant partial pressure to 13 Pa either by He dilution or by undiluted total pressure reduction eliminated these problems. No other effects of He dilution could be detected either in the plasma chemistry or in the film properties. Both concentration and electron trapping rate in the films were much higher than in thermal oxide and were unaffected by He dilution. There is some evidence that He plasma treatment does improve Si interface quality.

Sol-gel TiO 2 films on silicon substrates

Titanium dioxide (TiO 2) thin films have been prepared on silicon substrates by the sol-gel method. The properties of the resultant films are process dependent. The effects of solution content (type of titanium alkoxide, type of solvent, equivalent oxide concentration, [H 2O]/[Ti(OR) 4] ratio), gas moisture during deposition and heat treatment temperature on the film properties are discussed. The X-ray diffraction spectra, optical and electrical properties and TiO 2Si interface quality have been studied.