Si Gate Stacks Research Articles

Electrical properties of ferroelectric-gate FETs with SrBi2Ta2O9 formed using MOCVD technique

Ferroelectric-gate field-effect transistors (FeFETs) with a Pt/SrBi2Ta2O9/Hf-Al-O/Si gate stack were fabricated using the metal-organic chemical vapor deposition (MOCVD) technique to prepare the SrBi2Ta2O9 (SBT) ferroelectric layer. A good threshold voltage (V th) distribution was found for more than 90 n-channel FeFETs in one chip with a 170 nm SBT layer owing to the good film uniformity of the SBT layer deposited by MOCVD. The average memory window \((V_{\mathrm{w}}^{\mathrm{av}})\) and the standard deviations (σ thl,σ thr) of the left- and right-side branches of the drain-gate voltage curves of the FeFETs yielded a \(V_{\mathrm{w}}^{\mathrm{av}}/(\sigma_{\mathrm{thl}} + \sigma_{\mathrm{thr}})\) value of 5.45, indicating that the FeFETs can be adapted for large-scale-integration. The electric field, the energy band profile in the gate stack, and the gate leakage current were also investigated at high gate voltages. We found that the effect of Fowler–Nordheim tunneling appeared under these conditions. Because of the tunneling injection and trapping of electrons into the gate insulators, the operation voltage ranges of the FeFETs were limited by this tunneling.

Impact of high temperature annealing on La diffusion and flatband voltage (Vfb) modulation in TiN/LaOx/HfSiON/SiON/Si gate stacks

We present a detailed analysis of the impact of high temperature annealing on the chemical and electronic properties of TiN/HfSixOyNz/SiOxNy/Si gate stacks, where an ultra-thin LaOx capping layer (0.4–1 nm) is inserted between the TiN metal gate and the HfSixOyNz dielectric. From our experimental results, we demonstrate that La atoms diffuse through the entire nitrided hafnium silicate and reach the SiOxNy interfacial layer to form a La-silicate. In addition, hard x-ray photoelectron spectroscopy analysis highlights the band alignments’ shift of the gate stacks, which is well related to Vfb shifts based on an interfacial dipole and/or fixed charges model. Finally, this study reveals that the Vfb roll-off phenomenon is amplified with an increasing amount of La atoms near the substrate interface. A correlation between LaOx thickness and interface trap density (Dit) is observed, and a mechanism explaining the roll-off behavior is proposed.

Physical Mechanism of Threshold Voltage Modulation by Ge Channel Ion Implantation in the TiN/HfO2 Gate Stack Systems

We extensively investigated the physical origin of the threshold voltage VTH modulation by the Ge channel ion implantation (I/I) in HfO2/TiN/polycrystalline Si gate stack systems. The possible VTH modulation factors were carefully distinguished from each other by changing the channel dopant concentration and the thickness of the gate dielectric films. It was found that the changes in energy-band offset and dopant concentration in the channel region are minor factors of the VTH modulation. However, it was also found that ΔVTH is sensitive to the oxidation condition of the interfacial oxide layer; a longer oxidation induces a larger ΔVTH. From the X-ray spectroscopy, we found that a Ge pile-up at the interfacial layer/channel interface occurs, and that the VTH modulation range correlates well with the amount of piled-up Ge.

Effects of Metal Layer Insertion on EOT Scaling in TiN/Metal/La2O3/Si High-k Gate Stacks

Effects of a thin metal layer (W, Ta, or Mo) inserted at the interface between La2O3 high-k gate dielectric and TiN gate metal were studied. It was found that the inserted metal layer plays crucial role in determining the electrical characteristics of the TiN/Metal/La2O3/Si gate stack. Our results show that EOT can be scaled to 0.5nm and below by inserting a W layer with optimum thickness at the interface between La2O3 high-k gate dielectric and the TiN gate metal.

Recent Advances in Ferroelectric-Gate Field-Effect-Transistor Technology

Recent developments of ferroelectric-gate field-effect transistor (FeFETs) and their applications to integrated circuits are described. The FeFETs with Pt/SrBi2Ta2O9/Hf-Al-O/Si gate stacks possessing excellent data retention characteristics can also operate at elevated temperature and have small transistor threshold voltage (Vth) distribution. The Vth can be adjusted by controlling channel impurity density for both n-channel and p-channel FeFETs. These performance characteristics are now suitable for application to integrated circuits with nonvolatile functions. Fundamental properties for applications to ferroelectric-complementary-metal-oxide-semiconductor (FeCMOS) nonvolatile logic-circuits and to ferroelectric-NAND flash memories are demonstrated.

Thermal stability and chemical bonding states of AlO xN y/Si gate stacks revealed by synchrotron radiation photoemission spectroscopy

Annealing-temperature dependence of the thermal stability and chemical bonding states of AlO x N y /SiO 2/Si gate stacks grown by metalorganic chemical vapor deposition (MOCVD) using new chemistry was investigated by synchrotron radiation photoemission spectroscopy (SRPES). Results have confirmed the formation of the AlN and AlNO compounds in the as-deposited samples. Annealing the AlO x N y samples in N 2 ambient in 600–800 °C promotes the formation of SiO 2 component. Meanwhile, there is no formation of Al–O–Si and Al–Si binding states, suggesting no interdiffusion of Al with the Si substrate. A thermally induced reaction between Si and AlO x N y to form volatile SiO and Al 2O is suggested to be responsible for the full disappearance of the Al component that accompanies annealing at annealing temperature of 1000 °C. The released N due to the breakage of the Al–N bonding will react with the SiO 2 interfacial layer and lead to the formation of the Si 3–N–O/Si 2–N–O components at the top of Si substrate. These results indicate high temperature processing induced evolution of the interfacial chemistry and application range of AlO x N y /Si gate stacks in future CMOS devices.

Structural and electrical properties of fully strained (In,Ga)As field effect transistors with in situ deposited gate stacks

Metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated with amorphous Al2O3 and HfO2/SiOx–Si gate stacks, grown by molecular beam deposition. As and In oxides were observed at the Al2O3/In0.17Ga0.83As interface, whereas no oxides were detected on the Si-passivated In0.17Ga0.83As surface after HfO2 deposition. Traces of As were found in both gate stacks. Si-passivated MOSFETs, with a drain current of 2.8×103 μA/mm at Vg−Vt=2.0 V, Vd=1.0 V, Ion/Ioff=1×107, and inverse subthreshold slope of 98–120 mV/decade, show superior performance with respect to devices without Si interlayer.

Deposition of Niobium Nitride Thin Films from Tert‐Butylamido‐Tris‐(Diethylamido)‐Niobium by a Modified Industrial MOCVD Reactor

AbstractNiobium nitride thin films are deposited on 2″ silicon (100) wafers using a modified industrial metal‐organic (MO) CVD reactor of the type AIX‐200RF, starting from tert‐butylamido‐tris‐(diethylamido)‐niobium (TBTDEN) and ammonia. Films of thicknesses 50‐200 nm are deposited at temperatures ranging from 400 °C to 800 °C under reactor pressures of 1 and 5 mbar using various ammonia flow rates, and are characterized by the use of complementary techniques, namely X‐ray diffraction (XRD), scanning electron microscopy (SEM), secondary neutral mass spectrometry (SNMS), Rutherford backscattering spectrometry (RBS), X‐ray photoelectron spectroscopy (XPS), and electrical measurements. Films deposited above 450 °C consist of the cubic δ‐NbN phase, apart from the presence of Nb‐O and Nb‐O‐N species predominantly in the outermost film regions. The lowest specific resistivities, determined by four point probe measurements, are in the range 500–600 µΩ cm. A NbN/SiO2/p‐Si gate stack is fabricated using the grown niobium nitride films. From the capacitance‐voltage (C‐V)‐curves, flat‐band voltages are extracted which, when plotted against SiO2‐insulator thickness, yield a work function of 4.72 eV for as‐deposited films.

Effects of Al doping and annealing on chemical states and band diagram of Y2O3∕Si gate stacks studied by photoemission and x-ray absorption spectroscopy

The authors have investigated the effects of Al doping and annealing on the photoemission spectra and thermal stability of Y2O3∕Si gate stacks by photoemission spectroscopy and x-ray absorption spectroscopy. They have found that the SiO2 components diffuse into the Y2O3 layer by annealing, resulting in the formation of Y silicate; however, the formation of metallic Y silicide is not observed. The changes in valence- and conduction-band offsets by doping Y2O3 with Al with respect to both Al concentration and annealing temperature have been systematically investigated. With an increase in the Al concentration, the band offsets and band gaps increase and the conduction-band edges change nonlinearly.

1/ f noise study on strained Si 0.8Ge 0.2 p-channel MOSFETs with high-k/poly Si gate stack

The study of the low frequency (1/ f) noise of strained Si 0.8Ge 0.2 p-channel MOSFETs with poly Si/HfSiO x gate stacks is presented. Apart from the reduced threshold voltage, improved maximum transconductance and increased low-field mobility offered by the strained SiGe, the 1/ f noise was observed to be considerably lower than in the Si control devices. The 1/ f noise characteristics were likely originated by carrier number fluctuations (Δ n model) for both the strained SiGe and Si control pMOSFETs. This is consistent with the proposed model for high-k MOSFETs based on correlated number-mobility fluctuations theory. Despite the much worse high-k gate stack quality characterized by gate leakage and charge pumping, the relative reduction (up to 10×) in the noise for the strained SiGe over Si control with high-k is preserved, as was observed in the past for strained SiGe and Si control devices having SiO 2 gate dielectric, likely attributed to the existence of the Si cap layer.

Chemical-state-resolved In-depth analysis of TiN / La-O / HfSiO / Si Gate Stack Studied by Back-side Angle-resolved Photoemission Spectroscopy with Synchrotron Radiation

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Investigating the Interfacial Properties of Hf-based/Si and SiO2/Si Gate Stacks

AbstractAs complementary metal–oxide–semiconductor (CMOS) devices are scaled down into nano-region, SiO2 dielectric is approaching its physical and electrical limits. Hafnium based oxides are the most promising materials as a replacement for conventional gate dielectrics, due to its much higher dielectric constant (high-k) and stability. The aims of work were to investigate the interface-related issues associating with Hf-based/Si and SiO2/Si gate stacks. The interfacial properties of dielectric oxide/Si were studied by stacking a different dielectric layer (SiO2, HfSiO, and HfO2) on Si substrate. We studied the electrical behavior of dielectric oxide/Si interface by leakage current density-voltage (J-V) and capacitance-voltage (C-V) measurement techniques. The effects of the post-deposition annealing (PDA) treatment on the interface charges of dielectric oxides were presented. We found that the PDA can effectively reduce trapping density and the leakage current, and eliminate hysteresis in the C–V curves. The X-ray photoelectron spectroscopy (XPS) was applied for studying the surface chemical bonding energy at different gate stack structures. The XPS analysis provides a better interpretation of the electrical property. As results, HfSiO films have exhibited a superior performance in terms of thermal stability and electrical characteristics.

Control of oxidation and reduction reactions at HfSiO∕Si interfaces through N exposure or incorporation

Using synchrotron-radiation photoemission spectroscopy, we have investigated oxidation and reduction reactions of HfSiO(N)∕Si gate stack structures annealed in a N2 or O2 atmosphere. It is found that both oxidation and reduction reactions can be suppressed by using nitrogen-incorporated HfSiO films in the annealing process at proper partial pressure of N2 gas (PN2∼100Torr). The detailed analysis of “SiO2 equivalent thicknesses” for annealed HfSiO and HfSiON films reveals that ambient N2 gas suppresses only the reduction reaction, while nitrogen atoms incorporated in dielectrics suppress both oxidation and reduction reactions.

Thermal stability in a-Si/HfSiO(N)/Si gate stack structures studied by photoemission spectroscopy using synchrotron radiation

We have investigated thermal stability in amorphous-Si/HfSiO(N) gate stack structures using synchrotron-radiation photoemission spectroscopy. Core-level photoemission spectra depending on annealing temperature have revealed the mechanism of metallization reaction at the upper interface between a-Si cap layer and HfSiO(N) films under ultrahigh vacuum annealing. Silicidation reaction starts by annealing at 700 °C for both HfSiO and HfSiON films. By annealing at 800 °C, metallization reaction is rapidly promoted for the HfSiO film, while the Hf-silicide component changes into the Hf-nitride component due to its thermal stability and metallization reaction mildly proceeds for the HfSiON films.

Room temperature Si δ-growth on Ge incorporating high-K dielectric for metal oxide semiconductor applications

A low temperature Al2O3∕4 monolayer amorphous Si gate stack process was demonstrated on p-type Ge wafers using atomic layer deposition and molecular beam epitaxy. Multifrequency capacitance-voltage (C-V) and current-voltage (I-V) characteristics showed excellent electrical properties of the Pt∕Al2O3∕4 ML Si∕Ge metal oxide semiconductor capacitor. No kinks from 1MHzto4kHz and a leakage current density of 2.6×10−6A∕cm2 at 1V with an equivalent oxide thickness of 2.5nm. The interface characterization using a conductance method showed that interface trap density at the near midgap was 8×1012eV−1cm−2 and a mean capture cross section of holes was extracted to be 10−16cm2.

Hf-Silicidation Reactions due to Vacuum Annealing for Poly-Si/ HfSiO(N)/ SiON/ Si Gate Stack Studied by Photoemission Spectroscopy

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Temperature-dependent interfacial chemical bonding states and band alignment of HfOxNy∕SiO2∕Si gate stacks

Temperature-dependent interfacial chemical bonding states and band alignment of HfOxNy∕SiO2∕Si gate stacks have been investigated by X-ray photoemission spectroscopy (XPS) and spectroscopic ellipsometry (SE). By means of the chemical shifts of Hf 4f, Si 2p, O 1s, and N 1s core-level spectra, it has been found that the chemical stability of the HfOxNy∕SiO2∕Si stacks strongly depends on the annealing temperature. Analysis of temperature-dependent band alignment of HfOxNy∕SiO2∕Si stacks suggests that the valence band offset ΔEv increases slowly from 1.82eV for as-grown film to 2.55eV for annealed film at 700°C; however, the values of conduction band offset ΔEc only demonstrates a slight change in the vicinity of 1.50eV. From the band offset viewpoint, HfOxNy∕SiO2∕Si gate stack could be a promising candidate for high-k gate dielectrics.

X-ray photoelectron spectroscopy study of ZrO2∕TiO2∕Si stack

A ZrO2∕TiO2∕Si gate stack has been prepared by using solid phase reaction between sputtered ZrO2∕Ti stack and underlying SiO2∕Si substrate through in situ vacuum annealing. X-ray photoelectron spectroscopy was used to analyze interfacial properties of the ZrO2∕TiO2∕Si stack after annealing at high temperatures. The interfacial silicate is composed of Ti silicate and ZrO2 layer does not take part in the interfacial reaction to form Zr silicate. Such a stack has the advantage of combining high dielectric constant of ZrO2 and excellent interfacial property of Ti silicate/Si interface, and will have potential applications in the advanced metal-oxide-semiconductor devices.

Role of Bulk HfO2 and Interfacial SiO2 Layer in Breakdown Characteristics of TiN/HfO2/SiO2/Si Gate Stacks

Defect generation in the interfacial SiO2 layer seems to be the leading breakdown mechanism in metal/high-k/interfacial layer/Si gate stack. In this work we reaffirm the claim by studying systematically the breakdown mechanisms of HfO2 and SiO2 separately, deposited under same growth conditions. Individual breakdown characteristics of HfO2 without any interfacial layer using MIM capacitors and in situ steam grown (ISSG) SiO2 MOS capacitors with of identical thicknesses were compared (I-t, Stress-induced leakage current) to that of the high-κ/IL/metal gate stack. It was observed that charge trapping and stress-induced trap formation in the interfacial layer continues to be the soft spot for grate stack breakdown.

Role of Bulk HfO2 and Interfacial SiO2 Layer in Breakdown Characteristics of TiN/HfO2/SiO2/Si Gate Stacks

not Available.