Semiconductor Heterojunction Field-effect Transistors Research Articles

Reduction in density of interface traps determined by C-V analysis in III-nitride-based MOSHFET structure

An in situ metal-organic chemical vapor phase epitaxy is used to grow a complete AlGaN/GaN metal oxide semiconductor heterojunction field effect transistor (MOSHFET) structure, gated by a gallium oxide (Ga2O3) layer; we observed reduction in the interfacial trap density compared to its version wherein the Ga2O3 was grown ex situ, after breaking the vacuum, all else being the same. A remarkable decrease in the interfacial charge density for in situ MOSHFET structures in the range of 70%–88% for 10–30 nm oxide layer thickness and improvements in other electrical parameters required for high-performing devices were observed.

Normally-off recessed gate β-Ga2O3 MOSHFETs with a modulation-doped heterostructure back-barrier

This study demonstrates enhancement-mode recessed-gate β-Ga2O3 metal–oxide–semiconductor heterojunction field-effect transistors (MOSHFETs) with a combination of the MOS channel and a modulation-doped heterostructure to improve maximum drain current and on-resistance (RON). In this proposed device concept, modulation doping in the heterostructure back-barrier inserted into the MOS channel increases the electron density in the MOS channel while maintaining a normally-off operation. First, 2D simulations of enhancement-mode recessed-gate β-Ga2O3 metal–oxide–semiconductor field-effect transistors (MOSFETs) were performed in a Silvaco ATLAS TCAD environment to calibrate the transfer characteristics with the measured data of the investigated device reported previously. Second, using calibrated physical models and parameters, the transfer and transconductance characteristics, and output and off-state characteristics of the enhancement-mode recessed-gate β-Ga2O3 MOSHFETs were comprehensively investigated. The maximum drain current at VGS = 8 V and VDS = 10 V could be increased up to 32.6 mA mm−1 from 9.1 mA mm−1 with the MOSHFET in comparison with that of the recessed-gate MOSFET. The breakdown voltage increased considerably from 186 V to 226 V for the recessed-gate MOSHFET. The proposed device also showed a lower RON, which decreased from 354 Ω.mm to 214 Ω.mm owing to greater electron accumulation in the channel owing to the introduction of the modulation-doped heterostructure.

Interface Charge Effects on 2-D Electron Gas in Vertical-Scaled Ultrathin-Barrier AlGaN/GaN Heterostructure

The combination of ultrathin-barrier (UTB) AlGaN ( x grown by low-pressure chemical vapor deposition (LPCVD) is a promising technique for development of GaN-based millimeter-wave power amplifiers and recess-free enhancement-mode (E-mode) power switches. The LPCVD-SiN x passivation is capable of inducing high density of positive charges at the SiN x /(Al)GaN interface ( $\sim 3.50 \times 10^{13}$ cm−2), ensuring efficient recovery of 2-D electron gas (2-DEG) density that is comparable with conventional AlGaN/GaN heterostructure. Temperature-dependent Hall measurements and scattering mechanism simulations confirm the positive interfacial charges as well as interface states with density below 1013 cm−2 and exert weak remote coulombic scattering of 2-DEG in metal–insulator–semiconductor heterojunction field-effect transistors (MIS-HFETs), which warrants a low ON-resistance of UTB-AlGaN/GaN-based devices. UTB-AlGaN ( x passivation is a compelling technology platform for fabrication of high-frequency power amplifiers and high-efficiency E-mode power switches.

Ultra-wide bandgap AlGaN metal oxide semiconductor heterostructure field effect transistors with high-k ALD ZrO2 dielectric

We report on Al0.65Ga0.35N/Al0.4Ga0.6N metal oxide semiconductor heterojunction field-effect transistor (MOSHFET) with high-k ZrO2 gate-dielectric deposited using atomic layer deposition process. As extracted from frequency dependent capacitance–voltage (CV) characteristics, the oxide gates resulted in an interfacial state trap density of ∼2 × 1012 cm−2. A comparative study, on the same material, shows the gate-leakage current of the ZrO2 MOSHFETs to be lower by five orders; their ON/OFF current ratio (∼107) to be higher by about four orders and their threshold voltage to decrease (less negative) by 3.5 V with respect to the Schottky gate devices.

Structural stability and band alignment in the c-plane ZnO/GaN heterostructure

The structural stability and electronic properties of ZnO on c-plane GaN substrates with and without a Ga-adlayer or Ga-bilayer are studied by first-principles calculations. The ZnO/GaN heterostructures are determined by a layer-by-layer mode from the initial adsorption of the alternative Zn and oxygen atomic layers of the first ZnO unit cell on c-plane GaN surfaces. The Ga-adlayer occupies the T4 sites of GaN (0001) substrates and improves the ordered structure of the grown ZnO. The atomic and the electronic structures are systematically analyzed for the optimized ZnO/GaN heterojunction. The perfect Zn-terminated ZnO/GaN (000) heterostructure has a band gap 2.57 eV and small band offset values, which is a potential candidate for GaN-based semiconductor heterojunction field-effect transistors devices. The Ga-adlayer induces in-gap states and causes a decrease of the band offsets for the Zn-terminated ZnO/GaN (000) heterojunction.

Mobility enhancement in recessed-gate AlGaN/GaN MOS-HFETs using an AlON gate insulator

We demonstrated the advantage of aluminum oxynitride (AlON) gate insulator in enhancing the performance of recessed-gate AlGaN/GaN-based metal–oxide–semiconductor heterojunction field-effect transistors (MOS-HFETs) fabricated with reactive ion etching. The AlON deposition on the recessed-gate structures was found to mitigate the damage of recess etching on the GaN and AlGaN surfaces, enabling a simple gate recess process in the device fabrication. Consequently, a high field-effect mobility of 259 cm2 V−1 s−1, together with normally off operation, was achieved for the recessed-gate AlGaN/GaN MOS-HFETs with the AlON gate insulator. Temperature dependence of the transconductance of the fabricated devices revealed that carrier transport in the channel was mostly dominated by phonon scattering, indicating excellent interface quality between the AlON insulator and the recess-etched AlGaN surfaces.

Investigation of post-annealing effects for normally-off GaN metal-oxide semiconductor heterojunction field-effect transistors with thin AlN barrier layer

The effects of post-annealing processes for normally-off GaN metal-oxide semiconductor heterojunction field-effect transistors (MOS-HFETs) with a thin AlN barrier layer are investigated. These annealing processes are post-deposition annealing (PDA) after oxide deposition, post-metallization annealing (PMA) after gate metallization, and positive-bias annealing (PBA) after wafer processes. PMA and PBA are effective in enhancing the drain current density and threshold voltage shift. The most effective method is PBA and the obtained threshold voltage and drain current density are +3.0 V and 0.7 A mm−1, respectively. This is attributed to improvements in interfacial trap states which is confirmed by an investigation of the frequency dependence of capacitance–voltage characteristics.

Doped Barrier Al0.65Ga0.35N/Al0.40Ga0.60N MOSHFET With SiO2 Gate-Insulator and Zr-Based Ohmic Contacts

This letter reports an Al0.65Ga0.35N-Al0.4Ga0.6N metal–oxide–semiconductor–heterojunction–field–effect–transistor (MOSHFET) with an SiO2 gate-insulator. For this first demonstration of an AlGaN channel MOSHFET, a new doped barrier epilayer design led to linear source–drain ohmic-contacts formed by Zr-based metal stack with a contact resistance as low as $1.64~\Omega \cdot \textsf {mm}$ . For a device with 6- $\mu \text{m}$ source–drain opening a record saturation current of 0.6 A/mm (at gate bias of 6V) was measured. In contrast to a conventional Schottky-gate HFET, the gate-oxide from the pulsed plasma enhanced chemical vapor deposition decreased the MOSHFET gate leakage current by a factor of 104 with only a 1.5-V shift in the threshold voltage. A drift mobility of 430 cm $^{2}/\textsf {V}\cdot \textsf {s}$ is measured at zero-gate bias, which increases to 800 cm $^{2}/\textsf {V}\cdot \textsf {s}$ close to the threshold voltage. The device characteristics up to 250°C are used to calculate the temperature dependence of the drift mobility.

Device Technologies of GaN-on-Si for Power Electronics: Enhancement-Mode Hybrid MOS-HFET and Lateral Diode

In this paper, a high performance enhancement-mode (E-mode) Al2O3/GaN hybrid MOS-HFET and a novel AlGaN/GaN lateral diode are experimentally demonstrated. Based on the proposed approach to engineer the dielectric/GaN positive interface fixed charges ( Q it+) by postdielectric annealing, the E-mode metal–oxide–semiconductor heterojunction field-effect transistor (MOS-HFET) obtains a better tradeoff between the threshold voltage ( V TH) control and drain current drive capability due to the significant suppression of Q it+ and the associated remote scattering effect. Owing to the uniquely high V TH and gate swing, the E-mode MOS-HFET exhibits respectable higher faulty turn on immunity that is prone to improve the reliability of the device in power switching applications and simplify the gate driver design. On the other hand, by featuring a new turn-on mechanism of MIS-gate-controlled 2-D electron gas (2DEG) channel, the diode exhibits ultralow turn-on voltage and reverse leakage current, which are beneficial to lowering the conduction loss and off-state power consumption of GaN-on-Si power diodes. Moreover, the diode is compatible with E-mode hybrid MOS-HFET, which is promising for realizing full-GaN single-chip power ICs.

Normally‐off AlGaN/GaN‐on‐Si MOS‐HFET with a monolithically integrated single‐stage inverter as a gate driver

A normally-off AlGaN/GaN-on-Si metal–oxide–semiconductor-heterojunction field-effect transistor (MOS-HFET) with an integrated single-stage inverter is developed. The integrated single-stage GaN inverter consisted of an AlGaN/GaN driver MOS-HFET and a resistive load. With the monolithically integrated gate driver, the gate charging current was boosted from 10 to 170 mA, which reduced the charging and discharging times from 626 to 107 ns and 553 to 196 ns, respectively.

Normally-Off MOS-HFET on AlGaN/GaN-on-Si(110) Grown by NH3MBE

Due to the difficulty of GaN epitaxy growth on Si(001) substrate, GaN-on-Si wafers are generally grown on Si(111) substrates. Because of the poor electrical characteristics of Si(111) orientation, monolithic integration between CMOS ICs and GaN devices cannot be implemented on GaN-on-Si(111) wafers. At this point of view, Si(110) substrate will be an alternative choice for GaN-on-Si epitaxy growth, because it has good atomic arrangement with AlN seed layer and an advantage of excellent hole mobility characteristics over Si(001). We have developed high quality GaN epitaxy growth technique on Si(110) substrate using NH3 MBE and demonstrated normally-off AlGaN/GaN-on-Si(110) metal–oxide–semiconductor-heterojunction field-effect transistors with an OFF-state breakdown voltage of 610 V. The fabricated device exhibited promising characteristics comparable with those achieved on conventional GaN-on-Si(111) wafers.

ALD gate dielectrics for improved threshold voltage stability in AlGaN/GaN MOS-HFETs for power applications

Dielectrics by atomic layer deposition (ALD) are sought after for fabricating AlGaN/GaN based metal oxide semiconductor heterojunction field effect transistors (MOS-HFETs) for power applications. The ideal gate dielectric is required to suppress gate leakage and minimize threshold voltage (VT) instability by hosting minimal interface traps. Additionally, with the need for an enhancement mode device, it is preferable if it minimizes VT shift in the negative direction. For the first time, we compare popular ALD dielectrics like SiO2, Al2O3, HfO2 and HfAlO with identical electrical thickness on AlGaN/GaN, thereby ensuring identical electrostatic conditions across different dielectrics. High-k ALD dielectrics (HfAlO, HfO2 and Al2O3) are found to suppress gate leakage but host a high density of interface traps with AlGaN, thereby resulting in significant VT instability. ALD SiO2 gate dielectric, annealed in N2 above 600 °C, is a promising gate dielectric candidate which provides the most stable and least negative shift in VT while also substantially suppressing gate leakage below that of an HFET.

Accurate characterization and understanding of interface trap density trends between atomic layer deposited dielectrics and AlGaN/GaN with bonding constraint theory

Many dielectrics have been proposed for the gate stack or passivation of AlGaN/GaN based metal oxide semiconductor heterojunction field effect transistors, to reduce gate leakage and current collapse, both for power and RF applications. Atomic Layer Deposition (ALD) is preferred for dielectric deposition as it provides uniform, conformal, and high quality films with precise monolayer control of film thickness. Identification of the optimum ALD dielectric for the gate stack or passivation requires a critical investigation of traps created at the dielectric/AlGaN interface. In this work, a pulsed-IV traps characterization method has been used for accurate characterization of interface traps with a variety of ALD dielectrics. High-k dielectrics (HfO2, HfAlO, and Al2O3) are found to host a high density of interface traps with AlGaN. In contrast, ALD SiO2 shows the lowest interface trap density (<2 × 1012 cm−2) after annealing above 600 °C in N2 for 60 s. The trend in observed trap densities is subsequently explained with bonding constraint theory, which predicts a high density of interface traps due to a higher coordination state and bond strain in high-k dielectrics.

AlGaN/GaN Metal–Oxide–Semiconductor Heterojunction Field-Effect Transistor Integrated With Clamp Circuit to Enable Normally-Off Operation

We have developed an AlGaN/GaN-on-Si metal- oxide-semiconductor heterojunction field-effect transistor (MOSHFET) integrated with a clamp circuit to enable normally-off operation. A clamp circuit consisting of a multilayer MIM capacitor and a Schottky barrier diode was monolithically integrated with a normally ON AlGaN/GaN MOSHFET. The integrated clamp circuit shifted the input driving signal from (0, 20 V) to (-19.2, 0.8 V), allowing the normally ON AlGaN/GaN MOSHFET with a pinchoff voltage of -14 V to be operated as a normally-off device. The multichannel device with a 5-mm channel width exhibited a drain current density of ~470 mA/mm and a breakdown voltage of 900 V. In comparison with other conventional normally-off GaN-based FETs, a higher threshold voltage with high current density (i.e., low ON-resistance) can be achieved with easy device processing, no need for gate recess or complicated epitaxial growth.

Extraction of interface trap density of Al2O3/AlGaN/GaN MIS heterostructure capacitance

AbstractInterface traps between dielectric and barrier layers influence the electrical properties of MISHEMT (metal–insulator–semiconductor heterojunction field effect transistor) structures. We demonstrate an approximate method for extraction of the density of interface traps from experimental MISH structures. First, the capacitance curve of an ideal structure without interface traps was generated by fitting the experimental curve in the capacitance plateau and depletion region. Then, the fit in the forward part of the curve was found by a trial and error method using several interface trap distributions. Special U‐shape interface trap distributions were used with different ratio between the magnitudes of the trap densities at the conduction‐band and valence‐band extremes and the middle of the energy gap. A very good fit between the experimental and the theoretical curve has been obtained for the interface trap density 1.3 × 1013 eV−1 cm−2 at the band edges and 1.3 × 1011 eV−1 cm−2 in the middle of the gap.

Dynamic on-resistance of normally-off recessed AlGaN/GaN-on-Si metal–oxide–semiconductor heterojunction field-effect transistor

In this study, we investigated the process-dependent dynamic on-resistance [RDS(on)] characteristics of recessed AlGaN/GaN-on-Si metal–oxide–semiconductor heterojunction field-effect transistors with a SiO2 gate oxide. In order to improve the dynamic RDS(on) characteristics, the processing technology was carefully optimized, including post-metallization annealing and field plate formation. A threshold voltage of 2.0 V was achieved with a breakdown voltage of 1070 V. The fabricated device exhibited a DC RDS(on) of 5.22 mΩ·cm2 with very stable dynamic RDS(on) characteristics, i.e., a less than 20% increase up to the drain voltage of 200 V.

Improved high-temperature device transport properties and off-state characteristics of AlGaN/GaN power devices with atomic layer deposition (ALD) HfAlO high-k dielectric

The effect of the atomic layer deposition (ALD) HfAlO high-k dielectric on device transport properties and breakdown characteristics of an AlGaN/GaN metal–oxide–semiconductor hetero-junction field-effect transistor (MOS-HFET) was evaluated based on temperature-dependent measurements. It was found that the MOS-HFET device with a HfAlO gate dielectric shows high-channel mobility greater than the Schottky HFET device for the measured temperature range (25–150 °C). In the case of off-state breakdown characteristics, the MOS-HFET device greatly suppressed gate leakage currents for measured temperatures (25–200 °C) resulting in improvements in off-state breakdown characteristics. In contrast, large gate/drain leakage currents were observed for the Schottky HFET device at high temperature (>100 °C) resulting in about 200 V of breakdown voltage reduction. It was also found that the ALD HfAlO layer reduced surface leakage current by passivating the GaN surface effectively. Therefore, the MOS-HFET structure with the HfAlO gate dielectric is very attractive for GaN-based high-power and high-temperature device applications.

High Integrity SiO2Gate Insulator Formed by Microwave-Excited Plasma Enhanced Chemical Vapor Deposition for AlGaN/GaN Hybrid Metal–Oxide–Semiconductor Heterojunction Field-Effect Transistor on Si Substrate

High Integrity SiO₂Gate Insulator Formed by Microwave-Excited Plasma Enhanced Chemical Vapor Deposition for AlGaN/GaN Hybrid Metal–Oxide–Semiconductor Heterojunction Field-Effect Transistor on Si Substrate

High Integrity SiO2 Gate Insulator Formed by Microwave-Excited Plasma Enhanced Chemical Vapor Deposition for AlGaN/GaN Hybrid Metal–Oxide–Semiconductor Heterojunction Field-Effect Transistor on Si Substrate

High quality SiO2 gate insulator has been demonstrated for GaN metal–oxide–semiconductor (MOS) transistor which has high performance with normally-off operation. The SiO2 films formed on GaN by microwave-excited plasma enhanced chemical vapor deposition (MW-PECVD) and annealed after deposition exhibits a low-interface state density between SiO2 and GaN, a high-breakdown field, and a high charge-to-breakdown. The SiO2 films have been also applied to the gate insulator of AlGaN/GaN hybrid MOS heterojunction field-effect transistor (HFET) on Si substrate. The MOS-HFET show excellent properties with the threshold voltage of 4.2 V and the maximum field-effect mobility of 161 cm2 V-1 s-1.

Normally‐off AlGaN/GaN MOSHFET using ALD SiO2 tunnel dielectric and ALD HfO2 charge storage layer for power device application

AbstractIn this work, we have demonstrated a normally‐off AlGaN/GaN metal‐oxide semiconductor heterojunction field effect transistor (MOSHFET) wherein the enhancement mode operation is enabled by charge storage characteristics within a high‐k layer. By combining ALD SiO2 tunnel dielectric and HfO2 charge trapping layer, up to 7 V of threshold voltage (VT) shift depending on the applied gate pulse amplitude (corresponding ∼ 1.2 × 1013 charges/cm2 stored within the charge storage layer) is obtained. Electrical characteristics such as gate leakage current, transconductance, and off‐state breakdown after programming are similar to the initial device. Retention characteristics show about 20% of charge loss after 20000 s. (© 2012 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)