Roundoff Noise Variance Research Articles

Low-noise zero-input, overflow, and constant-input limit cycle-free implementation of state space digital filters

This paper focuses on the selection of a suitable building block to implement cascade or parallel designs of narrowband high-order state-space digital filters that are guaranteed against any limit cycle. Two building blocks for which the absence of any limit cycle is guaranteed are gathered from the literature, and their relative output-roundoff-noise variances and computational complexities are checked. The result is the choice of a limit cycle-free building block fitting very well the requirements of low roundoff noise and low computational complexity. Although yet available in the literature, to the extent of the authors' knowledge the use such a building block has not been explored. Then, it is now revisited, and the result is the proposition of a new synthesis strategy that accomplishes minimum relative roundoff noise variance in its output, which is the main contribution of the paper.

Roundoff noise analysis of state-space digital filters implemented on floating-point digital signal processors

An expression is obtained for the output floating-point roundoff noise variance of a general Nth-order state-space digital filter with zero-mean white noise input signal. This expression is then simplified for the case there the filter is implemented on a floating-point digital signal processor. Such processors carry extended precision bits in the accumulation register, so that the primary source of roundoff error in the output arises from the final quantization of the mantissa. Under this condition of extended precision during multiply-accumulate, it is found that the floating-point roundoff noise gain is identical to the fixed-point roundoff noise gain used extensively in the past for designing optimal and near-optimal fixed-point digital filters. Therefore, previous work to optimize fixed-point realizations is directly applicable to the floating-point realizations. This conclusion is verified by actual roundoff noise measurements using a digital signal processor simulator. Since floating-point digital filters do not require scaling, optimal floating-point realizations require N fewer multiplies than fixed-point filters. Simple design equations are presented for the floating-point minimum-noise second-order state-space structure with two trivial unity multiplies.

A note on the orthogonal realization of allpass digital filters and their finite wordlength performance

In this correspondence, a direct method to obtain an orthogonal realization of an allpass transfer function from the entries of the Jury table or the Schur-Cohn test is presented. The performance of this orthogonal realization using fixed- or floating-point implementation is discussed. Based on this formulation, simple formulae for the coefficient sensitivity and output roundoff noise variances are obtained. The results are illustrated with an example.

Implementation of 2-D pseudo-rotated digital filters using a forward lattice structure

The 1-D FDLS shows the localized feedback property and is suitable for modular and concurrent implementation. It is known that the 1-D FDLS shows interesting properties with respect to finite word-length effects. In this paper, a new result is given for the estimation of the lower and upper bound of the variance of the roundoff noise. It is presented how the FDLS can be incorporated to implement 2-D pseudo-rotated digital filters. The 1-D roundoff noise analysis is extended to the 2-D case. It is indicated how 2-D filter banks can be derived from the FDLS.

Bounds for floating-point roundoff noise

The dummy multiplier model and the conventional estimates for roundoff noise variance in floating-point implementations are compared. Common upper and lower bounds for the noise estimates are derived and experimental results are presented. Although the two noise estimates have common finite bounds, it is shown that they may differ by more than 10 dB for narrowband lowpass filters. >

Generation of a time series having a specified power spectrum with minimum roundoff noise

The problem of determining a shaping filter which minimized the output roundoff-noise variance is discussed. It is shown that in the family of shaping filters of an identical McMillan degree having an identical power spectrum, the shaping filter of minimum phase attains a minimum output roundoff-noise variance in either the case of optimal word lengths or the case of equal word lengths. It is shown out by examples that this is not valid in the family of shaping filters having an identical power spectrum and different McMillan degrees.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Reversed Chebyshev implementation of McClellan transform and its roundoff error

A new structure, called the reversed Chebyshev structure, for the fixed point implementation of the FIR filters designed with the McClellan transformation is presented. It shows the best roundoff noise performance among the existing ones for both rounding and truncation operations. The incremental rate of the upper bound on the variance of the roundoff noise, as the size of the 2-D filters increases, is very small. The reversed Chebyshev structure is rooted from our calculation of the upper bound on the variance of the output roundoff noise of 2-D FIR filters designed with the McClellan transformation. This upper bound is independent of the transformation filters and can be easily calculated to estimate the number of bits needed for the desired accuracy in the fixed point implementation.

Block realization of multidimensional IIR digital filters and its finite word effects

This paper describes the formulation and realization of multidimensional block systems and investigates their stability and numerical performance. The block system can be constructed by the concept of block shift invariance. It possesses the general property that if (\lambda_1,\lambda_2,\cdots,\lambda_N) is a pole of the original scalar system, then (\lambda^{L_1}_{1},\lambda^{L_2}_{2},\cdots,\lambda^{L_N}_{N} will be a pole of the block system, where L_i , is the block length in the i th tuple. Thus, a stable scalar system will guarantee that its extended block systems are stable. Two methods of deriving block transfer functions from a given scalar transfer function are proposed. Moreover, it is shown that the scalar transfer function can be derived from its extended block transfer function. Based on Givone-Roesser's model, a unified approach of establishing 1-D to N -D block state-space models is presented. It is shown for the proposed block model that the dynamic range constraint in each tuple is invariant under block extension. In addition, the average roundoff noise variance due to the rounding errors in the i th tuple is reduced by a factor equal to the block length in this tuple when compared with its scalar counterpart.

Synthesis of 2-D separable denominator digital filters with minimum roundoff noise and no overflow oscillations

This paper presents a new expression of the variance of roundoff noise in 2-D separable denominator digital filters described by Roesser's local state-space model. The covariance matrices and noise matrices necessary to analyze the variance of roundoff noise under the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1_2</tex> norm scaling are obtained as the solutions of Liapunov equations. The synthesis problem of 2-D separable denominator digital filters with minimum roundoff noise are formulated under the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1_2</tex> norm scaling. The synthesis method of 2-D minimum noise realizations under the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1_2</tex> norm scaling is proposed by applying the minimization technique of roundoff noise in the 1-D case. Furthermore, it is shown that 2-D minimum noise realizations are rotated and scaled balanced realizations. Using this property, 2-D minimum noise realizations are proved to be free of overflow oscillations under zero input conditions, if their second-order modes are distinct.

Roundoff noise of arbitrary linear digital networks

Three matrix expressions are derived for the input, coefficient, and product quantization errors of any one-dimensional arbitrary linear digital network implemented using fixed-point arithmetic. From the product quantization error expression, a matrix expression for the computation of the corresponding roundoff noise variance is presented. These expressions (except the input quantization error) have the flexibility of incorporating the effects of amplitude scaling and structural transformation. Results show that this matrix method of computing roundoff noise variance of any arbitrary fixed-point network is accurate, efficient, and convenient to be used.

On the roundoff noise in 2-D state-space digital filtering

The output roundoff noise variance and the scaling of the internal registers are associated with two impulse response sequences. Furthermore, two Lyapunov equations are established, corresponding to those which have been already used for the noise analysis and optimal structure synthesis in the 1-D case. An analytic formula is given for the solution of the Lyapunov equations. Thus the known techniques from the 1-D filters can be directly extended.

Fixed point implementation of fast Kalman predictors

In this note we study scaling rules and roundoff noise variances in a fixed-point implementation of the Kalman predictor for an ARMA time series observed noise free. The Kalman predictor is realized in a fast form that uses the so-called fast Kalman gain algorithm. The algorithm for the gain is fixed point. Scaling rules and expressions for rounding error variances are derived. The numerical results show that the fixed-point realization performs very close to the floating point realization for relatively low-order ARMA time series that are not too narrow band. The predictor has been implemented in 16-bit fixed-point arithmetic on an INTEL 8086 microprocessor, and in 16-bit floating-point arithmetic on an INTEL 8080. Fixed-point code was written in Assembly language and floating-point code was written in Fortran. Experimental results were obtained by running the fixed- and floating-point filters on identical data sets. All experiments were carried out on an INTEL MIDS 230 development system.

Roundoff noise upper bounds for cascaded recursive digital filter structures

Two upper bounds on the variance of roundoff noise at the output of a cascade digital filterstructure are established. Some of these bounds are easier to compute than the exact roundoff-noise variance.Algorithms utilising these bounds for the generation of low-noise cascade realisation (by proper pairing ofpoles and zeros and ordering of the 2nd-and/or lst-order sections) are suggested. An exhaustive search toobtain such a realisation becomes economically feasible because of the reduced complexity of computations.Illustrative examples are given, showing the application of one of these algorithms.

Modified coupled-form digital-filter structures

Two variations of the well-known coupled form are proposed. These new digital filter structures have lower pole sensitivities and roundoff noise variances than those of the coupled form and have been derived using the network transformation approach of Szczupak and Mitra [1].

Correction to "Comparison of round-off noise variances in several low round-off noise digital filter structures"

Correction to "Comparison of round-off noise variances in several low round-off noise digital filter structures"

Comparison of round-off noise variances in several low round-off noise digital filter structures

This note presents round-off noise expressions for fixed-point digital filters realized in the error-feedback structure, and a comparison of the error-feedback structure with other low round-off noise digital filter structures in terms of output round-off noise variance.

Roundoff noise prediction in short-wordlength fixed-point digital filters

Consideration is given to recursive fixed-point digital filters employing a signal wordlength in the range of 4 to 8 bits. Experimentally determined values of roundoff-noise variance are found to deviate markedly from those predicted in the normal manner. Such deviation is caused mainly by correlations between signal and error sequences. A method is proposed whereby improved predictions of noise variance may be obtained in the case of first order filters. Finally, it is demonstrated that, when the `coefficient slicing? realisation is used to realise filters with sufficiently quantised coefficients, such filters yield both a very low level of roundoff noise, and also excellent agreement between the predictions of a simple model and measured noise levels

An alternate parallel realization of digital transfer function

A new type of parallel realization of a digital transfer function is proposed. The new structure is also canonic with respect to delays, multipliers, and adders. Expressions for the round-off noise variances for the new structure and its transpose are derived. An illustrative example is included.