Rm DS Research Articles

Novel High Step-Up DC–DC Converter for Distributed Generation System

In this paper, a novel high step-up dc–dc converter for distributed generation systems is proposed. The concept is to utilize two capacitors and one coupled inductor. The two capacitors are charged in parallel during the switch-off period and are discharged in series during the switch-on period by the energy stored in the coupled inductor to achieve a high step-up voltage gain. In addition, the leakage-inductor energy of the coupled inductor is recycled with a passive clamp circuit. Thus, the voltage stress on the main switch is reduced. The switch with low resistance <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$R_{\rm DS(ON)}$</tex></formula> can be adopted to reduce the conduction loss. In addition, the reverse-recovery problem of the diodes is alleviated, and thus, the efficiency can be further improved. The operating principle and steady-state analyses are discussed in detail. Finally, a prototype circuit with 24-V input voltage, 400-V output voltage, and 200-W output power is implemented in the laboratory to verify the performance of the proposed converter.

A Comparative Study of Gate Structures for 9.4-kV 4H-SiC Normally On Vertical JFETs

This paper reports the development of 9.4-kV 4H-SiC normally on lateral-channel vertical JFETs. The developed JFETs utilize a buried layer to create a lateral conduction channel, shielding the source from the effects of drain bias. The lowest measured $R_{\rm on, sp}$ was 127 $\hbox{m}\Omega\cdot\hbox{cm}^{2}$ . Measurements indicate that the channel resistivity can be further reduced by channel optimization. The fabricated JFETs exhibit pentode-like $I_{D}$ – $V_{\rm DS}$ characteristics with a high forward direct-current blocking gain of over 500. This paper provides a comparative study of gate structures in order to achieve the lowest on -state switching losses and to provide stable forward blocking characteristics for a normally on JFET.

Modeling and Characterization of Overlapping Circular-Gate mosfet and Its Application to Power Devices

This paper introduces a high-density layout style named overlapping circular-gate transistor (O-CGT) that allows the overlapping of circular gates from neighboring cells. With reference to rectangular-gate transistors (RGTs), higher aspect ratio per active area can be achieved. Besides, stray junction capacitances are minimal, improving switching performance. The first-order model for the O-CGT aspect ratio is used to size high-current devices of nominal on-resistance/current rate of 3.3 Ω/10 mA and 20 mΩ/2 A at V <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$_{\rm GS}$</tex></formula> = 4.5 V. These power transistors were prototyped according to a standard mixed-signal 0.35-μm CMOS process and, respectively, occupy 1410 μm <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$^2$</tex></formula> and 0.541 mm <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$^2$</tex> </formula> , which represent an area saving of up to 60% as compared to RGTs of equivalent aspect ratio. Excellent fitting between O-CGT analytical and experimental data is attained. O-CGTs and RGTs exhibit very close I <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$_{\rm DS}$</tex></formula> × V <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$_{\rm GS}$</tex></formula> characteristics, with deviations limited to 0.8% and 5.36% on subthreshold and strong inversion regions, respectively. The O-CGT drain-source breakdown voltage is 8.91 V, slightly above RGT. The O-CGT topology represents then a good option in designing power stages in smart-power chips using planar fabrication processes.

Novel High Step-Up DC–DC Converter With Coupled-Inductor and Switched-Capacitor Techniques

A novel high step-up dc-dc converter with coupled-inductor and switched-capacitor techniques is proposed in this paper. The capacitors are charged in parallel and are discharged in series by the coupled inductor, stacking on the output capacitor. Thus, the proposed converter can achieve high step-up voltage gain with appropriate duty ratio. Besides, the voltage spike on the main switch can be clamped. Therefore, low on-state resistance <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$R_{\rm DS(ON)}$</tex></formula> of the main switch can be adopted to reduce the conduction loss. The efficiency can be improved. The operating principle and steady-state analyses are discussed in detail. Finally, a prototype circuit with 24-V input voltage, 400-V output voltage, and 200-W output power is implemented in the laboratory. Experiment results confirm the analysis and advantages of the proposed converter.

Layout-Dependent Stress Effect on High-Frequency Characteristics and Flicker Noise in Multifinger and Donut MOSFETs

The impact of MOSFET layout-dependent stress on high-frequency performance and flicker noise has been investigated. The proposed donut MOSFETs demonstrate the advantages over the standard multifinger MOSFETs, such as the lower flicker noise <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$S_{\rm ID}/I_{\rm DS}^{2}$</tex></formula> in the low-frequency domain and the higher cutoff frequency <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$f_{T}$</tex></formula> in the very high-frequency region. The elimination of the transverse stress <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$ \sigma_{\perp}$</tex></formula> from shallow trench isolation (STI) and the suppression of interface traps along the STI edge are proposed as the primary factors responsible for the enhancement of the effective mobility <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu_{\rm eff}$</tex></formula> , as well as <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX"> $f_{T}$</tex></formula> , and the reduction of flicker noise. The significantly lower flicker noise realized by donut devices suggests the reduction of STI-generated traps and the suppression of mobility fluctuation due to eliminated transverse stress. The former is applied to n-channel MOS in which the flicker noise is determined by the number-fluctuation model. The latter is responsible for p-channel MOS whose flicker noise is dominated by the mobility-fluctuation model.

SThM Temperature Mapping and Nonlinear Thermal Resistance Evolution With Bias on AlGaN/GaN HEMT Devices

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> Channel temperature has a strong impact on the performance of a microwave power transistor. In particular, it has a strong influence on the power gain, energetic efficiency, and reliability of the device. The thermal optimization of device geometry is therefore a key issue, together with precise measurements of temperature within the channel area. In this paper, we have used scanning thermal microscopy to perform temperature mapping, at variable dc bias points, on an AlGaN/GaN high-electron mobility transistor made on epilayers grown on silicon carbide substrate. We have analyzed the variation of the thermal resistance values, which are deduced from these measurements, with bias conditions <formula formulatype="inline"><tex>$V_{\rm GS}$</tex></formula> and <formula formulatype="inline"><tex>$V_{\rm DS}$</tex></formula>. The observed nonlinear behavior is found to be in excellent agreement with physical simulations, strongly pointing out the large variability of the extension of the dissipation area with the dc bias conditions. </para>

High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> A CMOS pseudo-differential-input differential- output amplifier operating in class AB and exhibiting high-current-drive capability is presented. The circuit operates from a minimum supply of <formula formulatype="inline"> <tex>${\rm V}_{\rm T}+2V_{\rm DS,SAT}$</tex></formula>, provides fast settling response, and also characterized by a wide input differential range with high linearity that enables its use even as a transconductor for filtering applications. For this purpose, a common-mode feedback section is also included. A circuit prototype was fabricated using a 0.35-<formula formulatype="inline"><tex>$\mu$</tex> </formula>m technology and powered with 2 V. Using a quiescent current of <formula formulatype="inline"><tex>$\hbox{20 }\; \mu\hbox {A}$</tex></formula>, experimental measurements show a differential current-drive capability of 1 mA (which is 50 times greater than the quiescent value), with this value being solely limited by the input voltage swing allowed. Third-order harmonic distortion is lower than <formula><tex>$-$</tex></formula>64 dB for a 1-Vpp 100-kHz input. </para>

Granulocyte adherence in newborn infants

Nutrition in low birth weight infants. III. Lipolysis and free fatty acid elimination after intravenous adminstration of fat emulsion, Acta Paediatr Scand 64:745, 1975. 19. Gustafson A, Kjellmer I, Olegard R, and Victorin LH: Nutrition in low birth weight infants. I. Intravenous inje ction of fat emulsion, Acta Pediatr Scand 61:149, 1972. 20. Gurson CT, and Saner G: Lipoprotein lipase activity in 9 marasmic type of protein-calorie malnutrition, Arch Dis Child 44:765, 1969. 21. Krauss RM, Levy RI, and Fredrickson DS: Selective measurement of two lipase activities in post heparin plasma from normal subjects and patients with hyperlipoproteinemia, J Clin Invest 54:1107, 1974. 22. Brunzell JF, Chait A, Nikkila EA, Ehnholm C, Huttunen JK, and Steiner G: Heterogeneity of primary lipoprotein lipase deficiency, Metabolism 29:624, 1980. 23. Coran AG: Total intravenous feeding of infants and children without the use of a central venous catheter, Ann Surg 179:445, 1974. 24. Pereira GR, Fox WW, Stanley CA, Baker L, and Schwartz JG: Decreased oxygenation and hyperlipemia during intravenous fat infusions in premature infants, Pediatrics 66:26 1980. 25. Pereira GR, Ziegler MR, Roth K, and Jacobowski D: Incidence , severity and outcome of hyperalimentation induced cholestasis in neonates, Pediatr Res 14:508, 1980.