Reset Pulse Research Articles

Sb-rich Si–Sb–Te Phase-Change Material for Phase-Change Random Access Memory Applications

An Sb-rich (48 at.%) Si-Sb-Te phase-change material with moderate Si content (24 at.%) is proposed for phase-change random access memory (PCRAM) applications. The real time amorphous to crystalline transformation was studied by in situ transmission electron microscopy observations and in situ resistance measurements. The results of time-dependent resistance measurements show that the Si24Sb48Te28 phase-change material has data retention of 10 years at about 382 K, suggesting a more stable amorphous state than the usual Ge2Sb2Te5 (GST) phase-change material. The reversible set-reset ability of the PCRAM cell based on the Si24Sb48Te28 phase-change material is much better than that of the device employing GST. The programming cycles can reach 2.2 × 104 under a set pulse of 1.5 V/1000 ns with a 30-ns falling edge and a reset pulse of 3.5 V/400 ns, whereas the resistance contrast retains a value of as large as two orders of magnitude.

All-optical flip-flop operation based on asymmetric active-multimode interferometer bi-stable laser diodes

We demonstrate fast and low energy all optical flip-flop devices based on asymmetric active-multimode interferometer using high-mesa waveguide structure. The implemented devices showed high speed all-optical flip-flop operation with 25 ps long pulses. The rising and falling times of the output signal were 121 ps and 25 ps, respectively. The required set and reset pulse energies were only 7.1 fJ and 3.4 fJ, respectively.

Evolution of cell resistance, threshold voltage and crystallization temperature during cycling of line-cell phase-change random access memory

Doped SbTe phase change (PRAM) line cells produced by e-beam lithography were cycled 100 million times. During cell cycling the evolution of many cell properties were monitored, in particular the crystalline and amorphous resistance, amorphous resistance drift exponent, time-dependent threshold voltage, threshold voltage as a function of RESET pulse height, crystallization temperature, and activation energy of crystal growth. The power of the present approach is that all these properties were measured simultaneously during the life of single cells. The evolution of the cell properties can be summarized by (i) an initialization phase characterized by settle-in effect of the material surrounding the programmable region, (ii) a usable life phase where initially the cell properties remain fairly constant until after ∼5 × 105 cycles decomposition of the programmed region caused degradation of the cell properties, and (iii) finally an end of life phase where the cell is stuck in the SET state after typically 108 cycles. Although generally the threshold voltage is directly related to the amorphous resistance it was found that during cycling this relation is not constant but evolved as well. Instead, the crystallization temperature could be linked to the threshold voltage throughout the complete life cycle of the cell which could lead to new insights to the nature of the threshold event.

Nonthermal phase transition in phase change memory cells induced by picosecond electric pulse

The ultrafast amorphization phenomenon induced by a single picosecond electric pulse was studied. The RESET operations were performed on phase change memory cells with 50 nm and 150 nm thick Ge2Sb2Te5 layers by a self-built test system, respectively. The ultrafast amorphization of only 0.2 ns was observed in phase change memory cell. The dependence of RESET resistance on the pulse amplitude was investigated. Thermal simulations with a RESET pulse width of 50 and 0.8 ns using finite element method were compared. Experimental and simulation results suggest that the amorphization in phase change memory cells induced by a picosecond electric pulse exhibits nonthermal nature.

Membranous Structures Affecting the Success of Endoscopic Third Ventriculostomy in Adult Aqueductus Sylvii Stenosis

The purpose of the present study was to observe Liliequist's membrane (LM) and membranous structures located in the prepontine cistern via 3-Tesla magnetic resonance imaging (MRI) with 3D driven equilibrium radio frequency reset pulse (DRIVE) sequence and multiplanar reformat (MPR) images and to evaluate the success of endoscopic third ventriculostomy (ETV) by assessing these membranes in adult aqueduct stenosis. 29 patients (17 female, 12 male) with primary aqueductus sylvii stenosis were included in the study. 19 patients were diagnosed as long-standing overt ventriculomegaly in adults (LOVA) and patients had severe ventriculomegaly, macrocephalus, and aqueduct stenosis on MR imaging. 10 patients were diagnosed as aqueduct stenosis presented with acute onset of hydrocephalus with symptoms of raised ICP. All patients in the study group were analyzed with conventional and cine MRI before and after treatment. We performed 3D DRIVE sequence and MPR at 3-T MR equipment to determine the membranous structures in 3 dimensions. We correlated the success of the procedure considering the preoperative, postoperative MRI and intraoperative images. 5 patients (26.3%) with LOVA and 2 patients (20%) with aqueduct stenosis, in total 7 patients (24.1%), did not respond to ETV. Cerebrospinal fluid (CSF) flow was blocked by membranous structures located in the prepontine cistern in 4 of 8 patients. In 2 patients, CSF through the stoma was blocked either by the LM or closed tuber cinerum. In 1 patient insufficient CSF flow was observed through the stoma and the LM accompanying prepontine membranes.Totally closed membranes were observed in the prepontine cistern in 5 patients (17.24%) according to the postoperative MRI. LM was verified in all patients intraoperatively that were also demonstrated in the preoperative MRI. 3D sequences with MPR may help to observe not only the LM but also other membranes located through the prepontine cistern, which may be the reason of failed ETV.

Asymmetric pulsing for reliable operation of titanium/manganite memristors

We present a pulsing protocol that significantly increases the endurance of a titanium-manganite interface used as a binary memory cell. The core of this protocol is an algorithm that searches for the proper values for the set and reset pulses, canceling the drift in the resistance values. A set of experiments show the drift-free operation for more than 105 switching cycles, as well as the detrimental effect by changing the amplitude of pulses indicated by the protocol. We reproduced the results with a numerical model, which provides information on the dynamics of the oxygen vacancies during the switching cycles.

Multi-site stimulation of subthalamic nucleus diminishes thalamocortical relay errors in a biophysical network model

This paper presents results on a computational study of how multi-site stimulation of the subthalamic nucleus (STN), within the basal ganglia, can improve the fidelity of thalamocortical (TC) relay in a parkinsonian network model. In the absence of stimulation, the network model generates activity featuring synchronized bursting by clusters of neurons in the STN and internal segment of the globus pallidus (GPi), as occurs experimentally in parkinsonian states. This activity yields rhythmic inhibition from GPi to TC neurons, which compromises TC relay of excitatory inputs. We incorporate two types of multi-site STN stimulation into the network model. One stimulation paradigm features coordinated reset pulses that are on for different subintervals of each period at different sites. The other is based on a filtered version of the local field potential recorded from the STN population. Our computational results show that both types of stimulation significantly diminish TC relay errors; the former reduces the rhythmicity of the net GPi input to TC neurons and the latter reduces, but does not eliminate, STN activity. Both types of stimulation represent promising directions for possible therapeutic use with Parkinson's disease patients.

High-Speed Acquisition and Processing Method for High Resolution Image of Wheel Set

Measurement of wheel set wear was an important step for the safety of train running. High-speed acquisition and processing method for high resolution image of wheel set based on the hardware platform of DSP (digital signal processor) and PC was proposed. High-speed acquisition and processing was completed by PC and DSP unit separately. PC and DSP unit worked in parallel operational mode. Ethernet transport program based on TCP was designed for data exchange. Asynchronous reset pulse generation circuits were designed. High resolution images of wheel set were captured in 500fps and asynchronous reset mode. Resolution of images was 1280*1024. The experimental results showed that this method improved image processing speed effectively.

1-GHz All-Optical Flip-Flop Operation of Conventional Cylindrical-Shaped Single-Mode VCSELs Under Low-Power Optical Injection

All-optical set-reset flip-flop operations of conventional circular cylindrical-shaped 1.55-μm wavelength single-mode vertical-cavity surface-emitting lasers (VCSELs) have been demonstrated at a switching frequency of 1 GHz based on polarization bistability observed via injection current variation. The energy of set and reset pulses was lower than 4.5 fJ at a bias current of the VCSEL of 4 mA. Polarization bistable VCSELs will be useful for high-speed optical signal processing applications.

All-optical Flip-flop Operation Based on Polarization Bistability of Conventional-type 1.55-㎛ Wavelength Single-mode VCSELs

We report, for the first time to our knowledge, observation of polarization bistability from 1.55-µm wavelength single-mode VCSELs of a conventional cylinder-shape under control of their driving current, and demonstration of all-optical flip-flop (AOFF) operations based on the bistability with optical set and reset pulse injection at a 50 MHz switching frequency. The injection pulse energy was less than 14 fJ. The average on-off contrast ratio of the flip-flopped signals was about 7 dB. These properties of the VCSELs will be potentially useful for future high-speed all-optical signal processing applications.

Reset–Set Instability in Unipolar Resistive-Switching Memory

Unipolar resistive-switching memory attracts a strong interest as high-density nonvolatile memory for future technology nodes. The high-to-low-resistance change is achieved by the set operation, whereas the reverse transition is obtained by the reset process. Due to the similarities in the set and reset pulses, instabilities may arise, e.g., set may occur after reset within a reset pulse. This reset-set instability (RSI) can result in long program-verify loops to achieve a desired cell state. This letter discusses RSI, showing that the crossover of set and reset times as a function of voltage allows for stable set/reset processes at relatively high and low voltages, respectively.

Pulse-Programming Instabilities of Unipolar-Type NiOx

Oscillations in the transient current profiles of resistive switching memory during set and reset pulse programming were observed and explained by the repeated threshold switching (instantaneous set/reset programming) due to the unstably applied voltage on the resistive random access memory cell during switching. Adding a feedback circuit to prevent the observed oscillations as well as limiting the parasitic capacitance are needed for stable unipolar resistive memory switching.

イメージセンシング技術とその応用 ＣＣＤの低雑音駆動方法

A low noise driving method for CCD imaging devices is developed. In the method, a reset pulse is controlled according to the signal level of the CCD. By an evaluation employing a CCD of VGA size, it has become apparent that signal charge acquired from more than 100 pixels can be read continuously without reset pulses at a scene of 1/64 luminance and that low frequency noise whichi is conspicuous in a reproduced picture can be reduced remarkably.

Theoretical analysis of the RESET operation in phase-change memories

Phase-change memories (PCMs) are promising candidates for multilevel non-volatile storage, which is allowed by the wide programming window. The multilevel approach requires good control of the programmed cell resistance. For any multilevel programming strategy, the RESET operation plays a key role for the accuracy of the intermediate programmed resistance levels. In this paper, we analyze the impact of the applied RESET pulse amplitude and the fabrication process spreads on the RESET resistance distribution. To this end, we developed a model to estimate the impact of device parameter spreads on the amorphous cap thickness and, hence, on the cell resistance obtained after a RESET operation. The proposed model is verified by means of experimental characterization on a PCM-cell array.

Low programming input, direct overwrite and synchronous phase-change random access memory (SPRAM)

The programming inputs for phase-change random access memories (PRAMs) can be significantly reduced by using voltage pulse for RESET (Vreset) and current pulse for SET (Iset) for different structures. Based upon two-dimensional electrothermal simulations, the PRAM cells can be operated by Vreset and Iset pulses of 50 ns at amplitudes as low as 0.27 V and 35 μA, respectively. The direct overwrite function can be achieved under this mode, and extra asynchronous suspending circuits are not needed.

Transient Characteristics of the Reset Programming of a Phase-Change Line Cell and the Effect of the Reset Parameters on the Obtained State

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> In this paper, we investigate the effect of the reset-pulse parameters of a phase-change memory line cell on the electrical cell properties. By means of electrothermal finite-element simulations and measurements, the characteristics of the reset state (resistance after switching, threshold voltage, and stability of the state) are related to the physical parameters during reset switching (the temporal and spatial distribution of the temperature during switching, the evolution of the melting and molten phases, and the time that the line is molten). From a device point of view, we emphasize the following aspects: 1) Due to good thermal isolation, the line cell can be reset using a 5-ns short current pulse of limited amplitude; 2) longer pulsewidths allow lower reset current amplitudes due to the gradual heating of surrounding dielectric; 3) the reset resistance has no direct relation with the threshold voltage but is strongly related to the number of reset pulses applied to the cell; and 4) shorter pulsewidths allow extended endurance lifetimes. </para>

Oxygen-doped Si15Sb85 thin film for good data retention and high speed phase-change memory application

Te-free SixSb100−x (x = 5, 15, 25, 42) thin films are proposed for electronic phase-change memory application and the oxygen doping effect on Si15Sb85 film is investigated in detail. Improved electrical properties are obtained when the oxygen partial pressure ratio is 10%. The crystalline resistivity of Si15Sb85 film is enhanced and the amorphous/crystalline resistivity ratio is also increased to more than 104. The crystallization temperature of the oxygen-doped Si15Sb85 film is 229 °C and maximum temperature for a 10 year lifetime is estimated to be 129 °C with crystallization activation energy of 3.11 eV, which promises better data retention than conventional Ge2Sb2Te5 film. X-ray diffraction patterns indicate that both pure and oxygen-doped Si15Sb85 films crystallize into a hexagonal phase similar to Sb. A phase-change memory device using oxygen-doped Si15Sb85 film can be successfully switched with a 100 ns-1.4 V SET pulse and a 20 ns-7 V RESET pulse. And a SET process as fast as 40 ns is achieved along with a RESET/SET resistance ratio of about 35.

Degradation of the Reset Switching During Endurance Testing of a Phase-Change Line Cell

In this brief, we studied the endurance properties of an integrated phase-change line cell. The different characteristics typically observed during the endurance lifetime are described. The monitoring of the switching parameters of the cell (reset current and threshold voltage) during endurance testing could be correlated with a gradual degradation of the reset switching. The following conclusions were drawn: 1) The reset-switching degradation is closely associated to both an increase of the minimum reset current and a decrease of the obtained reset and set resistances, pointing to material change; 2) the extent of the degradation strongly depends on the reset pulsewidth, and it was found to scale with tm 3/2, tm being the melting time during reset pulse; however, higher reset currents did not quicken the onset of degradation; and 3) the tm 3/2 dependence together with polarity-dependent endurance tests suggests the contribution of an electrical-field-driven migration mechanism. Based on these insights, the extended endurance lifetime of more than 1010 cycles could be demonstrated, using short reset pulses, which could be further increased by changing reset polarity before stuck-set failure.

Dependence of the Metal Electrode and Improved Pulse Switching Speed of La0.7Ca0.3MnO3 as a Resistance Change Memory Device

For the device application of resistive change memory, device performance as well as uniformity and understanding of the mechanism is necessary. The resistance change due to filament formation is undesirable, as it is hard to apply for practical application. In order to have a nonlocalized, uniformly distributed, nonfilamentary-type resistance change memory device, a switching mechanism based on oxide formation and deformation is beneficial. This phenomenon largely depends on the metal electrode on top of the memory oxides. In this study both the device performance, such as pulse switching speed, and the switching mechanism were understood with different metal electrode–oxide combinations. The switching speed is determined by the slowest process step, which in this case is the dissolving of oxide during the set process. A set pulse width of and reset pulse width of were shown. Pulse switching speed was also confirmed by monitoring the delay time, comparing the output signal pulse with the input signal. The devices showed good uniformity and data retention over . Overall the combination of with a carefully designed metal electrode stack has great potential for future nonvolatile memory device applications.

New Reset Waveform for a Large-Sustain-Gap Structure in an Alternating Current Plasma Display Panel

A new reset waveform for a large-sustain-gap structure in an ac plasma display panel is proposed. In the driving of a large-sustain-gap structure with a conventional ramp reset waveform, we cannot avoid the condition of an address electrode being a cathode, which causes lots of trouble in stabilizing the reset discharge. To resolve these problems, a square pulse instead of the conventional rising-ramp pulse is used. In order to stabilize the strong discharge in which the address electrode becomes a cathode, a priming discharge between the address (anode) and scan (cathode) electrodes is made prior to making a strong discharge between the address (cathode) and scan (anode) electrodes. With this scheme, a minimum address voltage of 60 V when the sustain gaps are 250 and 350 mum, respectively, is obtained. However, the contrast ratio using the square reset pulse is lower than that using the conventional ramp pulse. To improve the contrast ratio, the reset waveforms in each subfield are replaced by selective erase waveforms except for the first subfield. In the case of nonselective reset waveform, the background luminance is 19.4 cd/m <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , whereas the background luminance of 2.4 cd/m <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> is obtained with selective reset waveform.