Reset Pulse Research Articles

Engineering of ZrO2-based RRAM devices for low power in-memory computing

This work evaluates the impact of applying hydrogen plasma (H-plasma) either after the deposition of the ZrO2 layer or as an intermediate step during the deposition on the performance of resistive random-access memory devices. Devices treated with H-plasma exhibited lower power consumption during the forming process and a higher Ron/Roff ratio over 50 cycles of SET and RESET pulses compared to untreated devices. The position of the plasma treatment significantly influenced the device's performance. We measured the leakage current, which correlates well with the forming process. Devices with higher leakage current required less power during the forming process. It was observed that a thicker capping layer following plasma insertion reduced forming power and improved the conductance quantization for multilevel cell characteristics.

Optimization of the position of TaOx:N-based barrier layer in TaOx RRAM devices

Resistive Random-Access Memory (RRAM) presents a transformative technology for diverse computing and artificial intelligence applications. However, variability in the high resistance state (HRS) has proved to be a challenge, impeding its widespread adoption. This study focuses on optimizing TaOx-based RRAMs by strategically placing a nitrogen-doped TaOx barrier-layer (BL) to mitigate variability in the HRS. Through comprehensive electrical characterization and measurements, we uncover the critical influence of BL positioning on HRS variability and identify the optimal location of the BL to achieve a 2x lowering of HRS variability as well as an expanded range of operating voltages. Incremental reset pulse amplitude measurements show that the TaOx:N maintains a low HRS variability even at higher operating voltages when the position of the BL is optimized. Our findings offer insights into stable and reliable RRAM operation, highlighting the potential of the proposed BL to enhance the functionality of TaOx-based RRAMs and elevate overall device performance.

Crystallization dynamics probed by transient resistance in phase change memory cells

Crystallization (set) time is a key bottleneck to achieve high-speed programming in phase change memory (PCM). Overcoming this limitation requires a deeper understanding of the solidification processes within nanoscale device configuration. This study explores crystallization dynamics in Ge2Sb2Te5 by measuring the transient resistance and power during the set process in confined PCM cells with nanosecond resolution. The transient resistance probes the phase, while the power can be used to evaluate temperature, thus uncovering details of the phase change dynamics. Our findings reveal a notable trend indicating that solidification from the melt results in faster crystallization compared with annealing the glassy state. Moreover, we observed notable differences in the solidification dynamics during set (crystallization) and reset (amorphization) pulses. Our nanosecond transient measurement methodology proves valuable in revealing crucial aspects of PCM crystallization dynamics, holding the potential to enable higher-speed programming.

High-temperature tolerant TaOX/HfO2 self-rectifying memristor array with robust retention and ultra-low switching energy

Due to the heat generation during operations in high-density three-dimensional (3D) integrated chips, a high-temperature tolerant and high-performance self-rectifying memristor (SRM) is a promising candidate for 3D integration. Here, we investigated the high-temperature characteristics of Ta/TaOX/HfO2/Pt SRMs with a 250 nm feature size in an 8 × 8 crossbar array (CBA). The SRMs exhibit high uniformity and can be operated repeatedly at Set (4 V/2 μs) and Reset (-2 V/1 μs) pulses for more than 104 cycles resulting in ultra-low switching energy (5.86 aJ for Set and 77.2 aJ for Reset). High yield of the array indicates the reliable preparation processes. Remarkably, the CBA is capable of stably resistive switching at high temperatures from 300 to 475 K. At 300 K, the SRM shows large nonlinearity (NL, ∼1.4 × 104) and rectification ratio (RR, ∼8.8 × 103) as well as high scalability (330 Mbit); at 475 K, the NL and RR of the SRM can still maintain above 400, and the scalability still reaches 71 Kbit. Moreover, our SRM passed a high-temperature retention test of over 5 × 104 s at 438 K. Segmented fittings of the I–V curves of the SRM at different temperatures were performed, concluding that large NL and RR attributed to the Schottky barriers at TaOX/HfO2 and Pt/HfO2 interfaces, respectively. Our work furnishes a feasible solution for high-density 3D integrated memristors in high-temperature application scenarios represented by automotive-grade chips.

A novel replica technique based dead zone free phase frequency detector and a self-cascode current-splitting charge pump for a low-spur low power phase-locked loop architecture

In a phase-locked loop (PLL), a high reset pulse width in the phase frequency detector (PFD) and current mismatches in the charge pump (CP) are the major contributors to a high reference spur in a clock. This paper presents a novel replica technique based dead zone free PFD to reduce the reset pulse and a self-cascode current-splitting CP to reduce current mismatch. The proposed PFD and CP are designed using the UMC 180 nm CMOS process. The proposed PFD achieves a reset pulse width of 113 ps. The CP is designed for a CP current of 100 μA. It has an output voltage range of 0.4 V–1.2 V, with a current mismatch of 1.3%. A PLL with the proposed PFD+CP achieves a reference spur that is 39.5% lower than the reference spur of the PLL with conventional PFD+CP. The proposed PFD+CP consumes 0.28 mW power in the locked stated. The layout area consumed by the proposed PFD+CP is 46 × 75 μm2.

A low-jitter and low-phase noise switched-loop filter PLL using fast phase-error correction and dual-edge phase comparison technique

This paper presents a low-jitter and low-phase noise type-II charge pump and switched-loop filter-based (SLF) phase-locked loop (PLL) with a fast phase error correction technique (FPEC) and a newly proposed dual-edge phase comparator (DEPC). To improve the phase noise, the bandwidth of the proposed PLL is extended to fREF/5 using the proposed DEPC. It consists of four D flip-flops in true single-phase clock (TSPC) logic, four current-mode logic-based inverters, and two logic OR gates. Unlike conventional DEPCs, the proposed DEPC has a small reset pulse width duration and negligible blind zone, and due to this, it can perform at higher frequencies along with an increased phase detection range. The proposed architecture is implemented for a 2.4 GHz output frequency that embodies DEPC and SLF using the FPEC technique in an 180-nm Semi-Conductor Laboratory (SCL) CMOS process. The proposed DEPC can work up to a maximum of 3.45 GHz frequency with 145 ps of reset delay. The proposed PLL accomplishes the 40 MHz bandwidth with a 200 MHz reference clock. The simulated rms jitter integrated from 10 kHz to 100 MHz and the phase noise of the output signal at an offset of 1 MHz are 860 fs and −122 dBc/Hz respectively. The proposed architecture occupies an area of 0.032 mm2 and consumes 8.2 mW from 1.8 V power supply.

Impact of Bottom Electrode in HfO2-Based Rram Devices on Switching Characteristics

Resistive random-access memory (RRAM) devices with hydrogen plasma treated HfO2 have shown low power switching (1) and good conductance quantization with programing pulsed operation (2) that qualify them to be used for in-memory computing. Engineering the distribution of defects or oxygen vacancies near the top and bottom electrodes has a significant impact on reducing the switching power and improving the multi-level cell (MLC) characteristics of the device. A graded distribution with higher concentration of oxygen vacancies closer to the top electrode (TE) due to hydrogen plasma treatment and lower concentration near the bottom electrode (BE) reduces switching energy (power) (1). However, the impact of the bottom electrode is not well understood. In this work we investigated three RRAM stacks as shown in Figure 1 that have the same top electrode metal (50nm PVD TiN/5nm ALD TiN) and dielectric (HfO2 with hydrogen plasma treatment at the mid-point) but with different BE for each stack: TiN (device A (control)), TiN plus Mo with thermal anneal (device B), and TiN plus Mo with plasma nitridation (device C). Choosing a more inert metal as the BE provides a lower oxygen vacancy concentration at the interface between the BE and the dielectric (3) which in turn reduces the switching power as noted with device C (TiN plus Mo with plasma nitridation) which switches at a minimum compliance current (Icc) of 500pA. It is possible that the presence of nitrogen prevents the increase in oxygen vacancy concentration near the BE. On the other hand, a higher concentration of oxygen vacancies at the BE and the dielectric interface leads to a larger magnitude of band bending and increases the height of Schottky barrier. This possibly leads to an increase in the switching power in device A and device B as compared to device C (3-4). Note that device A (TiN) switched at Icc=30µA and device B (TiN plus Mo with thermal anneal) switched at Icc=8µA, which is superior compared to device A in switching power. This suggests that the alloy of TiN with Mo is reducing the oxygen vacancies near the BE. To study the MLC characteristics of the devices, we performed a train of 36 RESET pulses with fixed amplitude Vp= -1V and pulse width starting at 4µs and increasing by 20µs every 3 pulses, while we applied Vr=0.1V and tr=10µs after each pulse to measure the conductance. Figure 2 shows that device B (TiN plus Mo with thermal anneal) has good MLC with no overlap between the states while device A shows unstable MLC behavior due to time constant variation. Figure 3a shows the results of device C for the same RESET pulse train that was applied to devices A and B. Since device C switches at very low current and voltage, the conductance quantization was unstable after 15 pulses due to overstress of the conductive filament. Figure 3b shows the results after selecting the proper pulse set Vp= -0.5V and pulse width starting at tp=100ns and increasing by 100ns every 3 pulses, while we applied Vr=0.05V and tr=100ns after each pulse, resulting in a better conductance quantization compared to the previous setup. Appropriate engineering of the BE and managing of the oxygen vacancy distribution by hydrogen plasma treatment can significantly reduce the switching power.

A nanoribbon device for analog phase change memory targeting neural network applications

Phase change memory (PCM) is one of the most mature technologies for non-von Neumann computing. However, abrupt amorphization becomes a barrier for training artificial neural networks, due to limitations of the inherent operational mechanism of phase change materials. The devices can achieve a gradual conductance change in the crystallization process, while the conductance change for amorphization process is much more abrupt. This work presents a possible explanation for the RESET abrupt change issue in T-shaped devices, based on the analysis of the volume and connectivity of the amorphous and crystalline regions. Using this model, a nanoribbon device for analog PCM targeting neural network applications is designed, fabricated, and characterized. The designed device can realize a gradual RESET without changing the amplitude and width of RESET pulses. Using a nanoribbon device as a single synapse in the designed array reduces the number of SET operations needed to achieve the same accuracy in convolutional neural network simulation by 75%, which implies a significant reduction in power and time consumption. This work provides an effective way to implement gradual RESET for PCM devices.

Multifunctional Crystalline InGaSnO Phototransistor Exhibiting Photosensing and Photosynaptic Behavior Using Oxygen Vacancy Engineering.

A multifunctional optoelectronic device implementing photodetector, photosynapse, and photomemory is of increasing attention for neuromorphic system. This enables multiple devices to be replaced with a single device, which simplifies the structure of complex, highly integrated electronics. Here, a multifunctional c-axis-aligned crystalline indium gallium tin oxide thin-film transistor (TFT) optoelectronic device is demonstrated. The photodetecting and photosynaptic behaviors could be demonstrated by tuning of gate pulse. The device shows a high responsivity of 1.1×106 AW-1 to blue light (467nm) and cutoff frequency (f-3dB ) of 2400Hz exhibiting high frequency switching using a gate reset pulse. It is possible to implement photosynaptic behavior using persistent photoconductivity effect by applying a gate bias to make the TFT depletion mode. When potentiation and depression of synaptic weight are implemented with light pulse and gate voltage pulse, respectively, 64-state potentiation-depression curves are demonstrated with excellent nonlinearity of 1.13 and 2.03, respectively. When an artificial neural network is constructed with this device for the Modified National Institute of Standards and Technology training pattern recognition simulation, it shows a high pattern recognition accuracy of 90.4%.

Thermal environment impact on HfOx RRAM operation: A nanoscale thermometry and modeling study

As the demand for computing applications capable of processing large datasets increases, there is a growing need for new in-memory computing technologies. Oxide-based resistive random-access memory (RRAM) devices are promising candidates for such applications because of their industry readiness, endurance, and switching ratio. These analog devices, however, suffer from poor linearity and asymmetry in their analog resistance change. Various reports have found that the temperature in RRAM devices increases locally by more than 1000 K during operation. Therefore, temperature control is of paramount importance for controlling their resistance. In this study, scanning thermal microscopy is used to map the temperature of Au/Ti/HfOx/Au devices at a steady power state and to measure temperature dynamics of the top electrode above the filament location during both resistive switching loops and voltage pulsing. These measurements are used to verify the thermal parameters of a multiphysics finite elements model. The model is then used to understand the impact of thermal conductivities and boundary conductances of constituent materials on resistance change during the first reset pulse in RRAM devices. It is found that the resistance change can be reduced significantly when the temperature in the titanium capping layer is reduced. We find that the greatest temperature reduction and, therefore, the lowest resistance change in the device are afforded by capping layers with increased thermal conductivities. This work links thermal properties to the resistance change in RRAM devices, providing critical insights into engineering devices with improved switching dynamics.

Modeling Reset, Set, and Read Operations in Nanoscale Ge2Sb2Te5Phase‐Change Memory Devices Using Electric Field‐ and Temperature‐Dependent Material Properties

Herein, a finite element simulation framework for phase‐change memory devices that simultaneously solves for current continuity, electrothermal heating, and crystallization–amorphization dynamics using electrothermal models and dynamic material parameters that are functions of electric field and temperature is described. In this latest model, an electric field‐ and temperature‐dependent electrical conductivity model of stable amorphous Ge2Sb2Te5(GST) obtained from experiments performed on GST line cells to study Read, Reset, and Set operations of mushroom cells is incorporated. The effects of current polarity, heater height, Reset pulse rise and fall times, access device configuration, and ambient temperature are analyzed. The simulation results predict a 2x change in Reset current requirements with different current polarity due to thermoelectric effects. Heater height plays a significant role in thermal losses; ≈16% decrease in Reset current for 4x increase in the heater height is obtained. Increase in the ambient temperature results in a linear decrease in the Reset power required to achieve the same Reset/Set resistance contrast.

Analysis of Intrinsic Variability in Phase-Change Memory Switching Originating from Stochastic Nucleation Using Fully Coupled Electrothermal and Phase-Field Models

The variability of nonvolatile memory becomes more important as memory capacity increases. This is because, in general, individual device variability increases with scaling down. Using our simulation, we analyzed the intrinsic variability in phase-change memory switching originating from stochastic nucleation for self-heating and heater-based cell architectures. Differential equations of electrothermal and phase-field models were numerically solved in a fully coupled manner to simulate the amorphization and crystallization of the active material in the reset and set operations, respectively. Nuclei were seeded stochastically based on Poisson’s probability. The phase distribution and cell resistance vary sample by sample owing to stochastic nucleation. The variability of reset resistance occurs because of nucleation during the falling time (FT) of the reset pulse, which is a short time of 10 ns. The resistance distribution was obtained by collecting data from 100 samples. All cells become reset by the 10 ns FT, with a narrow distribution of the reset resistance. As the FT increases, the resistance distribution becomes wider because some cells obtain more nuclei. As the FT becomes sufficiently long, the resistance distribution narrows again, and almost all cells are in the set state. The reset resistance is better fitted to the Weibull statistics than to the lognormal statistics. The heater-based cell showed less variability, whereas the self-heating cell consumed less energy during switching. Our simulation is useful in estimating the device performance and analyzing the variability as demonstrated in this report.

The Q-Pix pixelated readout concept for future Liquid Argon Time Projection Chambers: status and prospects.

Future long baseline neutrino experiments such as the Deep Underground Neutrino Experiment (DUNE) pose challenges for development of readout techniques for multi-kiloton LAr Time Projection Chambers (TPCs). In contrast to wire/strip anode readout, a pixelated readout eliminates disadvantages such as disambiguation in 2D track reconstruction. The Q-Pix Consortium, established in 2019, is developing a pixelated readout technique for LAr TPCs based on charge-integrate/reset (CIR) circuits. The CIR blocks generate a sequence of reset pulses with time intervals corresponding to fixed charge integrals, allowing signal reconstruction without continuous digitization. The Q-Pix ASIC, intended for reading out pixel arrays, comprises CIR blocks along with digital components responsible for communication and reconfigurable data routing. This work is devoted to give an overview of the Q-Pix project, its status, and prospects, with emphasis on the development and prototyping of the Q-Pix readout ASICs.

(Digital Presentation) Finite Element Modeling of Thermoelectric Effects in Phase Change Memory Cells

Phase change memory (PCM) is a high-speed high-endurance non-volatile electronic memory technology which utilizes the electrical resistivity difference between the amorphous and the crystalline phases of phase change materials, such as Ge2Sb2Te5 (GST), to store information [1]. PCM cells are switched by short duration electrical pulses by melting a small volume to transition to dielectric amorphous phase (reset) or heating above glass-transition temperature to crystallize (set). The cells experience extremely large thermal gradients (~ 50 K/nm) and high current densities (~50 MA/cm2) during reset. Hence thermoelectric (TE) contributions are very significant both in bulk and at the material and solid-liquid interfaces [2]. In this work, we performed finite element simulations of mushroom PCM cells and analyzed contributions of Joule heating (symmetric) and thermoelectric heat (asymmetric) during reset and set operations using COMSOL Multiphysics. A field effect transistor (FET), modeled using a circuit model, is used as an access device. We self-consistently solve for current continuity, heat transport (Fig. 1) and phase changes in the materials, including temperature, electric-field and phase-dependent electrical and thermal conductivity, thermal boundary resistances and latent heat of fusion, along with temperature dependent stochastic nucleation, growth and grain-boundary amorphization, accounting for all energy exchanges [3-6].Thermoelectric heat exchanges are due to generation and recombination of electrons and holes as well as the kinetic energy absorbed or released by the transported free charge carriers [7]. These energy exchanges can take place at material interfaces (Peltier heat) or in bulk material (Thomson heat). Discontinuity of Seebeck coefficient and temperature (due to thermal boundary resistances) make TE contributions very significant in PCM devices.Our simulation results show the significance of the TE contributions on the reset behavior of PCM devices (Fig. 2). Self-heating at the bottom TiN-GST interface is substantially higher for one of the current polarities, giving rise to an over-sized mushroom in the case of negative polarity, for the same reset pulse amplitude. The negative polarity case (over-reset cell) cannot be set with the same set pulse as the positive polarity case. From the power consumption and peak current requirement point of view, it is advantageous to have higher TE heating inside the mushroom and its interfaces. TE cooling away from the mushroom interfaces is advantageous for reduced thermal cross-talk and write-disturb on the neighboring cells. However, thermal gradients also need to be kept under consideration for reliability perspective.Acknowledgement: Md Tashfiq Bin Kashem acknowledges support from General Electric through a Graduate Fellowship for Innovation. This work is supported through US National Science Foundation (NSF) award # 1710468.

Energy efficient short-term memory characteristics in Ag/SnOx/TiN RRAM for neuromorphic system

In this work, we demonstrate the short-term memory effects of an Ag/SnOx/TiN memristor device using the spontaneous reset process for a neuromorphic system. The thickness and chemical properties of the SnOx layer are investigated via transmission electron microscopy and X-ray photoemission spectroscopy. The non-volatile and volatile memory properties are determined by the forming process, which is verified by the retention test. The conductance change increases as the interval between the pulses decrease because of the reduction of the spontaneous current decay. Moreover, paired-pulse facilitation (PPF) characteristics are demonstrated, where the PFF index decreases with an increase in the pulse interval. We first investigated potentiation with the application of set pulses and depression without reset pulses is examined for the neuromorphic system. With this pulse, we successfully implemented high-performance reservoir computing that has a range from [0000] to [1111] using the short-term memory characteristics of the Ag/SnOx/TiN device.

Treatment Tone Spacing and Acute Effects of Acoustic Coordinated Reset Stimulation in Tinnitus Patients.

Acoustic coordinated reset (aCR) therapy for tinnitus aims to desynchronize neuronal populations in the auditory cortex that exhibit pathologically increased coincident firing. The original therapeutic paradigm involves fixed spacing of four low-intensity tones centered around the frequency of a tone matching the tinnitus pitch, f T , but it is unknown whether these tones are optimally spaced for induction of desynchronization. Computational and animal studies suggest that stimulus amplitude, and relatedly, spatial stimulation profiles, of coordinated reset pulses can have a major impact on the degree of desynchronization achievable. In this study, we transform the tone spacing of aCR into a scale that takes into account the frequency selectivity of the auditory system at each therapeutic tone's center frequency via a measure called the gap index. Higher gap indices are indicative of more loosely spaced aCR tones. The gap index was found to be a significant predictor of symptomatic improvement, with larger gap indices, i.e., more loosely spaced aCR tones, resulting in reduction of tinnitus loudness and annoyance scores in the acute stimulation setting. A notable limitation of this study is the intimate relationship of hearing impairment with the gap index. Particularly, the shape of the audiogram in the vicinity of the tinnitus frequency can have a major impact on tone spacing. However, based on our findings we suggest hypotheses-based experimental protocols that may help to disentangle the impact of hearing loss and tone spacing on clinical outcome, to assess the electrophysiologic correlates of clinical improvement, and to elucidate the effects following chronic rather than acute stimulation.

RRAM Random Number Generator Based on Train of Pulses

In this paper, the modulation of the conductance levels of resistive random access memory (RRAM) devices is used for the generation of random numbers by applying a train of RESET pulses. The influence of the pulse amplitude and width on the device resistance is also analyzed. For each pulse characteristic, the number of pulses required to drive the device to a particular resistance threshold is variable, and it is exploited to extract random numbers. Based on this behavior, a random number generator (RNG) circuit is proposed. To assess the performance of the circuit, the National Institute of Standards and Technology (NIST) randomness tests are applied to evaluate the randomness of the bitstreams obtained. The experimental results show that four random bits are simultaneously obtained, passing all the applied tests without the need for post-processing. The presented method provides a new strategy to generate random numbers based on RRAMs for hardware security applications.

3D fat-suppressed T1-weighted volume isotropic turbo spin-echo acquisition (VISTA) imaging for the evaluation of the ectopic posterior pituitary gland.

We evaluated the usefulness of fat-suppressed three-dimensional T1-weighted volume isotropic turbo spin-echo acquisition (FS 3D T1W-VISTA) imaging for the evaluation of the ectopic posterior pituitary gland (EPPG). This retrospective study included 9 patients with EPPG due to causes other than tumor. All underwent sagittal two-dimensional (2D) T1W-, FS 3D T1W-VISTA- (VISTA), and 3D T2W-driven equilibrium radiofrequency reset pulse (DRIVE) imaging. Two radiologists independently reviewed the 2D T1W- and VISTA images for their image quality and for visualization of the EPPG and of pituitary stalk transection. DRIVE findings were used as the reference standard for pituitary stalk transection. Interobserver and intermodality agreements were evaluated with the kappa (κ) coefficient. The mean grade assigned to the 2D T1W- and the VISTA imaging technique for visualization of the EPPG was assessed by the Mann-Whitney U test. Interobserver agreement for visualization of the EPPG on 2D T1W- and VISTA images was excellent (κ = 0.82 and κ = 1.00, respectively). The mean grade for EPPG visualization was significantly higher for VISTA- than 2D T1W images (p = 0.0039). FS 3D T1W-VISTA imaging is useful for the evaluation of EPPG. Conventional MRI yields insufficient information for the evaluation of the ectopic posterior pituitary gland (EPPG). The visualization of the EPPG was significantly higher for fat-suppressed three-dimensional T1-weighted volume isotropic turbo spin-echo acquisition (FS 3D T1W-VISTA) than 2D T1W images. FS 3D T1W-VISTA imaging is useful for the evaluation of the EPPG.

Gradually Tunable Conductance in TiO2/Al2O3 Bilayer Resistors for Synaptic Device

In this work, resistive switching and synaptic behaviors of a TiO2/Al2O3 bilayer device were studied. The deposition of Pt/Ti/TiO2/Al2O3/TiN stack was confirmed by transmission electron microscopy (TEM) and energy X-ray dispersive spectroscopy (EDS). The initial state before the forming process followed Fowler-Nordheim (FN) tunneling. A strong electric field was applied to Al2O3 with a large energy bandgap for FN tunneling, which was confirmed by the I-V fitting process. Bipolar resistive switching was conducted by the set process in a positive bias and the reset process in a negative bias. High-resistance state (HRS) followed the trap-assisted tunneling (TAT) model while low-resistance state (LRS) followed the Ohmic conduction model. Set and reset operations were verified by pulse. Moreover, potentiation and depression in the biological synapse were verified by repetitive set pulses and reset pulses. Finally, the device showed good pattern recognition accuracy (~88.8%) for a Modified National Institute of Standards and Technology (MNIST) handwritten digit database in a single layer neural network including the conductance update of the device.

Self-Rectifying Resistive Switching and Short-Term Memory Characteristics in Pt/HfO2/TaOx/TiN Artificial Synaptic Device.

Here, we propose a Pt/HfO2/TaOx/TiN artificial synaptic device that is an excellent candidate for artificial synapses. First, XPS analysis is conducted to provide the dielectric (HfO2/TaOx/TiN) information deposited by DC sputtering and atomic layer deposition (ALD). The self-rectifying resistive switching characteristics are achieved by the asymmetric device stack, which is an advantage of the current suppression in the crossbar array structure. The results show that the programmed data are lost over time and that the decay rate, which is verified from the retention test, can be adjusted by controlling the compliance current (CC). Based on these properties, we emulate bio-synaptic characteristics, such as short-term plasticity (STP), long-term plasticity (LTP), and paired-pulse facilitation (PPF), in the self-rectifying I–V characteristics of the Pt/HfO2/TaOx/TiN bilayer memristor device. The PPF characteristics are mimicked by replacing the bio-stimulation with the interval time of paired pulse inputs. The typical potentiation and depression are also implemented by optimizing the set and reset pulse. Finally, we demonstrate the natural depression by varying the interval time between pulse inputs.