Remote Memory Access Communication Research Articles

Designing truly one-sided MPI-2 RMA intra-node communication on multi-core systems

The increasing popularity of multi-core processors has made MPI intra-node communication, including the intra-node RMA (Remote Memory Access) communication, a critical component in high performance computing. MPI-2 RMA model includes one-sided data transfer and synchronization operations. Existing designs in popularly used MPI stacks do not provide truly one-sided intra-node RMA communication. They are built on top of two-sided send-receive operations, therefore suffering from overheads of two-sided communication and dependency on the remote side. In this paper, we enhance existing shared memory mechanisms to design truly one-sided synchronization. In addition, we design truly one-sided intra-node data transfer using two kernel based direct copy alternatives: basic kernel-assisted approach and I/OAT-assisted approach. Our new design eliminates the overhead of using two-sided operations and eliminates the involvement from the remote side. We also propose a series of benchmarks to evaluate various performance aspects over multi-core architectures (Intel Clovertown, Intel Nehalem and AMD Barcelona). The results show that the new design obtains up to 39% lower latency for small and medium messages and demonstrates 29% improvement in large message bandwidth. Moreover, it provides superior performance in terms of better scalability, reduced cache misses, higher resilience to process skew and increased computation and communication overlap. Finally, up to 10% performance benefits is demonstrated for a real scientific application AWM-Olsen.

High Performance Remote Memory Access Communication: The Armci Approach

This paper describes the Aggregate Remote Memory Copy Interface (ARMCI), a portable high performance remote memory access communication interface, developed oriinally under the U.S. Department of Energy (DOE) Advanced Computational Testing and Simulation Toolkit project and currently used and advanced as a part of the run-time layer of the DOE project, Programming Models for Scalble Parallel Computing. The paper discusses the model, addresses challenges of portable implementations, and demonstrates that ARMCI delivers high performance on a variety of platforms. Special emphasis is placed on the latency hiding mechanisms and ability to optimize noncotiguous data transfers.

Optimisation and performance evaluation of mechanisms for latency tolerance in remote memory access communication on clusters

This paper describes the design and performance evaluation of the mechanisms for latency tolerance in the remote memory access communication on clusters equipped with high-performance networks such as Myrinet. It discusses strategies that bridge the gap between user-level requirements and network-specific communication interfaces while attempting to increase opportunities for latency hiding. Mechanisms for overlapping communication with computation and coalescing small messages (trading latency for bandwidth) are explored. The effectiveness of these techniques is evaluated using microbenchmarks and application kernels including the NAS parallel benchmark suite. The microbenchmark results showed a much better degree of overlap for non-blocking operations in ARMCI when compared with MPI. Application results showed up to 30 45% improvement over MPI on using non-blocking operations. The aggregation of small messages yielded performance improvement of up to 78% over non-aggregated communication.

Remote Memory Access: A Case for Portable, Efficient and Library Independent Parallel Programming

In this work we make a strong case for remote memory access (RMA) as the effective way to program a parallel computer by proposing a framework that supports RMA in a library independent, simple and intuitive way. If one uses our approach the parallel code one writes will run transparently under MPI‐2 enabled libraries but also bulk‐synchronous parallel libraries. The advantage of using RMA is code simplicity, reduced programming complexity, and increased efficiency. We support the latter claims by implementing under this framework a collection of benchmark programs consisting of a communication and synchronization performance assessment program, a dense matrix multiplication algorithm, and two variants of a parallel radix‐sort algorithm and examine their performance on a LINUX‐based PC cluster under three different RMA enabled libraries: LAM MPI, BSPlib, and PUB. We conclude that implementations of such parallel algorithms using RMA communication primitives lead to code that is as efficient as the message‐passing equivalent code and in the case of radix‐sort substantially more efficient. In addition our work can be used as a comparative study of the relevant capabilities of the three libraries.

JBSP: A BSP Programming Library in Java

In this paper, we introduce a Java implementation of the Bulk Synchronous Parallel (BSP) model. JBSP (a Java-based BSP system) uses a two-daemon architecture which makes a clear separation of the computation and communication involved in parallel programs. Java threads are used in the implementation of the JBSP system to realize user defined JBSP tasks as well as to carry out system activities. The JBSP library provides programmers with both explicit message-passing and remote memory access communication methods. In addition, a set of benchmark experiments was also carried out to compare the performance of JBSP with that of BSPlib. Results show that there is considerable overhead in communications in the current implementation of JBSP due to the use of Java's Object Serialization. It was also found that although BSPlib outperforms JBSP in all the cases, JBSP is more scalable in terms of the BSP machine-parameters.