Reflow Process Research Articles

Microstructural and Mechanical Characterization of Cu/SnAg Pillar Bumps with Ni-Less Surface Finish Utilizing Laser-Assisted Bonding (LAB)

In this study, an interconnection was formed between a Cu/SnAg pillar bump and an Ni-less surface-treated Cu pad through laser-assisted bonding (LAB), and its bonding characteristics were evaluated. The LAB process influences the bond quality and mechanical strength based on the laser irradiation time and laser power density. The growth of the intermetallic compound (IMC) in the joint cross-section was observed via FE-SEM analysis. Under optimized LAB conditions, minimal IMC growth and high bonding strength were achieved compared to conventional thermo-compression bonding (TCB) and mass reflow (MR) processes. As the laser irradiation time and laser power density increased, solder splashing was observed at bump temperatures above 300 °C. This is hypothesized to be due to the rapid temperature rise causing the flux to vaporize explosively, resulting in simultaneous solder splashing. With increasing laser power density, the failure mode transitioned from the solder to the IMC.

Finite-Element Analysis and Multiobjective Optimization of Solder Joint Temperature Difference and Cooling Stress During PCBA Reflow Process

Finite-Element Analysis and Multiobjective Optimization of Solder Joint Temperature Difference and Cooling Stress During PCBA Reflow Process

Development of Virtual Material Approach for Modeling Viscoelasticity of Underfill in Flip Chip Packages

This paper presents a virtual material approach to modeling the viscoelastic properties of underfill materials in flip chip packages. The role of underfill is critical, particularly in addressing the challenges associated with cracks in solder bumps in thermal cycles. To ensure the long-term reliability of the semiconductor packages, it is crucial to understand how different underfill properties interact with the package and influence the stress distribution. A fully cured underfill material exhibits viscoelastic behavior. But in many cases, viscoelasticity is neglected and underfill properties are simplified to linear elastic in the finite element analysis (FEA) to save computational cost. For high accuracy numerical predictions, it is indispensable to include a full characterization of viscoelastic properties for underfill in simulation. This work develops a virtual material approach to parameterize the viscoelasticity of underfill materials. A generalized logistic function is adopted for the parameterization of the frequency-dependent modulus in master curve. The master curve is then calibrated in Prony series for numerical implementation. A three-dimensional FEA model is built for evaluating underfill properties in flip chip packages. Fine details such as solder bumps are only included in the sub-modeling for computational efficiency. The FEA model is validated by warpage measurement on a test vehicle in reflow process. Finally, with the developed virtual material approach and the FEA model, various viscoelastic properties of underfill are compared, and the influence on package stress including fillet top stress, die corner stress, and solder bump creep strain is evaluated. The virtual material approach can be particularly useful when dynamic mechanical analysis (DMA) results are not available or in scenarios where obtaining certain properties is challenging. The findings of this study contribute to the development of guidelines for selecting optimal underfill materials, ultimately enhancing the reliability of electronic devices.

Study of Thermal Conductivity and Reliability of InAg Soldering Thermal Interface Material by Formic Acid Reflow for TIM1 IC Module Package

Indium and indium-containing alloys such as indium silver (InAg) alloys have generally been paid considerable attention as thermal interface materials for usage in thermal management of microprocessors such as CPU, GPU and AI accelerator. This is, especially true for high-performance computing electronics with high power density. Reflow process parameters of InAg preforms with differing compositions of Ag ranging from 3 to 10 wt% as well as various thicknesses were extensively studied bonding Cu to Cu to achieve optimum properties and performance of the InAg soldered joint using formic acid vacuum reflow. Basic characterization was also completed including basic physical properties such as density, modulus and phase transition. Moreover, X-ray scanning and confocal scanning acoustic microscopy (C-SAM) were used to identify voids and delamination of the InAg soldered joints, respectively. Laser Flash Analysis (LFA) was employed to measure thermal conductivity of the soldered joint bonding Cu to Cu after the reflow process in the determined optimum conditions. Thermal cycling testing (TCT) was conducted with a profile of -40°C to 125°C, 30 min of dwell time and highly accelerated stress testing (HAST) with a profile of 110°C/85%RH/0.22 MPa/264 hr, to evaluate reliability of the soldered joints, the initial characterization testing was repeated at several intervals. To further understand the change of microstructure after the given number of thermal cycling, cross-sectional samples were prepared and scanning electron microscopy (SEM) was used to characterize morphologies of the soldered joints. In this presentation, the influence of the different compositions of InAg alloys and bond line thickness (BLT) on the voiding performance, delamination and thermal conductivity of the soldered joints, as well as the results of reliability are discussed.

Fused Silica Micro Shell Resonators by a Wafer-Level Thermal Reflow Process

Fused Silica Micro Shell Resonators by a Wafer-Level Thermal Reflow Process

Soldering Defects on Immersion Tin and the Impact of the Tin-Oxide Layer

Immersion tin is a final finish highly accepted in the automotive industry and finds increasingly application in the package substrate industry. As due to the immersion reaction the plating thickness of tin is limited, there are concerns that due to the formation of the intermetallic phase during the reflow process, the solderability of the tin layer might be affected. During the assembly process and the formation of the intermetallic phase the free tin is consumed and only islands of free tin remain after the second reflow cycle. Additionally, an oxide layer is formed, and the homogeneity and thickness of the oxide layer is impacted by the reflow conditions and the overall process cleanliness. The interaction of intermetallic phase formation, the amount of remaining free tin and the tin oxide layer will define the soldering performance of the tin layer and the risk of the occurrence of soldering defects. In this paper different failure modes and connected failure mechanisms will be explained. The tin oxide layer is identified to play a crucial role in this interaction and factors are investigated, which impact the oxide layer formation and homogeneity. Various methods are presented to determine the oxide layer thickness and different approaches are studied to modify it. Results are presented that show that with a dedicated solution to modify the oxide layer the risk for solderability defects on immersion tin can be reduced.

Soldering reflow process optimization based on simulation

Soldering reflow process optimization based on simulation

Mitigating solder voids in quad flat no-lead components: A vacuum reflow approach

Mitigating solder voids in quad flat no-lead components: A vacuum reflow approach

Fabrication and Reflow of Indium Bumps for Active-Matrix Micro-LED Display of 3175 PPI

Fabrication and Reflow of Indium Bumps for Active-Matrix Micro-LED Display of 3175 PPI

SnPbInBiSb high-entropy solder joints with inhibited interfacial IMC growth and high shear strength

SnPbInBiSb high-entropy solder joints with inhibited interfacial IMC growth and high shear strength

Quaternary low melting point Sn-Bi-in-xGa solder with improved mechanical performance for advanced electronic packaging

Quaternary low melting point Sn-Bi-in-xGa solder with improved mechanical performance for advanced electronic packaging

Microstructural Evolution of Intermetallic Compound Between SN100C Solder and ENIMAG Substrate During Isothermal Ageing

SN100C alloy emerges as a promising candidate when introducing lead-free solder alternativesdue to its mechanical properties and solderability. The study aims to explore interfacial reactions between SN100C solder and ENIMAG surface finish. Methods involve preparingENIMAG substrates, solder paste application, and reflow processes following JEDEC standards. Isothermal ageing treatments were conducted, and interfacial reactions were characterized using top surface and cross-section analyses via Optical Microscope (OM), Scanning Electron Microscope (SEM), and Energy Dispersive X-ray (EDX). Post-reflow, distinct IMC layers formed at the SN100C/ENIMAG solder joint's interface, evolving with ageing. Further analysis via cross-section confirms the initial formation of (Ni, Cu)3Sn4 layer followed by (Cu, Ni)6Sn5, each exhibiting varying appearance and thicknesses. Isothermal ageing increases IMC thickness, which is particularly influenced by Cu diffusion and exposure to high temperatures, and itfacilitates the growth rate of IMCs.

Contact Hole Shrinkage: Simulation Study of Resist Flow Process and Its Application to Block Copolymers.

For vertical interconnect access (VIA) in three-dimensional (3D) structure chips, including those with high bandwidth memory (HBM), shrinking contact holes (C/Hs) using the resist flow process (RFP) represents the most promising technology for low-k1 (where CD=k1λ/NA,CD is the critical dimension, λ is wavelength, and NA is the numerical aperture). This method offers a way to reduce dimensions without additional complex process steps and is independent of optical technologies. However, most empirical models are heuristic methods and use linear regression to predict the critical dimension of the reflowed structure but do not account for intermediate shapes. In this research, the resist flow process (RFP) was modeled using the evolution method, the finite-element method, machine learning, and deep learning under various reflow conditions to imitate experimental results. Deep learning and machine learning have proven to be useful for physical optimization problems without analytical solutions, particularly for regression and classification tasks. In this application, the self-assembly of cylinder-forming block copolymers (BCPs), confined in prepatterns of the resist reflow process (RFP) to produce small contact hole (C/H) dimensions, was described using the self-consistent field theory (SCFT). This research paves the way for the shrink modeling of the enhanced resist reflow process (RFP) for random contact holes (C/Hs) and the production of smaller contact holes.

Application of Cu Reflow Process on Ru Liner for Advanced Nanoscale Interconnects

Abstract A novel physical vapor deposition (PVD) Cu reflow process with chemical vapor deposition (CVD) Ru liner was optimized for 10 nm generation interconnects and beyond. For these and future device generations, void-free Cu interconnects are a key requirement, and the PVD Cu reflow process improvements reported here provide significant advancement in enabling excellent Cu reflow performance. The Ru liner exhibited much better Cu reflow performance than a Ta liner by effectively suppressing Cu agglomeration during the Cu reflow process, likely due to a better adhesion to Cu. Reflow temperature and Ru thickness (continuity) are critical parameters for achieving good Cu reflow performance, and this optimized Cu reflow process with Ru liner did not show line top voids or sidewall voids, which are the two major void types often observed at this dimension when pursuing Cu fill with the conventional Cu seed and Cu plating fill scheme. Furthermore, this novel Cu reflow process exhibited an electromigration (EM) performance enhancement due to having better Cu fill quality.

Bonding Properties of Package-on-Package Stack Interconnection Using by 150 ㎛ Height Copper Posts

In this study, we used copper (Cu) posts, plated to a height of 150 μm, as interconnections to form electrodes between different package layers. The upper layer consisted of a chip-scale package (CSP), while the lower layer was made up of a flip chip-chip scale package (FCCSP). We plated a Cu post on the side of FCCSP substrate, and produced the FCCSP package by thermo-compression (TC) bonding with copper pillar solder bumps on the center of substrate. The surface of the bottom electrode for the upper CSP received a surface finish of electroless nickel, electroless palladium, and immersion gold (ENEPIG). The bonding surface of the lower FCCSP was the bare Cu surface of the epoxy-molded Cu post. The PoP joining process used a vacuum reflow process with solder paste and solder balls. To understand the package joint's characteristics, we measured voids and shear strength, and analyzed the cross-sectional microstructure. The temperature profile used in the PoP joining process demonstrated optimal joint characteristics with a joint void content of 2.3% and a joint strength of approximately 44 MPa when formic acid was utilized and the activation preheating time was extended. Cross-sectional warpage analysis of the PoP package revealed a minimal difference of approximately 31 μm between the center and the ends. This study successfully developed a stacked package with a PoP structure using Cu Post, and the bonding process was optimized to minimize warpage in the PoP package.

Exploring joining techniques for diamond chips on metallized substrates: Micro- and nano-scale mechanical testing approach

Exploring joining techniques for diamond chips on metallized substrates: Micro- and nano-scale mechanical testing approach

Photothermal effects on low-temperature hybrid solder joints and its superior drop reliability

Photothermal effects on low-temperature hybrid solder joints and its superior drop reliability

Enhanced Mechanical Properties with Ag Addition in Electroplated Ni-Sn Solder Joints: Sub-10 Micron Bond Thickness

Keywords: Micro-bump; Microstructure; Intermetallic compounds; Mechanical properties; thermocompression bondingThe advancement of electronic devices has garnered more extensive attention towards three-dimensional integrated circuit (3D-IC) technology due to microbump size reduction and increased power density. Microbumps play an important role in driving the development of this technology, especially in 3D chip-stacking involving multiple reflow processes. The reduction in microbump height spotlights the presence of intermetallic compounds (IMCs). In comparison to traditional ball grid array (BGA) solder joints, microbumps with smaller solder volumes exhibit a predominant fraction of IMCs at solder joints, especially with microbump dimensions potentially shrinking to less than 10 micrometers.The interface reaction within confined spaces has become a critical concern. Mechanical properties will be dominated by IMC properties rather than solder characteristics. In conventional Cu/Sn/Cu solder joints, grain coarsening and prolonged reflowing times, which result in IMC collisions from opposing substrates, forming columnar grains with a uniform orientation, make the solder joint less reliable. Furthermore, the Cu3Sn layer in Cu/Sn/Cu microbumps presents another challenges, indicating the formation of Kirkendall voids, increasing the risk of brittle interface fractures.This study investigates the mechanical reliability and microstructure of two sub-10um sandwiched structures: Cu/Ni/Sn/Ni/Cu and Cu/Ni/Sn-3.5Ag/Ni/Cu. In the 3D-IC manufacturing process, solder joints will experience multiple reflow processing. Different reflow heat treatment process to achieve different fractions of Ni3Sn4 IMCs were performed on both sandwiched structure. Despite the formation of internal voids due to volume shrinkage in Ni/Sn solder joints, the addition of silver in the solder, forming Ag3Sn, effectively fills these voids. The long-time reflowed sample showed outstanding mechanical properties via the addition of silver in solder. In this study, the influence of silver addition on the microstructure and mechanical properties of the overall joints under identical reflow conditions, the fracture path observation after shear test were investigated. The growth mechanism of Ag3Sn and its distribution in the solder would be further explored and addressed. Figure 1

Diffusion Barrier Performance of Ni-W Layer at Sn/Cu Interfacial Reaction.

As the integration of chips in 3D integrated circuits (ICs) increases and the size of micro-bumps reduces, issues with the reliability of service due to electromigration and thermomigration are becoming more prevalent. In the practical application of solder joints, an increase in the grain size of intermetallic compounds (IMCs) has been observed during the reflow process. This phenomenon results in an increased thickness of the IMC layer, accompanied by a proportional increase in the volume of the IMC layer within the joint. The brittle nature of IMC renders it susceptible to excessive growth in small-sized joints, which has the potential to negatively impact the reliability of the welded joint. It is therefore of the utmost importance to regulate the formation and growth of IMCs. The following paper presents the electrodeposition of a Ni-W layer on a Cu substrate, forming a barrier layer. Subsequently, the barrier properties between the Sn/Cu reactive couples were subjected to a comprehensive and systematic investigation. The study indicates that the Ni-W layer has the capacity to impede the diffusion of Sn atoms into Cu. Furthermore, the Ni-W layer is a viable diffusion barrier at the Sn/Cu interface. The "bright layer" Ni2WSn4 can be observed in all Ni-W coatings during the soldering reflow process, and its growth was almost linear. The structure of the Ni-W layer is such that it reduces the barrier properties that would otherwise be inherent to it. This is due to the "bright layer" Ni2WSn4 that covers the original Ni-W barrier layer. At a temperature of 300 °C for a duration of 600 s, the Ni-W barrier layer loses its blocking function. Once the "bright layer" Ni2WSn4 has completely covered the original Ni-W barrier layer, the diffusion activation energy for Sn diffusion into the Cu substrate side will be significantly reduced, particularly in areas where the distortion energy is concentrated due to electroplating tension. Both the "bright layer" Ni2WSn4 and Sn will grow rapidly, with the formation of Cu-Sn intermetallic compounds (IMCs). At temperatures of 250 °C, the growth of Ni3Sn4-based IMCs is controlled by grain boundaries. Conversely, the growth of the Ni2WSn4 layer (consumption of Ni-W layer) is influenced by a combination of grain boundary diffusion and bulk diffusion. At temperatures of 275 °C and 300 °C, the growth of Ni3Sn4-based IMCs and the Ni2WSn4 layer (consumption of Ni-W layer) are both controlled by grain boundaries. The findings of this study can inform the theoretical design of solder joints with barrier layers as well as the selection of Ni-W diffusion barrier layers for use in different soldering processes. This can, in turn, enhance the reliability of microelectronic devices, offering significant theoretical and practical value.

Stable SnAgCu solder joints reinforced by nickel-coated carbon fiber for electronic packaging

Stable SnAgCu solder joints reinforced by nickel-coated carbon fiber for electronic packaging