Ready Tasks Research Articles

A workflow task scheduling algorithm based on the resources' fuzzy clustering in cloud computing environment

SummaryCloud computing is the key and frontier field of the current domestic and international computer technology, workflow task scheduling plays an important part of cloud computing, which is a policy that maps tasks to appropriate resources to execute. Effective task scheduling is essential for obtaining high performance in cloud environment. In this paper, we present a workflow task scheduling algorithm based on the resources' fuzzy clustering named FCBWTS. The major objective of scheduling is to minimize makespan of the precedence constrained applications, which can be modeled as a directed acyclic graph. In FCBWTS, the resource characteristics of cloud computing are considered, a group of characteristics, which describe the synthetic performance of processing units in the resource system, are defined in this paper. With these characteristics and the execution time influence of the ready task in the critical path, processing unit network is pretreated by fuzzy clustering method in order to realize the reasonable partition of processor network. Therefore, it largely reduces the cost in deciding which processor to execute the current task. Comparison on performance evaluation using both the case data in the recent literature and randomly generated directed acyclic graphs shows that this algorithm has outperformed the HEFT, DLS algorithms both in makespan and scheduling time consumed. Copyright © 2014 John Wiley & Sons, Ltd.

DFTS: A dynamic fault-tolerant scheduling for real-time tasks in multicore processors

This paper presents a dynamic scheduling for real-time tasks in multicore processors to tolerate single and multiple transient faults. The scheduling is performed based on three important issues: (1) current released tasks, (2) current available processor cores, and (3) consideration of the number of faults and their occurrences. Using tasks utilization along with a defined criticality threshold in the proposed scheduling method, current ready tasks are divided into critical- and noncritical ones. Based on whether a task is critical or noncritical, an appropriate fault-tolerance policy is exploited. Moreover, scheduling decisions are made to fulfill two key goals: (1) increasing scheduling feasibility and (2) decreasing the total tasks execution time. Several simulation experiments are carried out to compare the proposed method with two well-known methods, called checkpointing with rollback recovery and hardware replication. Experimental results reveal that in the presence of multiple transient faults, the feasibility rate of the proposed method is considerably higher than the other well-known fault-tolerance methods. Moreover, the average timing overhead of this method is lower than the traditional methods.

Sticky-ERfair: a task-processor affinity aware proportional fair scheduler

A drawback of current proportional fair schedulers is that they ignore task-to-processor mutual affinities, thereby causing frequent inter-processor task migrations and cache misses. This paper presents the Sticky-ERfair Scheduler, an Early-Release Fair (ERfair) scheduler that attempts to minimize task migrations and preemptions. Given any processor V i , Sticky-ERfair allocates to it the most recently executed ready task that previously executed on V i (thus restricting migrations and preemptions) in such a way that this allocation does not cause any ERfairness violations in the system at any time during the schedule length. Experimental results reveal that Sticky-ERfair can achieve upto over 40 times reduction both in the number of migrations and preemptions suffered with respect to Basic-ERfair (for a set of 25 to 100 tasks running on 2 to 10 processors) while simultaneously guaranteeing ERfairness at each time slot.

Contention awareness and fault-tolerant scheduling for precedence constrained tasks in heterogeneous systems

Heterogeneous distributed systems are widely deployed for executing computationally intensive parallel applications with diverse computing needs. Such environments require effective scheduling strategies that take into account both algorithmic and architectural characteristics. Unfortunately, most of the scheduling algorithms developed for such systems rely on a simple platform model where communication contention is not taken into account. In addition, it is generally assumed that processors are completely safe. To schedule precedence graphs in a more realistic framework, we introduce first an efficient fault-tolerant scheduling algorithm that is both contention-aware and capable of supporting an arbitrary number of fail-silent (fail-stop) processor failures. Next, we derive a more complex heuristic that departs from the main principle of the first algorithm. Instead of considering a single task (one with highest priority) and assigning all its replicas to the currently best available resources, we consider a chunk of ready tasks, and assign all their replicas in the same decision making procedure. This leads to a better load balance of processors and communication links. We focus on a bi-criteria approach, where we aim at minimizing the total execution time, or latency, given a fixed number of failures supported in the system. Our algorithms have a low time complexity, and drastically reduce the number of additional communications induced by the replication mechanism. Experimental results fully demonstrate the usefulness of the proposed algorithms, which lead to efficient execution schemes while guaranteeing a prescribed level of fault-tolerance.

Exact Fault-Sensitive Feasibility Analysis of Real-Time Tasks

In this paper, we consider the problem of checking the feasibility of a set of n real-time tasks while provisioning for timely recovery from (at most) k transient faults. We extend the well-known processor demand approach to take into account the extra overhead that may be induced by potential recovery operations under earliest-deadline-first scheduling. We develop a necessary and sufficient test using a dynamic programming technique. An improvement upon the previous solutions is to address and efficiently solve the case where the recovery blocks associated with a given task do not necessarily have the same execution time. We also provide an online version of the algorithm that does not require a priori knowledge of release times. The online algorithm runs in O(m ldr k <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) time, where m is the number of ready tasks. We extend the framework to periodic execution settings: We derive a sufficient condition that can be checked efficiently for the feasibility of periodic tasks in the presence of faults. Finally, we analyze the case where the recovery blocks are to be executed nonpreemptively and we formally show that the problem becomes intractable under that assumption.

A Grid DAG Scheduling Algorithm Based on Fuzzy Clustering

Focusing on the problem of task scheduling under large-scale, heterogeneous and dynamic environments in grid computing, a heuristic algorithm based on fuzzy clustering is presented. Many previous scheduling algorithms need to search and compare every processing cell in the target system in order to choose a suitable one for a task. Though those methods can get an approving Make-span, undoubtedly, it would increase the entire runtime. A group of features, which describe the synthetic performance of processing cells in the target system, are defined in this paper. With these defined features, the target system, also called processing cell network, is pretreated by fuzzy clustering method in order to realize the reasonable clustering of processor network. In the scheduling stage, the cluster with better synthetic performance will be chosen first. There is no need to search every processing cell in the target system at every scheduling step. Therefore, it largely reduces the cost on choosing which processing cell to execute the current task. The design of the ready task's priority considers not only the influence that comes from the executing of nodes on critical path, but also the influence induced by heterogeneous resource, on which the task will be scheduled. In the last part, the algorithm's performance is analyzed and compared with other algorithms, and the test results show that the bigger the target system is, the better performance the algorithm shows.

A Feasibility Study of a Parent Care Planning Model with Two Faith-Based Communities

SUMMARY Parent care is a normative, mid-life responsibility for most American families, but religious communities need evidence-based models to help prepare congregational members for these religiously endorsed obligations. The purposes of this article are to discuss caregiving as a developmental task deserving attention by religious leaders; to briefly describe an efficacious parent care model for use by congregations; and to review the results from a feasibility study of the model with participants from two faith-based communities. Members of Protestant congregations in Alabama and Texas attended parent care readiness workshops, where they completed a structured Parent Care Readiness Assessment. Following completion, they were given evidence-based information on how to complete salient parent care tasks through lecture/discussions provided by workshop leaders and through a parent care CD-ROM with Internet links that they could use at home. At the Texas site, adult children and aging parent participants varied in how they rated the importance of care readiness tasks. The efficacy of interventions for participants at both sites is discussed. Implications for improving the model and developing proactive, congregation-based parent care ministries that strengthen generational relations in faith-based settings are discussed.

Low-cost task scheduling for distributed-memory machines

In compile-time task scheduling for distributed-memory systems, list scheduling is generally accepted as an attractive approach, since it pairs low cost with good results. List-scheduling algorithms schedule tasks in order of their priority. This priority can be computed either (1) statically, before the scheduling, or (2) dynamically, during the scheduling. In this paper, we show that list scheduling with statically-computed priorities (LSSP) can be performed at a significantly lower cost than existing approaches, without sacrificing performance. Our approach is general, i.e. it can be applied to any LSSP algorithm. The low complexity is achieved by using low-complexity methods for the most time-consuming parts in list-scheduling algorithms, i.e. processor selection and task selection, preserving the criteria used in the original algorithms. We exemplify our method by applying it to the MCP (Modified Critical Path) algorithm. Using an extension of this method, we can also reduce the time complexity of a particular class of list scheduling with dynamic priorities (LSDP) [including algorithms such as DLS (Dynamic Level Scheduling), ETF (Earliest Task First) and ERT (Earliest Ready Task)]. Our results confirm that the modified versions of the list-scheduling algorithms obtain a performance comparable to their original versions, yet at a significantly lower cost. We also show that the modified versions of the list-scheduling algorithms consistently outperform multi-step algorithms, such as DSC-LLB (Dynamic Sequence Clustering with List Load Balancing), which also have higher complexity and clearly outperform algorithms in the same class of complexity, such as CPM (Critical Path Method).

Executive Functioning and Memory Strategy Use in Children with Autism

An executive functioning deficit in autism should be reflected in a low level of active strategy use on memory tasks. This study was a direct examination of memory strategy use in two problem-solving situations by children with autism. Two groups with autism were tested, one high-functioning group and one with moderate cognitive impairments. All participants took part in two memory experiments to examine the effect of changing the nature of the learning situation on strategy use: one experiment used a serial recall task, and the other a recall readiness task. In contrast to previous studies, significant spontaneous strategy use was found on both memory tasks, particularly among the high-functioning group. Similarly, changing task structure was found to have an important impact on increasing strategy use, particularly for the moderate-functioning group. However, the overall rate of strategy use for the children with autism was still lower than would be expected for non-handicapped groups. The results support an executive functioning deficit interpretation, but a deficit that is less extensive among high-functioning individuals. Practical implications of the study in terms of cognitive training are also discussed.

Conditions for On-line Scheduling of Hard Real-Time Tasks on Multiprocessors

In this paper we consider the problem ofon-linescheduling ofhard real-timetasks onmultipleprocessors. For a given set of ready tasks, one can propose many schedules. These schedules, however, may not necessarily be suitable for on-line scheduling. A suitable on-line schedule is one which can accommodate any future task set when it arrives. The traditional approach to solve the on-line scheduling problem is to propose a heuristic, and then to prove its effectiveness by comparing it with existing heuristics using simulation. No attempt has, however, been made to obtain a condition on the current schedule which when satisfied will permit one to schedule an arbitrary future task. In this paper, we aim at developing such a condition on the current schedule for the set of ready tasks which when satisfied can guarantee an on-line schedule for any futurefeasibletask set.

Formal Development of a Task-Oriented Look-Ahead Storage Management Scheme

The use of earliest-deadline-first task scheduling in hard real-time environments suggests as a by-product a method for hierarchical storage management, representing an application-specific implementation of the working set model. The algorithm presented essentially assigns storage to the ordered list of ready tasks provided by the scheduler. The scheme pages storage on the basis of entire tasks' code and data. Employing the knowledge available in real-time systems on future events leading to task (re-) activations, the look-ahead algorithm always replaces the page with the longest forward access distance. Hence, they are optimal as far as paging demands depend upon internally foreseeable events. In this paper a formal correctness proof using Hoare-style logic is worked out for this algorithm, HSA dmin . The task-oriented, look-ahead hierarchical storage administration scheme is part of an effort to develop a novel dependable and predictably behaving computer architecture for hard real-time environments featuring a fonnally specified and verified operating system kernel supporting an extended version of the high-level real-time programming language PEARL

Computer technology futures for the improvement of assessment

With a focus on the interaction between computer technology and assessment, we first review the typical functions served by technology in the support of various assessment purposes. These include efficiencies in person and item sampling and in administration, analysis, and reporting. Our major interest is the extent to which technology can provide unique opportunities to understand performance. Two examples are described: a tool-based knowledge representation approach to assess content understanding and a team problem-solving task involving negotiation. The first example, using HyperCard as well as paper-and-pencil variations, has been tested in science and history fields. Its continuing challenge is to determine a strategy for creating and validating scoring criteria. The second example, involving a workforce readiness task for secondary school, has used expert-novice comparisons to infer performance standards. These examples serve as the context for the exploration of validity, equity, and utility.

A hierarchical task queue organization for shared-memory multiprocessor systems

There are two basic ways in which waiting ready tasks can be organized: centralized organization or distributed organization. In the centralized organization, a single central task queue is maintained. In the latter case, private ready queue of tasks. Ideally, a central ready queue global to all processors is desired over the distributed organization because the centralized organization provides perfect load sharing. However, the centralized organization is not suitable for large parallel systems because the central task queue could become a system bottleneck. The distributed organization, on the other hand, creates the load imbalance problem, which results in performance deterioration, while techniques have been proposed to reduce the ill-effects of task queue contention in the centralized organization and load imbalance in the distributed organization these techniques introduce problems of their own. We propose the use of a hierarchical task queue organization to incorporate the best features of these two organizations. Our study into the performance of this hierarchical organization shows that a properly designed hierarchical organization provides performance very close to that of the centralized organization while eliminating the ready queue contention problem, we also provide an analysis that identifies and provides guidance for designing the hierarchical task queue organization that avoids ready queue access contention. A brief discussion of task scheduling policies is also included. >

The Utility of Self-Monitoring for Preschool On-Task Behavior

The purpose of this study was to determine if four preschoolers might be taught to use self-monitoring to increase on-task behavior during independent readiness tasks and to maintain that behavior when external controls were faded. Results of this multiple baseline across subjects study yielded two major conclusions. Preschoolers can be taught to use self-monitoring as a strategy to increase on-task behavior during readiness tasks and are able to maintain the targeted behavior upon removal of the prompts. It is proposed that self-monitoring be used with preschool-age children who display undeveloped on-task behavior and who are preparing to enter kindergarten.

Generalization of learning: an essential consideration in early childhood education

Substantial research indicates that generalization of learning does not occur automatically and that special techniques are frequently required to promote skill generalization. Particular problems with generalization have been observed among readiness, preacademic, prerequisite, and generic skill training tasks that are common to early childhood curricula. The paper describes the nature of stimulus and response generalization, and identifies a number of related tasks that are commonly taught in early childhood programs. Related research evidence concerning generalization is reported. Recommendations for enhancing generalization are made.

On means to provide flexibility in scheduling

On means to provide flexibility in scheduling

Multiprocessor scheduling with interprocessor communication delays

We consider the problem of scheduling a set of n partially ordered tasks on m identical processors in order to minimize the makespan, where there is a communication delay between any pair of distinct processors. This problem is NP-hard. We provide a heuristic algorithm, call it Earliest Ready Task (ERT) algorithm, to solve the problem. Among all tasks whose parent tasks have been assigned, an ERT algorithm is one that always chooses one task that can be processed earliest. We show that the makespan M generated by ERT algorithm always satisfies M ⪕ (2−1/m)M′ + C comm , where M′ is the optimal makespan without considering communication delay and C comm is the maximum communication delay in one chain. We will also provide an algorithm to find this chain. The time complexity of implementing the ERT algorithm is O( mn 2).

Testing and teaching functional versus generic skills in early childhood education in developing countries

This paper critiques a number of pre-academic and readiness tasks commonly found in tests and curricula used in early childhood education in North America and Europe and frequently adopted in developing countries. Some of the tasks discussed are: putting pegs in a pegboard, reproducing bead patterns, and completing picture puzzles. Evidence is presented to challenge a number of commonly held assumptions associated with these tasks: a) that the ‘generic skills’ acquired when children learn these tasks are prerequisite to learning higher level skills, b) that the skills acquired will generalize to the performance of more functional activities, c) that handicapped children should be taught skills corresponding to their mental age level, and d) that handicapped children in developing countries should be tested and taught skills that are frequently found in the tests and curricula of normal functioning children in North America and Europe. Although much of the evidence cited has been available for some time, it has not generally influenced testing and teaching practices in developing countries. The tragic result is that very limited economic and manpower resources are often wasted on the use of ineffective methods. The final section of the paper describes recently developed methods of conducting ecological inventories for designing ecologically valid tests and curricula of functional skills in developing countries.

幼児における自己教示訓練と方略転移

The effectiveness of self-instruction training in promoting the acquisition and transfer of self-checking strategy was evaluated for children under six. A significant difference wasfound in the training task between self-instruction training and control conditions. On the transfer task (recall readiness task), there was no significant difference between the two groups. It was suggested that even children aged below six could effectively take advantage of a self-checking strategy through self-instruction training.

Multiprocessing implementation on the FASTBUS

In this paper a rather general way of implementing same time, each one being processed on a different a multiprocessor system on the FASTBUS standard is processor. Whenever a processor has completed the presented. Taking advantage of the experience gained processingof a task, it will execute the supervisor in the development of a multiminicomputer protopart of the operating system, which updates the systype [1], the authors show how an efficient parallel tem control tables and then it will start the processing processing supervisor can be designed, which enables of a new task ready for execution. the user to avoid having to worry about the logical The logical and chronological constraints for the and chronological coordination of the different simulparallel execution of the different tasks are defined taneous processings taking place on the different proby means of a control table and represented as a cessors of each FASTBUS segment. The result is a graph, in which the nodes represent the tasks and the parallel processing management system, transparent paths between nodes represent the precedence relato users, and whose kernel can operate at the FASTtions between tasks (fig. 1). BUS segment level, thus being applicable to any topoSupervision of the multiprocessing (parallel execulogical intersegment connection. The user programs tion of tasks) proceeds as follows: are organized as a series of subprograms, corresponda) all the successors of the completed task are ing to the different tasks, which can be executed in found in the control table; parallel under the operating system control. b) this table is then updated, decrementing by one To achieve this general purpose solution to the the number indicating the “number of predecessors” multiprocessing implementation on the FASTBUS (second column in fig. 1),which is found in the row the proposal is made to use each FASTBUS segment corresponding to each successor; as a true multiprocessor system, in which the data c) if this number vanishes this means that all the processing possibilities are fully exploited (e.g. for predecessors of that task (the successor) have been event acquisition, data reduction, event analysis, etc.) processed and it can be activated, i.e. put in RTQ by means of a general purpose operating system. (Ready Task Queue). The parallel processingmanagement is performed Once this updating is completed the processor by the supervisor part of the operating system as takes the first task in RTQ awaiting execution and follows. First, the user programme must be organized completes all the starting procedures necessary to as a series of subprogrammes, called “tasks”, like subprocess it. In the last two columns of the control table routines in a minicomputer programme. The logical the processor fmds the address of the entry point of constraints between tasks must be represented by one the task and the names of the logical pages of memory or more graphs of parallel tasks (e.g. in fig. 1). All the used by that task. The addresses of the physical pages processors on the FASTBUS segment (fig. 2) can be are found in the memory map of the graph (fig. 1). considered as a pooi of homogeneous resources availIf the RTQ is empty the processor enters in a new able for processing the tasks, which can be resident queue, the “Ready Graph Queue” (RGQ), where the either on the common memory or on each private initial tasks of the new graphs awaiting for execution memory. are stored. If RGQ is also empty, the processor enters Normally more than one task is in execution at the into a loop, waiting until another processor puts a new