MMIC Power Amplifier Research Articles

A Low Noise Power Amplifier MMIC to Mitigate Co-Site Interference in 5G Front End Modules

This paper presents a comparative performance analysis of a single-stage GaAs Low-Noise Power Amplifier (LNPA) fabricated in a $0.25~\mu $ m pHEMT process to mitigate co-site interference across multiple frequencies in the L- and S-bands. We compare five different designs from 1.2 to 3.8 GHz, each offering a minimum bandwidth of 300 MHz. Designed bandwidth is sufficient to cover several popular 5G NR FR1 channels as well as suitable for carrier aggregation in the LTE bands. An Output 1-dB compression point (OP1dB) of 27.5 dBm, noise figure (NF) below 1 dB and an Output 3rd-order Intercept Point (OIP3) up to 40 dBm is achieved. Adjacent Channel Leakage Ratio (ACLR) measurements are performed at 2.5 GHz with a Peak to Average Power Ratio (PAPR) of 11.8 dB. We achieve an ACLR of −25 dBc at 25 dBm of output power for a 20 MHz, 16-QAM modulation signal, while the corresponding power added efficiency & Drain-efficiency (DE) are, on average, more than 47% & 50% respectively. An integrated Electro-Static-Discharge (ESD) limiter is also incorporated, which can tolerate up to 350 V Human Body Model (HBM) and 125 V Charged Device Model (CDM) without failure. The design occupies a footprint of only 0.325 mm2.

An 18–38-GHz K-/Ka-Band Reconfigurable Chireix Outphasing GaAs MMIC Power Amplifier

This article presents a frequency-reconfigurable outphasing GaAs power amplifier MMIC operating over an 18–38-GHz range with 2–6-GHz RF bandwidth per frequency setting. The architecture is based on a broadband power combining structure providing nonisolating power combining. Reconfigurable shunt elements based on p-i-n diode switches control the Chireix reactance compensation to enable frequency-reconfigurable efficiency enhancement at output power back-off (OBO). The prototype two-stage MMIC is characterized under CW and modulated measurements demonstrating 20–24-dBm saturated output power over the band 18–38 GHz, with measured PAE of 23%–31% at peak and 17%–23% at 6-dB OBO. When measured with a 200-MHz LTE signal with 9-dB PAPR centered at 19.5 GHz, the PA performs with 15.3% average efficiency at a 14.3-dBm average output power with 24.18-dBc ACLR.

A broadband RLC matched GaN power amplifier using interposer‐MMIC technology

AbstractIn this article, we report a compact and low‐profile GaN‐based broadband power amplifier using silicon interposer‐MMIC (iMMIC) technology. The iMMIC technology enables a GaN HEMT to be embedded in the silicon substrate, and passive circuit elements such as metal‐insulator‐metal (MIM) capacitors, spiral inductors, and thin film resistors to be implemented on the high‐resistivity silicon (HRS) substrate using standard integrated passive device (IPD) process, so that the final power amplifier is almost indistinguishable from a single GaN MMIC power amplifier. The RLC matched all‐pass network and LC ladder type low‐pass network are employed as the input matching network and output matching network, respectively. The proposed power amplifier has a Psat of 39.1 to 39.2 dBm with a power‐added efficiency (PAE) of 40% to 50.5% in the frequency range of 2.1 to 3.5 GHz under continuous wave (CW) input signal. The proposed iMMIC power amplifier occupies only 9.9 mm2.

Design and Development of InP DHBTs With High Breakdown Voltage for Ka-Band PA Applications

Type-I (straddled) InP DHBT devices have been fabricated to study the impact of different base-collector junction transition layer designs on the collector to emitter breakdown behavior, breakdown voltage, BVceo and the device output performance such as knee voltage, Vknee at high collector current densities, Jc. An abrupt breakdown behavior with BVceo of 11V and Vknee less than 1V at Jc>100kA/cm2 are achieved using an optimized base collector junction transition layer design. Using 2D numerical simulations, components of leakages dominating Iceo at low and high collector to emitter bias voltages are explained. It is further shown that the optimized device exhibits good RF and power performance achieving f $_{T}$ of 115GHz and f $_{max}$ of 150GHz at emitter width >1um. An MMIC power amplifier (PA) is also designed and fabricated using the optimized Type-I InP DHBT device. At 28GHz, good power performance is achieved with PAE of 54% and Psat of 26dBm. Thus, it is shown that InP DHBTs developed in this work are a good candidate for the next phase of 5G millimeter wave Ka-band power amplifier applications.

Automatic large-signal GaAs HEMT modeling for power amplifier design

In this paper, a new nonlinear transistor modeling technique for gallium arsenide high-electron mobility transistor (GaAs HEMT) is proposed. The technique includes an analytical extraction, enhanced by applying nonlinear least squares regression and modified-median method, and a multistage optimization, allowing completely automatic large-signal modeling. Convergence of the technique is proved by a threefold model building procedure followed by the comparison of simulated data like IV-curve and load-pull contours. A 0.15 μm GaAs pHEMT nonlinear model was built and verified with measured IV-curve, multiple bias S-parameters and power characteristics. A good agreement with the measured data proves that the proposed technique enables automatic nonlinear transistor modeling for power MMIC amplifier design.

A 20 W GaN-based Power Amplifier MMIC for X-band Radar Applications

A 20 W GaN-based Power Amplifier MMIC for X-band Radar Applications

Concept for Continuously Tunable Output Filters for Digital Transmitter Architectures

This paper presents a novel output filter approach for continuously frequency-tunable digital power amplifiers, suitable for future seamless and band-less applications in 5G, e.g. for cognitive radios (CR). The presented tunable output filter is based on a multi-bandstop lowpass response to regenerate the original microwave signal at the output of the digital amplifier stage by suppressing unwanted frequency components. Compared to conventional tunable bandpass solutions, it offers higher tunability, higher linearity, good power handling capability and moderate losses especially around the carrier frequency. A tunable power amplifier (PA) demonstrator consisting of a 4-stage digital GaN PA MMIC and the novel tunable filter, is designed and fabricated for a carrier frequency range from 1 GHz to 3 GHz. Tunability is achieved by using commercial barium strontium titanate (BST) varactors. Small signal measurements were performed to evaluate tunability and suppression capabilities of the novel filter structure, which reveal a frequency tunability of 67% with a suppression level of at least 13 dB for the undesired frequency components. The proposed filter structure exhibits a linearity over the tuning range with an OIP3 between 66 dBm to 70 dBm and high power handling capability. Finally, the performance analysis of the tunable PA demonstrator shows an peak efficiency of 70%. Due to frequency limitations of the used PA stage, the efficiency slowly degrades to 20% at the upper frequency band edge. Simultaneously, the output power varies between 27 dBm to 31 dBm.

X‐band 12 W power amplifier MMIC designed with second harmonic suppression

AbstractTwo X‐band (8‐12GHz) GaAs high‐power amplifier MMICs with and without compact second harmonic suppression cells are presented in this letter. The compact second harmonic suppression cell consists of an inductor and a capacitor in series, which is equivalent to a capacitance in the fundamental frequency range while resonates at the second harmonic frequency. The power amplifier MMIC with compact second harmonic suppression cells delivers more than 12 W output power with over 33% power added efficiency and with more than 52dBc second harmonic suppression over the band of 8‐12GHz. The two chips have the same size as 3.2 × 4 mm.2

Small Cell Solutions

As small cells are introduced to 4G networks so building efficient MMIC power amplifiers becomes more important

An $E$ -Band Analog Predistorter and Power Amplifier MMIC Chipset

An analog predistorter and power amplifier (PA) MMIC chipset has been designed to improve the overall linearity for applications in wireless communication at the $E$ -band. The circuits have been implemented in a commercial 0.1 $\mu \text{m}$ InGaAs pHEMT process. The PA delivers an output referred 1-dB gain compression (OP1 dB) of 24 dBm, saturated output power of 27 dBm, and OIP3 of 32 dBm between 71 and 76 GHz. In combination with the analog predistortion circuit, the combined chipset improves carrier to third-order intermodulation ratio by 20 dB at an average output power of 21 dBm and at the same time increasing the OP1 dB by 2 dB to 26 dBm.

Design and Measurements of Two-Gain-Mode GaAs-BiFET MMIC Power Amplifier Modules with Small Phase Discontinuity for WCDMA Data Communications

Design and Measurements of Two-Gain-Mode GaAs-BiFET MMIC Power Amplifier Modules with Small Phase Discontinuity for WCDMA Data Communications

Multilevel Supply-Modulated Chireix Outphasing With Continuous Input Modulation

This paper presents a dynamic characterization of a multilevel (ML) Chireix outphasing (ML-CO) power amplifier (PA) with modulated signals. The ML-CO technique combines the advantages of envelope tracking and outphasing architectures by limiting the supply modulation to discrete levels with an efficient power-DAC modulator and using outphasing for fine amplitude control. We describe an experimental test bench that supplies the required phase- and time-aligned modulated signals for outphasing and supply modulation simultaneously. Pulsed characterization is used to design an ML memoryless polynomial DPD. The linearized ML-CO GaN X-band MMIC PA is demonstrated with fixed input drive levels for 9.3-dB peak-to-average power ratio (PAPR), 1.4-MHz and 11.3-dB PAPR, 10-MHz LTE signals with a 9.7-GHz carrier. For both signals, the average total power consumption is reduced by a factor of two when supply modulation is used. An investigation of control signal generation strategies is presented, including combinations of discrete supply and continuous input modulation. A simple exponential function tracks the optimal efficiency trajectory of the ML-CO PA, enabling overall efficiency improvements within 9 and 27 percentage points. This control strategy is applied to radar pulses with amplitude shaping and frequency chirp, with the efficiency improvement of up to 11.8 percentage points compared with constant-supply operation, with 29-dB improvement in spectral confinement.

6-GHz-to-18-GHz AlGaN/GaN Cascaded Nonuniform Distributed Power Amplifier MMIC Using Load Modulation of Increased Series Gate Capacitance

6-GHz-to-18-GHz AlGaN/GaN Cascaded Nonuniform Distributed Power Amplifier MMIC Using Load Modulation of Increased Series Gate Capacitance

A 77–100 GHz power amplifier using 0.1-μm GaAs PHEMT technology

A wideband MMIC power amplifier at W-band is reported in this letter. The four-stage MMIC, developed using 0.1 μm GaAs pseudomorphic HEMT (PHEMT) technology, demonstrated a flat small signal gain of 12.4 ± 2 dB with a minimum saturated output power (Psat) of 14.2 dBm from 77 to 100 GHz. The typical Psat is better by 16.3 dBm with a flatness of 0.4 dB and the maximum power added efficiency is 6% between 77 and 92 GHz. This result shows that the amplifier delivers output power density of about 470 mW/mm with a total gate output periphery of 100 μm. As far as we know, it is nearly the best power density performance ever published from a single ended GaAs-based PHEMT MMIC at this frequency band.

A Compact 60W X-Band GaN HEMT Power Amplifier MMIC

The design and performance of a compact X-band power amplifier MMIC utilizing Nanjing Electronic Devices Institute’s (NEDI’s) $0.25~\mu \text {m}$ gallium nitride (GaN) high electron mobility transistor (HEMT) technology is presented. The MMIC operates in pulse conditions with typical pulse width of $100~\mu $ sec and 10% duty cycle. An output power of 47.5 dBm to 48.7 dBm with over 20 dB power gain and a power added efficiency (PAE) of 40% to 45% over the band of 8-12 GHz under a drain voltage of 28 V have been achieved. The chip size is $3.5\times 3.8$ mm2 and the amplifier delivers an output power density up to 5.57 W/mm2 over the chip area and up to 6.43 W/mm over the active periphery of the power stage. The thermal resistance is 1.7 °C/W measured in CW mode.

2~16 GHz GaN 비균일 분산 전력증폭기 MMIC

본 논문에서는 드레인 분기 커패시터를 사용하여 입 출력 간 동위상을 제공함과 동시에 각 트랜지스터에 최적 부하 임피던스를 제공하는 비균일 분산 전력증폭기 설계 기법을 2~16 GHz GaN 광대역 전력증폭기 MMIC 설계에 적용하고, 칩을 제작하여 결과를 평가하였다. Win Semiconductors사의 <TEX>$0.25{\mu}m$</TEX> GaN HEMT 공정으로 제작된 MMIC 칩은 크기가 <TEX>$3.9mm{\times}3.1mm$</TEX>이며, 주파수 대역 내에서 12 dB 이상의 선형 이득 및 10 dB 이상의 입력 반사 손실을 보였다. 연속파모드 포화출력 조건에서 측정된 출력 전력은 36.2~38.5 dBm의 값을 보였고, 전력부가효율은 약 8~16 %를 나타내었다. In this paper, a 2~16 GHz GaN wideband power amplifier MMIC s designed and fabricated using the nonuniform power amplifier design technique that utilizes drain shunt capacitors to simultaneously provide each transistor with the optimum load impedance and phase balance between input and output transmission lines. The power amplifier MMIC chip that is fabricated using the <TEX>$0.25{\mu}m$</TEX> GaN HEMT foundry process of Win Semiconductors occupies an area of <TEX>$3.9mm{\times}3.1mm$</TEX> and shows a linear gain of larger than 12 dB and an input return loss of greater than 10 dB. Under a continuous-wave mode, it has a saturated output power of 36.2~38.5 dBm and a power-added efficiency of about 8~16 % in 2 to 16 GHz.

A Receive-Band-Noise Estimation Method and Its Application to a WCDMA Band 11/21 GaAs-BiFET MMIC Power Amplifier Module

This paper proposes a simple but relatively accurate, receive (Rx)-band-noise estimation method for wideband code division multiple access (WCDMA) handset heterojunction bipolar transistor MMIC power amplifier module (PAM) design. The method is based on small-signal and two-tone large-signal simulations, calculating Rx-band noise and helping circuit designers comprehend noise contributions under a large output power operation. Its effectiveness is verified through the simulations and measurements of a WCDMA band 11/21 MMIC PAM featuring an LC trap circuit placed at the base terminal of the first stage. This trap is designed to resonate at the difference frequency between the transmit- and Rx-bands. The PAM accommodating switchable-amplifier chains for triple-power modes—high power mode (HPM), mid-power mode (MPM), and low-power mode (LPM)—is fabricated using our in-house GaAs BiFET process. Measurements conducted under 3.4 V and 1450-MHz-band WCDMA (Third Generation Partnership Project Release 99, 3GPP R99) modulated signals show an Rx-band noise level of less than −136 dBm/Hz and power gain as high as 30 dB at a high output power ( $P_{\mathrm {{out}}}$ ) of 29 dBm. The measured noise level is in good agreement with that of the proposed estimation. The measurements also show that the PAM achieves power-added efficiency (PAE) as high as 41% at the $P_{\mathrm {{out}}}$ of 29 dBm while maintaining the ±5-MHz-offset adjacent channel power ratio (ACLR1) below −40 dBc in the HPM. The PAE values of 22% at $P_{\mathrm {{out}}}$ of 18 dBm and 17% at 7 dBm are obtained in the MPM and LPM, respectively, with the same ACLR1 levels.

2.6 GHz GaN-HEMT Power Amplifier MMIC for LTE Small-Cell Applications

This paper presents a two-stage power amplifier MMIC using a 0.4 μm GaN-HEMT process. The two-stage structure provides high gain and compact circuit size using an integrated inter-stage matching network. The size and loss of the inter-stage matching network can be reduced by including bond wires as part of the matching network. The two-stage power amplifier MMIC was fabricated with a chip size of 2.0×1.9 mm² and was mounted on a 4×4 QFN carrier for evaluation. Using a downlink LTE signal with a PAPR of 6.5 dB and a channel bandwidth of 10 MHz for the 2.6 GHz band, the power amplifier MMIC exhibited a gain of 30 dB, a drain efficiency of 32%, and an ACLR of -31.4 dBc at an average output power of 36 dBm. Using two power amplifier MMICs for the carrier and peaking amplifiers, a Doherty power amplifier was designed and implemented. At a 6 dB back-off output power level of 39 dBm, a gain of 24.7 dB and a drain efficiency of 43.5% were achieved.

2-6 GHz GaN distributed power amplifier MMIC with tapered gate-series/drain-shunt capacitors

In this article, using a 0.25 μm GaN HEMT process, we present a 2–6 GHz GaN two-stage distributed power amplifier MMIC that utilizes tapered gate series capacitors and nonuniform drain transmission lines with tapered shunt capacitors to simultaneously obtain a linear gain enhancement and optimum load line for each transistor. By using well-derived equations to provide each transistor with the optimum load impedance and to tune the phase delay between the input and output transmission lines, the nonuniform distributed power amplifier is designed for second-stage amplification, and satisfactory performance is demonstrated. The phase balance and tapering of the gate series capacitors have a role in improving the linear gain of the two-stage amplifier. The measured data show a linear gain of 22 ± 1 dB, an input/output return loss of more than 15 dB, saturated output power of 41.2–43.1 dBm under a continuous-wave mode, and a power-added efficiency of 18–22% from 2 to 6 GHz which are very competitive values compared with previous works. © 2016 Wiley Periodicals, Inc. Int J RF and Microwave CAE 26:456–465, 2016.

A High-Efficiency GaAs MMIC Power Amplifier for Multi-Standard System

This letter presents a high-performance fully integrated GaAs MMIC power amplifier (PA) fabricated in 0.15 $\mu$ m pHEMT process. The MMIC PA is operating from 2–6.5 GHz, covering the band of the LTE, wifi and WiMAX. A flat small-signal gain of 25.5 dB is achieved by utilizing novel input matching networks. The large-signal measurement shows that the peak output power is above 31 dBm for the whole bandwidth with a power gain of 21 dB, while the corresponding power-added efficiency (PAE) is between 31.4%–51.5%. An adjacent channel leakage radio (ACLR) obtains ${-}30$ dBc at 25 dBm output power, tested with WCDMA and LTE signals, and reaches ${-}45$ dBc after digital pre-distortion (DPD). The circuit structure and design method are also suitable for GaN process to achieve higher power.