Verification Platform Research Articles

Design and Implementation of a Dynamic Task Mapping Algorithm Based on Hotspot Statistics

In a coarse-grained heterogeneous multi-core system, the task map is responsible for allocating the cores for task execution. The existing user static mapping method has low programming friendliness. As the scale and density of system tasks increase, so does the complexity of manual programming by users, resulting in programming inefficiencies. Aiming at this problem, based on the existing heterogeneous multi-core platform, this paper studies a dynamic task mapping method with hotspot statistics, and uses the preprocessing of the mapping to reduce the time spent on the actual mapping. The hardware mapper is designed and implemented in Verilog, and the verification platform is built in the HDL environment. The experimental results show that the new mapping algorithm significantly improves the performance of the system, with an average of 32.50% and a maximum of 47.16%.

Design of Aeronautical Digital Video and Communication Bus Processing System

Abstract With the development of avionics systems, Avionics Digital Video Bus (ARINC 818) and Digital Information Transmission System (Arinc429) have become a new generation of aviation video transmission and communication bus standard respectively. Aiming at the characteristics of ARINC 818 and Arinc429, an aeronautical digital video and communication bus processing system is designed. First, the ARINC 818 aviation video transmission bus and the Arinc429 communication bus standard are introduced. Then, the design principles of the aeronautical digital video and communication bus processing system are described according to this standard, and the design scheme of each system component is introduced in detail. Finally, build a hardware test platform for testing and verification. The system development follows an integrated and modular design, with the Application Processing Unit (APU) main processor and Field Programmable Gate Array (FPGA) as the core, which realizes the superposition of 1-channel input ARINC 818 video with internally generated characters, and then outputs 1-channel ARINC 818 to the function displayed on the display. At the same time, it supports 7-channel Electronic Industries Association-422 (EIA-422) and 4-channel Arinc429 bus communication. In addition, the system supports the processing of 22 input discrete quantities and 7 input analog quantities. The design has been successfully used in a certain type of aircraft display control management system.

Improved high order differential feedback control of quadrotor UAV based on improved extended state observer

Quadrotor unmanned aerial vehicle (QUAV) system is nonlinear, strongly coupled, and sensitive to unknown disturbances and uncertainties. The uncertainty, disturbance, and even unknown model function are the undesired force acting on the QUAV, so they must be totally estimated online. The ideal control scheme is that the total estimation is feedback in the opposite direction to the controller to compensate the model error or counteract the force caused by the unknown model and disturbance. An improved extended state observer (IESO), also called an improved high-order differentiator (IHOD), is designed to estimate the unknown model and disturbance of the QUAV. It is proved that the IESO is one type higher than the traditional ESO. Consequently, the estimation accuracy of IESO is higher than that of the ESO at the same bandwidth, and is verified through some typical functions. The IESO estimations for 2nd-order derivative of reference input and the total unknown model function are fed back to compensate the undesired force in opposite direction, and then an improved high-order differential feedback controller (IHODFC) is designed with the assigned closed-loop poles. The proof of the stability of the closed-loop system controlled by the IHODFC is given. The performance is verified by the tests using the Pixhawk-based DJI F450 frame experimental verification platform. The IHODFC superiority is demonstrated by comparing the classic model-free controller PID and active disturbance rejection control (ADRC).

Design of CCD test platform of scientific imaging for wide field survey telescope

The wide field survey telescope (WFST) is a new generation survey telescope that is being built in China. Its optical design is a primary-focus system, and its camera is a mosaic charge-coupled device (CCD) camera composed of nine 9 K × 9 K CCD290-99 chips for scientific imaging. A verification platform to test the CCD290-99 chips is designed. The test platform includes a light source system, CCD controller, vacuum Dewar, and refrigerator for cooling the CCD. The CCD controller is a prototype design of the WFST camera that has a high performance, including low readout noise, flexible readout rate configuration, low power dissipation, etc. The digital double correlated sample method is used for video sampling of the CCD’s 16 channels. The specifications of the CCD detector system using a CCD290, such as gain, noise linearity, and crosstalk, are tested using this platform. The test results show that the CCD test platform meets the requirement of the CCD test and the design of CCD controller meets the scientific imaging requirements for the WFST camera.

Design and Implementation of Shared Memory for Turbo and LDPC Code Interleaver

In 4G turbo and 5G LDPC, in order to realize a flexible, low-power, low-cost shared general-purpose block interleaving hardware module, it faces the challenges of interleaving structure integration, fewer gate circuits, parallel multistream operation, and switching between standards. Facing these challenges, after studying 3GPP TS 36.212 V15.4.0 and 3GPP TS 38.212 V15.4.0 protocols, common part of two major interleaving module standards is found. For the block interleave module in the rate matching of the 4G downlink turbo code and the bit interleave module after the rate matching of the 5G NR downlink LDPC code, this paper first designs a memory and implements the two codes interleaving on it. Then, based on the Altera Quartus prime platform and ModelSim for functional verification. Experimental results show that under SMIC 28 nm, operating frequency 50MHz, after synopsys synthesis, the memory module area is 0.17 μ m 2 , and the power consumption is 6.45 mW. Through the shared design, 32 bits parallel access, and switching between standards, the proposed scheme reduces the hardware cost, power consumption, and clock overhead, and improves the flexibility of 4G LTE and 5G NR communication downlink hardware implementation.

Two-level optimal torque distribution for handling stability control of a four hub-motor independent-drive electric vehicle under various adhesion conditions

In order to increase the handling stability performance of the four hub-motor independent-drive electric vehicle (4MIDEV) under various road conditions such as joint and bisectional road, this paper present an effective two-level optimal torque distribution control method. This method can calculate torque command to each hub-motor according to the desired longitudinal force and desired extra yaw moment. The first level allocation control algorithm has small calculation cost and fast response, and can achieve the maximum stability margin of vehicle under good road adhesion condition. Because the adhesion coefficients of each wheel are different, the weight coefficient of objective function is adjusted in real time in the second level allocation control strategy, so as to ensure the vehicle’s handling stability under various adhesion conditions, especially when four wheels have different road adhesion coefficients. Finally, the actual torque of the hub-motor is adjusted according to the slip rate by the sliding mode controller. The proposed distribution strategy is verified in CarSim-Matlab/Simulink joint simulation platform and hardware in the loop verification platform. Through double lane shift simulation on joint and bisectional road conditions, compared to the “general control” strategy, it is verified that the proposed distribution strategy can reduce the error of yaw rate and sideslip angle up to 47.1% and 50.3% compare to the general controller, and the calculation cost is reduced so that effectively improve the handling stability and real-time performance when facing different roads.

Rate Control Optimization Algorithm of Ubiquitous Power Sensor Network Tester Based on Multimedia

With more and more video application scenarios and increasing complexity, the popularization of multimedia information and the urgent need to update wireless sensor networks have led to the emergence and development of wireless multimedia sensor networks. This paper focuses on the rate control optimization algorithm of multimedia-based ubiquitous power sensor network, which is mainly studied from three aspects: constructing algorithm verification platform based on multimedia technology, performance analysis, and optimization of rate control optimization algorithm based on multimedia technology. An algorithm verification platform is established based on multimedia technology. This article uses a scalable video coding method to design a client-driven scalable video transmission system. The simulation results show that the algorithm can effectively improve the video quality. The algorithm of rate control based on multimedia technology is proposed. A reliable multipath routing algorithm based on AODV is proposed. Based on the energy balance algorithm, the node-independent routing mechanism and link quality estimation model are introduced. An independent and reliable active/standby communication link to the node of the destination node is established. Linux, the full name of GNU/Linux, is a free-to-use and freely disseminated Unix-like operating system. It is a POSIX-based multiuser, multitasking, multithreaded, and multi-CPU operating system. With the development of the Internet, Linux has gained support from software enthusiasts, organizations, and companies all over the world. In addition to maintaining a strong momentum of development in servers, it has made considerable progress in personal computers and embedded systems. Under the Linux platform, a large number of tests are performed and the performance of the control code rate is analyzed. The so-called sensor network is a distributed intelligent network system that is composed of a large number of small sensor nodes with wireless communication and computing capabilities deployed in the active area through a self-organizing method that can autonomously complete designated tasks according to the environment. The distance between the nodes of the sensor network is very short, and the multihop wireless communication method is generally used for communication. The sensor network can run in an independent environment, or it can be connected to the Internet through a gateway so that users can access it remotely. It is concluded that ABR is the most suitable rate control algorithm for video transmission. According to the CQP experiment results, the QP value set in the improved ABR algorithm is at most 40; the security from the construction of the ubiquitous power sensor network to the final monitoring data collection and upload process is verified by simulating the hypothesis attacks and faults. It is proved that the construction of ubiquitous power sensor network can reduce the energy consumption and delay of monitoring data collection and verify the superiority of constructing ubiquitous power sensor network.

A New Space-to-Ground Microwave-Based Two-Way Time Synchronization Method for Next-Generation Space Atomic Clocks

The accuracy of time synchronization can be significantly increased by enhancing the performance of atomic clocks. Future-generation time-frequency loads will be equipped with the latest ultrahigh-precision atomic clocks (with a day stability better than 10−17) and will leverage advantages of the space environment such as microgravity and low interference to operate a new generation of high-performance time-frequency payloads on low-orbit spacecraft. Moreover, using the high-precision time-frequency system of ground stations, low-time-delay high-performance time-frequency transmission networks, which have the potential to achieve ultrahigh-precision time synchronization, will be constructed. By considering full link error terms above the picosecond level, this paper proposes a new space-to-ground microwave two-way time synchronization method for scenarios involving low-orbit spacecraft and ground stations. Using the theoretical principles and practical application scenarios related to this method, a theoretical and simulation verification platform was developed to research the impact of the attitude, phase center calibration, and orbit determination errors on the single-frequency two-way time synchronization method. The effectiveness of this new method was verified. The results showed that when the attitude error is less than 72 arc seconds (0.02°), the phase center calibration error is less than 1 mm, and the precision orbit determination (POD) error is less than 10 cm (three-axis). After disregarding nonlink error terms such as equipment noise, this method can attain a space-to-ground time synchronization accuracy of better than 1.5 ps, and the time deviation (TDEV) of the transfer link is better than 0.7 ps @ 100 s, which results in ultrahigh-precision space-to-ground time synchronization.

RISC-V Hardware Synthesizable Processor Design Test and Verification Using User-Friendly Desktop Application

Although the RISC-V ISA has not been around for long, it is a processor architecture that has been highlighted by many businesses and individuals for its low-cost and rapid pace of development. They are open-source-synthesizable hardware processors with minimal functionality that is ideal for current IoT applications involving simple sensors and actuator controls. Due to some qualities of hardware, they can operate in areas where software programs and applications cannot be used whereas, these software programs that run on such hardware equally help in understanding how hardware operates. This paper, therefore, proposes and discusses the design, implementation, and internal verification and test platform for a Reduced Instruction Set Code-V’s (RISC-V) Instruction Set Architecture (ISA), using an interactive desktop program for a 32-bit single-cycle processor. This paper developed a system that functions as interactive assistance to RISC-V's ISA design and debugger using a more user-friendly desktop UI application. The uniqueness of this design is the flexibility of testing and debugging that is possible through either the software interface or through hardware peripherals such as Universal Asynchronous Receiver/Transmitter (UART) protocols in FPGA or even both. These peripherals allow users to view the contents of the register files and RAM being utilized by the implemented processor on the FPGA. The proposed desktop User Interface program monitors and controls the sequential processing and states of a 32-bit single-cycle RISC-V processor’s operation on an FPGA. Contents of the proposed processor’s registers and memory are displayed alongside other temporal or internal data. Internal components such as Program Counters (PC), Random Access Memory (RAM), are displayed all through the proposed User Interface (UI) program and also through various peripherals on the FPGA board. The software program is implemented using C# programing language through Microsoft Visual Studio 2019 Integrated Development Environment (IDE). The proposed hardware synthesizable processor core is implemented using Verilog Hardware Description Language (HDL) and synthesized with Xilinx Integrated Synthesis Environment (ISE) version 14.7. The proposed processor and its corresponding hardware test modules occupy 6476 Look-Up-Tables (LUT) and operate at a maximum frequency of 49MHz and its operation is verified on a Field Programmable Gate Array (FPGA). The proposed processor and its test platform can serve as a good educational tool as well as a help for processor design engineers both experienced and beginners.

Short-distance equivalent test of acquisition, pointing, and tracking process for space laser communication.

The function and performance of acquisition, pointing, and tracking (APT) for the space laser communication terminals must be characterized on the ground before the launching. However, short working distance causes the terminals to not be viewed as a point, leading to the challenge for the whole-process equivalent test. A novel equivalent test method is proposed, to the best of our knowledge, by using a narrow laser beam and the imaging relationship between two terminals. The communication terminal is transformed to a virtual point by establishing an imaging relationship between the antenna of the transmitter and the tracking detector of the receiver. Thus, the deviation angle between the optical axis of the receiver and the centroid line of two terminals can be measured accurately. Furthermore, the acquisition process of searching the small-size antenna in the receiver with an extensive coverage beam in the transmitter is replaced by searching a large receiver surface with a narrow beam. This point-searching-surface method is equivalent to the surface-searching-point method in actual space communication. With this method, two terminals spaced 5 m apart were employed to construct the short-distance verification platform, and the APT function verification and performance test were completed.

A novel fuel-cell-driven system for rail transit vehicles based on dual-source motors

Currently, to alleviate environmental problems and energy crises, fuel cells are gradually being used in rail transit vehicle drive systems. In existing fuel-cell-driven systems, direct current (DC)/DC converters are widely used, but there are serious shortcomings in terms of cost, efficiency and market application. To solve these problems, a novel dual-source-driven system is innovatively presented in this study. In the dual-source-driven system, the multi-mode operating state of the dual-source motor was taken into consideration, and based on the independent vector control method, the dual-source-driven system was modelled and simulated to achieve the motor-independent control between power output and power generation as well as the energy exchange between fuel cell and secondary power battery under any working conditions. To verify the effectiveness of the proposed dual-source-driven system, the electric-driven performance test was carried out by the dual-source system experimental verification platform. The result for this drive system topology is further improved compared with the same level of DC/DC-driven system configuration used for this purpose.

Vital Sign Signal Extraction Based on mmWave Radar

This research develops an algorithm for health monitoring and uses the Infineon BGT60TR13C shield 60GHz radar to build a set of software and hardware demonstration platforms for algorithm verification. The algorithm can monitor the position, breathing, heartbeat and other information of the elderly in real time, which is used to judge the health status of the elderly and improve the convenience for early warning and rescue of abnormal situations in time. However, limited by the transmission power of this radar and the number of transmitting and receiving antennas, the current detection range of the algorithm is relatively small, and the ability to distinguish between multiple persons is limited. This problem can be optimized by replacing other types of radars in the future.

A Real-Time Hardware Experiment Platform for Closed-Loop Electrophysiology.

Targeted stimulation of nervous system has become an increasingly important research tool as well as therapeutic modality, and the stimulation signal acquisition based on the expected signal needs a closed-loop system. Due to the difficulty of biological experiments, the real-time simulation of neural activity is of great significance for the mechanism analysis and the performance improvement of neuromodulation techniques. This paper proposes a real-time hardware experimental platform for closed-loop electrophysiology. The platform integrates a neural computing module and a real-time control module on TMS320F28377D digital signal processors (DSP), and it reserves a programmable interface for users to call the required modules and set module parameters simultaneously. The platform has high compatibility and can be used for closed-loop electrophysiological experiments with different models, different control algorithms and different clamps. We implement the thalamocortical relay neural computing model and iteration improves proportional-integral algorithm on the platform for experimental verification in this paper. The neuron firing waveforms of the DSP platform and the MATLAB R2020b simulation waveforms are consistent. Under the same physiological time, the simulation speed of DSP platform is 3 times faster than that of the Intel Core i5-8400 CPU computer, and the neural firing rate of DSP platform is due to the real-time. This platform can be used as a tool to explore the working mechanism of the nervous system. It may promote the development of neuroscience, especially the field of closed-loop neuroscience.

Visual-Inertial Simultaneous Localization and Mapping: Dynamically Fused Point-Line Feature Extraction and Engineered Robotic Applications

For robots in unknown environments, the visual-inertial simultaneous localization and mapping (SLAM) incorporates the multisensor data and enables a globally consistent trajectory tracking and mapping. Given the scene structures in the SLAM problem, the high-quality lines can serve as primitives and provide additional constraints for camera pose estimation. This study is devoted to a pipeline design of dynamically fused point-line visual-inertial navigation system (VINS). The design builds on the heritage of VINS-Mono but employs an ensemble pose estimation strategy to integrate point and line features. As far as we know, it is the first optimization-based monocular VINS method that gives an insight into the quantitative relationship between point and line feature numbers. Additionally, the measured pixels for line feature-length determination and two hidden parameters in line segment detector (LSD) extractor are investigated, guaranteeing the line feature extraction optimization in both quality and efficiency. The benchmark dataset and real-world tests are conducted. In terms of challenging scene tests in the EuRoc dataset, results are compared against ROVIO, VINS-Mono, and PL-VINS frameworks, revealing our design is substantially more accurate and robust than others with both locally and globally consistent pose estimates. The engineered algorithm in the camera “Mynteye” further enables the Bulldog-CX Robot platform verification. The results concerning the drifts, time taken for line feature extraction, and real-world trajectory consistency show our design outperforms the point-based VINS. The strong adaptability of our dynamically fused point-line VINS to the broad range of indoor and outdoor scenes is simultaneously verified.

Reading the fake news produced on social media about the Covid-19 pandemic through verification platforms: An example from teyit.org

Yalan ve gerçek arasındaki çizginin giderek bulanıklaştığı günümüz dünyasında hem geleneksel medyada hem de sosyal medya platformlarında birçok haber paylaşılmaktadır. Bu haberler arasında doğruluğu teyit edilmiş bilgilerin yanı sıra yalan, yanlış ve uydurma bilgiler üzerine inşa edilmiş birçok haber de yer almaktadır. Doğruluğu kanıtlanmamış çeşitli bilgilerin ve haberlerin sosyal medya platformlarında paylaşılması ise beraberinde birçok sorun meydana getirmektedir. Bu bağlamda çalışmanın konusunu tüm dünyayı etkisi altına alan Covid-19 pandemisi hakkında sosyal medya platformlarında üretilen ve paylaşılan yalan, yanlış ve uydurma haberler oluşturmaktadır. Çalışmada, sosyal medya platformlarında Covid-19 aşısı ile ilgili üretilen ve paylaşılan yalan, yanlış ve uydurma haberler hakkında Türkiye’de faaliyet gösteren teyit.org doğrulama platformunun yaptığı inceleme sonuçlarına ilişkin verilerin ne olduğunun ortaya koyulması amaçlanmaktadır. Bu araştırma kapsamında nitel araştırma yöntemlerinden durum çalışması tercih edilerek vaka analizi tekniği ile veriler analiz edilmiştir. Araştırma kapsamında incelenecek dokümanlar (sosyal medya içerikleri) teyit.org doğrulama platformu üzerinden elde edilmiştir. Çalışmanın örneklemi, Türkiye’de ilk Covid-19 vakasının görüldüğü 11 Mart 2020 ile 10 Mart 2021tarihleri arasında sosyal medyada Covid-19 aşısı ile ilgili yer alan ve doğrulama platformu teyit.org’da doğru olup olmadığı incelenen içeriklerden oluşmaktadır. Çalışmada, sosyal medya platformlarında Covid-19 aşısı ile ilgili yalan, yanlış ve uydurma haberlerin paylaşıldığı sonucuna ulaşılmıştır.

Dynamic false contour evaluation method based on just noticeable distortion model for microdisplays

The dynamic false contour phenomenon of digital driving microdisplays affects the display quality seriously when displaying moving images. By analyzing the generation mechanism of dynamic false contour and considering the visual characteristics of the human eyes, this paper proposes a just noticeable distortion integral method to quantify the dynamic false contour level of different scan strategies. A series of experiments are designed to verify the reliability of the proposed evaluation method. Combining the linear pulse width modulation scan method and the subframe scan method, a centralized subframe scan method is proposed to alleviate the dynamic false contour phenomenon. The system verification platform is performed on a silicon-based OLED microdisplay with a resolution of 1280×1024. When the parameter K of centralized subframe scan method is not less than 4, the average Peak-Signal-to-Noise Ratio of image data set is above 35db, and the display effect is close to the original image.

Design of a multi-function high-speed digital baseband data acquisition system

A multi-function digital baseband data acquisition system is designed for the sampling, distribution and recording of wide-band multi-channel astronomical signals. The system hires a SNAP2 board as a digital baseband converter to digitize, channelize and packetize the received signal. It can be configured dynamically from a single channel to eight channels with a maximum bandwidth of 4096 MHz. Eight parallel HASHPIPE instances run on four servers, each carrying two NVMe SSD cards, achieving a total continuous write rate of 8 GB s−1. Data are recorded in the standard VDIF file format. The system is deployed on a 25-meter radio telescope to verify its functionality based on pulsar observations. Our results indicate that during the 30-minute observation period, the system achieved zero data loss at a data recording rate of 1 GB s−1 on a single server. The system will serve as a verification platform for testing the functions of the QTT (QiTai radio Telescope) digital backend system. In addition, it can be used as a baseband/VLBI (Very Long Baseline Interferometry) recorder or D-F-engine of correlator/beamformer as well.

A new structure optimization method for forced air-cooling system based on the simplified multi-physics model

Energy storage systems equipped with lithium-ion batteries are susceptible to fire and explosion hazards, especially when such batteries are used to power electric vehicles. One of the most important reasons for these undesirable consequences is the lack of an effective battery thermal management system. In this regard, an optimization method for the forced air-cooling system is introduced based on a simplified multi-physics simulation model. The simplified multi-physics model consists an electro-thermal coupling model and a flow resistance network model. The accuracy of the simplified multi-physics model is verified by comparison with experimental results. Subsequently, the deflector angle and cell space in the forced air-cooling system are optimized, respectively, based on the simplified multi-physics model, via an exhaustive search method and a genetic algorithm. Finally, the verification platform for the forced air-cooling system is built. After the optimization of deflector angle and cell space, the maximum temperature and temperature difference are limited to 38℃ and 2℃, with a reduction of about 30% and 80%, with respect to the unoptimized version. The consistency between the simulated and measured maximum temperature further confirms the effectiveness of the structure optimization method. In that, the method proposed in this paper is of great significance to shorten the time of structural optimization for forced air-cooling systems.

Conversion and verification of proportional–integral​ controller parameter in Daya Bay distributed control system modification project

The nuclear island analog system in the Daya Bay Nuclear Power Plant is made up of discrete analog boards. Owing to the difficulties in purchasing spare parts and maintaining systems, the overall digital upgrade and modification shall be carried out during the 30-year overhaul period. In view of the difference between analog and digital systems in expressing and processing process signals, this paper proposed the proportional–integral (PI) controller parameter conversion method for digital modification, highlighting the importance of controller input/output range matching in the process of parameter conversion. The Daya Bay process simulation model, minimum digital system, and minimum analog system are built into a system verification platform through a programmable logic controller (PLC). Taking primary single-phase pressure control loop system and downflow pressure control loop system as research objects, the disturbance was introduced through the step of the primary pressure setting value and opening/closing of the second downflow orifice plate respectively, and the adjustment time、 overshoot and other adjustment quality differences in different systems are compared. The correctness of the parameter conversion method is verified through the system verification platform, which not only ensures the correct input of controller parameters of the Daya Bay DCS modification project but also provides invaluable experience for other digital modification projects of analog systems.

"Artificial Intelligence Verification Platform using Block Chain with Distributed Ledger Technology"

Developments in (AI) or (DLT) are now provoking lively debate in practice and academia. AI uses data to achieve goals that were previously believed to be only possible for humans. In an unsettled context, distributed ledger technology has the potential to establish consensus about information among a group of contributors. Both technologies that are needed in similar and common systems are investigated in this study. As a result, the safe pattern (DLT) or the creation of a federated learning system spread over many nodes. It has the ability to lead technological convergence, which has previously covered the technique for the major revolution in technology (IT). Earlier work summarizes many possible benefits of the convergence of DLT and AI, but only provides a limited theoretical framework to describe future real-world DLT and AI merger instances. The primary goal of this research is to disseminate by maintaining systematic previous works and offering conscientious derivative future research opportunities. This study contributes to overcoming existing constraints in AI and DLT convergence for both technologies.