Plasma-induced Physical Damage Research Articles

Optical and electrical evaluation methods of plasma-induced damage in InP substrates

Indium phosphide (InP) has been focused on as one of the emerging materials that can be implemented in advanced semiconductor devices. We proposed optical and electrical characterization methods to evaluate plasma-induced physical damage (PPD)—ion bombardment damage—to InP substrates. By introducing a native oxide phase in an interfacial layer, we proposed an optical model of the damaged structure applicable for in-line monitoring by spectroscopic ellipsometry. Gas species dependence was obtained, which suggested that the H2 plasma exposure formed a thicker damaged layer than Ar. Impedance spectroscopy (IS) under various biases (V b) was implemented to reveal the nature of damaged structures. Capacitive and conductive components assigned by the IS were confirmed to depend on incident species from plasma, indicating the difference in the energy profile of created defects. The presented methods are useful to characterize and control PPD in designing future high-performance InP-based devices.

Removal of Plasma-Induced Physical Damage Formed in Nanoscale Three-Dimensional FinFETs

During plasma etching for fin patterning in the three-dimensional (3D) FinFET structure, the exposure of the Si surface to plasma with reactive ions can induce physical damages, resulting in the degradation of electrical properties of the device. In this study, we evaluated the damage with a measurable value by simulation and surface damage analyses using HR-TEM and RBS. As a result, the degree of the damaged layer was strongly dependent on the energy of the ions bombarding the Si substrate during plasma etching. The damage was quantified with the interface defect density measured by the charge pumping method. Plasma etching with high ion energy showed approximately one order of magnitude higher defect density than that with low ion energy and/or wet etching with no ion bombardment. We introduced Si soft treatment (with very low ion energy) to remove the damaged layer. The Si soft treatment was very effective to remove the damage on a highly damaged silicon surface. However, the Si soft treatment itself increased the number of defects for a low damage silicon surface.

An evaluation method of the profile of plasma-induced defects based on capacitance–voltage measurement

Aggressive shrinkage and geometrical transition to three-dimensional structures in metal–oxide–semiconductor field-effect transistors (MOSFETs) lead to potentially serious problems regarding plasma processing such as plasma-induced physical damage (PPD). For the precise control of material processing and future device designs, it is extremely important to clarify the depth and energy profiles of PPD. Conventional methods to estimate the PPD profile (e.g., wet etching) are time-consuming. In this study, we propose an advanced method using a simple capacitance–voltage (C–V) measurement. The method first assumes the depth and energy profiles of defects in Si substrates, and then optimizes the C–V curves. We applied this methodology to evaluate the defect generation in (100), (111), and (110) Si substrates. No orientation dependence was found regarding the surface-oxide layers, whereas a large number of defects was assigned in the case of (110). The damaged layer thickness and areal density were estimated. This method provides the highly sensitive PPD prediction indispensable for designing future low-damage plasma processes.

Impacts of plasma process-induced damage on MOSFET parameter variability and reliability

Plasma process-Induced Damage (PID) is one of the critical issues in designing Metal–Oxide–Semiconductor Field-Effect Transistors (MOSFETs), because PID is believed to enhance reliability degradation and the variability. This paper presents how PID impacts on the variability and reliability characterization by focusing on two key damage creation mechanisms, i.e., Plasma-induced Physical Damage (PPD) and Charging Damage (PCD). In PPD mechanisms, the effects of Si loss in the source/drain extension region and latent defects on MOSFET performance are discussed by means of the PPD range theory and Technology-Computer-Aided-Design (TCAD) simulations. It is presented that, under the fluctuation of plasma parameters, PPD enhances variability of threshold voltage shift (ΔVth) and drain current. Regarding PCD mechanisms, ΔVth variation due to high-k dielectric damage is investigated by reviewing an antenna ratio distribution reported so far. Finally, two key concerns are discussed as future perspective—PPD on a fin-structured FET and PCD on high-k Time-Dependent Dielectric Breakdown (TDDB) characterization. Since PID is the intrinsic nature of plasma processing, variability enhancement and reliability degradation by PID should be taken into account for future Very-Large-Integration (VLSI) circuit designs.

Characterization of Plasma Process-Induced Latent Defects in Surface and Interface Layer of Si Substrate

Characterization of plasma-induced Si substrate damage is demonstrated using an electrical capacitance–voltage (C–V) technique customized for the nano-scale analysis. Low resistive Si wafers are exposed to an inductively coupled plasma (ICP) or a capacitively coupled plasma (CCP). We focus on the effects of plasma parameters and wet-etching processes on plasma-induced physical damage (PPD) analyses. The optical thicknesses of surface and interfacial layers (dSL and dIL) were characterized using spectroscopic ellipsometry (SE) and compared with the electrical oxide thicknesses (EOT) obtained by the C–V technique. In the case of as-damaged samples, the optical thickness dSL by SE is found to be smaller than the EOT by the C–V technique, while the sum of dSL and dIL was approximately equal to the EOT. A diluted hydrofluoric acid (DHF) wet-etch step is employed to address depth profile of defect density in damaged samples. We identify the latent defect density, dSL, and dIL after the DHF wet-etch, which are indispensible for practical device performance designs. It is found that, although the average energy of incident ions () is larger for the case of CCP, the latent defect density of CCP-damaged samples is smaller than that of ICP even after the wet-etching. This finding is in sharp contrast to previous pictures—the larger leads to the thicker damaged layer and the larger latent defect density. We propose a model for these conflicting results, where the profiles of defect density and the sensitivities of each analysis technique are taken into account. The present work highlights the importance of the nano-scale damage characterization using the C–V technique, allowing to understand the influence of latent defects and to enable better design of future electronic devices.

Effects of straggling of incident ions on plasma-induced damage creation in “fin”-type field-effect transistors

We investigated the plasma-induced physical damage (PPD) mechanism in a field-effect transistor (FET) with a fin-type channel, called FinFET. Compared to PPD in planar metal–oxide–semiconductor field-effect transistors (MOSFETs), such as Si loss or Si recess formed by energetic ion bombardment during plasma processing followed by the subsequent wet-etch stripping, it was predicted that PPD in FinFETs are generated primarily by a stochastic process called straggling of incident ions. During the etching of a fin structure in a FinFET, an impinging ion penetrates into the crystalline Si region to be etched, not only in the vertical direction but also in the lateral direction, resulting in lateral damage in the sidewall region, that is, the bulk fin. The damage layer generation mechanism in the fin structure was modeled on the basis of range theory. A molecular dynamics simulation was performed for noble and halogen species impacting on a Si fin structure to verify the proposed mechanism. The calculated results showed that ions with lighter masses and higher incident energies induced a larger amount of damage in the bulk fin owing to the nature of straggling phenomena. It should be noted that the PPD in the bulk fin may lead to latent defect sites in the channel region, and hence to operating speed degradation, which is a problematic concern for high-performance FinFETs.

Micro-photoreflectance spectroscopy for microscale monitoring of plasma-induced physical damage on Si substrate

An advanced method of photoreflectance spectroscopy (PRS) is studied to enable the microscale optical characterization of Si substrates, physically damaged by energetic ions from plasma during etching. The method examined in this study (µ-PRS) features a microscope module that focuses a probe beam into a 15-µm-wide “microspot” on the wafer surface. Silicon wafers were exposed to argon plasma and then measured by µ-PRS. The obtained spectra were analyzed, and the damaged wafers were quantitatively characterized in terms of the change in their surface potential. In this study, we demonstrate the µ-PRS’s capability for the microscopic characterization of plasma-damaged wafers.

Numerical Simulation Method for Plasma-Induced Damage Profile in SiO2 Etching

We developed a numerical simulation method for the depth profiles of plasma-induced physical damage to SiO2 and Si layers during fluorocarbon plasma etching. In the proposed method, the surface layer is assumed to consist of two layers: a C–F polymer layer and a reactive layer. Physical and chemical reactions in the reactive layer divided into several thin slabs and in the deposited C–F polymer layer, which depend on etching parameters, such as etching time, gas flow rate, gas pressure, and ion energy (Vpp), are considered in detail. We used our simulation method to calculate the SiO2 etch rate, the thickness of the C–F polymer layer (TC–F), and the selectivity of SiO2 to Si during C4F8/O2/Ar plasma etching. We confirmed that the calculated absolute values and their behavior are consistent with experimental data. We also successfully predicted depth profiles of physical damage to the Si and SiO2 layers introducing our re-gridding method. We found that much Si damage is generated in the pre- and early stages of the overetching step of SiO2/Si layer etching despite the high selectivity. These simulation results suggest that the TC–F value and the overetching time must be carefully controlled by process parameters to reduce damage during fluorocarbon plasma etching. The results have also provided us with useful knowledge for controlling the etching process.

Quantitative Characterization of Plasma-Induced Defect Generation Process in Exposed Thin Si Surface Layers

The defect generation process in Si surface layer induced by plasma exposures is studied by two optical analyses, spectroscopic ellipsometry (SE) and photoreflectance spectroscopy (PR). Two plasma sources with Ar-gas mixtures are employed; one is DC plasma and the other, electron cyclotron resonance (ECR) plasma. In the case of Ar-DC plasma exposure with 300 V bias, the SE analysis with an optimized optical model determines 1-nm-thick interfacial layer (IL) between the surface layer and the substrate, while in the case of the ECR, approximately 0.5-nm-thick interfacial layer is identified. This difference is attributed to that in self-bias voltages (Vdc) between two plasma sources. In order to quantify the damage, we have modified the PR analysis technique in order to evaluate the plasma-induced carrier trap site density, by correlating the Si surface potential change to the trapped carrier density. Combined with the results by plasma diagnostics, we found that the calculated defect generation probabilities by an impinging ion were the orders of 10-2 and 10-5 in the present DC and ECR plasma conditions, respectively, and that the probability depends on the Vdc. The obtained results enable us to predict the plasma-induced physical damage to the devices in advance at the stage of plasma process designs.