Photon-counting ASIC Research Articles

Ultra-Fast Energy Resolved Imager for `Pseudo' Laue diffraction experiments at synchrotron facilities

`Pseudo' Laue diffraction experiments, with multi pink beam, is being considered as an option for the upgrade of SOLEIL for fast time resolved crystallographic applications in the energy range from 5 to 30 keV. An important requirement for the detector of such experiments is to increase the readout speed and the capability to discriminate between several energies.For this purpose, a new project has been launched in 2021 through a collaboration between SOLEIL and AGH, starting with a feasibility phase with the design and realization of a new photon counting ASIC prototype, named UFERI (Ultra-Fast Energy Resolved Imager). After a short description of the ASIC requirements and main architecture, first results of the ASIC prototypes are presented, as well as preliminary results of the first hybrid pixel modules illuminated with X-rays in our laboratory.

FRIC—a 50 μm pixel-pitch single photon counting ASIC with Pattern Recognition algorithm in 40 nm CMOS technology

This work presents design and measurement results of FRIC—a prototype ROIC for fine resolution hybrid pixel detectors. The chip was manufactured in 40 nm CMOS process and contains an array of 64 × 64 pixels with 50 μm pixel pitch. It implements a very versatile analog front-end, capable of energy resolution of 0.71 keV FWHM and an estimated dead-time of 50 ns. The chip also features a Pattern Recognition algorithm together with signal summing for charge sharing correction. Low power consumption makes this circuit applicable in large-area detectors.

A fitting model of the pixel response to monochromatic X-rays in photon counting detectors

We present a simple fitting model for the pixel response to monochromatic X-rays in single photon counting pixelated detectors that takes into account the 2D effects of the charge sharing and of the electronic noise on the photon counting process. It is based only on geometrical and physical parameters such as the pixel size, the charge cloud size at the pixel depth and the total electronic noise of the front-end circuitry. The equations describing the pixel point spread function and the integral pulse height spectrum are derived preserving the genuine 2D nature of the charge collection process. The fitting performances of the model has been assessed on a set of experimental integral pulse height spectra measured with an IBEX photon counting ASIC bonded to a 450μm thick Silicon sensor with 75μm×75μm pixel size, irradiated with monochromatic X-rays in the energy range 6–12.4 keV, with excellent agreement between model and measurement. The actual contributions of the charge sharing and of the electronic noise are identified and estimated. As a possible consequence, the model can be used to predict precisely the behavior of photon counting detection systems as a function of the design parameters.

Spectral response characterization of CdTe sensors of different pixel size with the IBEX ASIC

We characterized the spectral response of CdTe sensors with different pixel sizes – namely 75, 150 and 300 μm – bonded to the latest generation IBEX single photon counting ASIC developed at DECTRIS, to detect monochromatic X-ray energy in the range 10–60 keV. We present a comparison of pulse height spectra recorded for several energies, showing the dependence on the pixel size of the non-trivial atomic fluorescence and charge sharing effects that affect the detector response. The extracted energy resolution, in terms of full width at half maximum or FWHM, ranges from 1.5 to 4 keV according to the pixel size and chip configuration. We devoted a careful analysis to the Quantum Efficiency and to the Spectral Efficiency — a newly-introduced measure that quantifies the impact of fluorescence and escape phenomena on the spectrum integrity in high-Z material based detectors. We then investigated the influence of the photon flux on the aforementioned quantities up to 180⋅106 cts/s/mm2 and 50⋅106 cts/s/mm2 for the 150 μm and 300 μm pixel case, respectively. Finally, we complemented the experimental data with analytical and with Monte Carlo simulations – taking into account the stochastic nature of atomic fluorescence – with an excellent agreement.

ChromAIX2: A large area, high count-rate energy-resolving photon counting ASIC for a Spectral CT Prototype

Spectral CT based on energy-resolving photon counting detectors is expected to deliver additional diagnostic value at a lower dose than current state-of-the-art CT [1]. The capability of simultaneously providing a number of spectrally distinct measurements not only allows distinguishing between photo-electric and Compton interactions but also discriminating contrast agents that exhibit a K-edge discontinuity in the absorption spectrum, referred to as K-edge Imaging [2]. Such detectors are based on direct converting sensors (e.g. CdTe or CdZnTe) and high-rate photon counting electronics.To support the development of Spectral CT and show the feasibility of obtaining rates exceeding 10Mcps/pixel (Poissonian observed count-rate), the ChromAIX ASIC has been previously reported showing 13.5Mcps/pixel (150Mcps/mm2 incident) [3]. The ChromAIX has been improved to offer the possibility of a large area coverage detector, and increased overall performance. The new ASIC is called ChromAIX2, and delivers count-rates exceeding 15Mcps/pixel with an rms-noise performance of approximately 260 e-. It has an isotropic pixel pitch of 500µm in an array of 22×32 pixels and is tile-able on three of its sides. The pixel topology consists of a two stage amplifier (CSA and Shaper) and a number of test features allowing to thoroughly characterize the ASIC without a sensor. A total of 5 independent thresholds are also available within each pixel, allowing to acquire 5 spectrally distinct measurements simultaneously. The ASIC also incorporates a baseline restorer to eliminate excess currents induced by the sensor (e.g. dark current and low frequency drifts) which would otherwise cause an energy estimation error.In this paper we report on the inherent electrical performance of the ChromAXI2 as well as measurements obtained with CZT (CdZnTe)/CdTe sensors and X-rays and radioactive sources.

Development of CdTe pixel detectors combined with an aluminum Schottky diode sensor and photon-counting ASICs

We have been developing CdTe pixel detectors combined with a Schottky diode sensor and photon-counting ASICs. The hybrid pixel detector was designed with a pixel size of 200 μ m by 200 μm and an area of 19 mm by 20 mm or 38.2 mm by 40.2 mm. The photon-counting ASIC, SP8-04F10K, has a preamplifier, a shaper, 3-level window-type discriminators and a 24-bits counter in each pixel. The single-chip detector with 100 by 95 pixels successfully operated with a photon-counting mode selecting X-ray energy with the window comparator and stable operation was realized at 20 degrees C. We have performed a feasibility study for a white X-ray microbeam experiment. Laue diffraction patterns were measured during the scan of the irradiated position in a silicon steel sample. The grain boundaries were identified by using the differentials between adjacent images at each position.

CZT sensors for Computed Tomography: from crystal growth to image quality

Recent advances in Traveling Heater Method (THM) growth and device fabrication that require additional processing steps have enabled to dramatically improve hole transport properties and reduce polarization effects in Cadmium Zinc Telluride (CZT) material. As a result high flux operation of CZT sensors at rates in excess of 200 Mcps/mm2 is now possible and has enabled multiple medical imaging companies to start building prototype Computed Tomography (CT) scanners. CZT sensors are also finding new commercial applications in non-destructive testing (NDT) and baggage scanning. In order to prepare for high volume commercial production we are moving from individual tile processing to whole wafer processing using silicon methodologies, such as waxless processing, cassette based/touchless wafer handling. We have been developing parametric level screening at the wafer stage to ensure high wafer quality before detector fabrication in order to maximize production yields. These process improvements enable us, and other CZT manufacturers who pursue similar developments, to provide high volume production for photon counting applications in an economically feasible manner. CZT sensors are capable of delivering both high count rates and high-resolution spectroscopic performance, although it is challenging to achieve both of these attributes simultaneously. The paper discusses material challenges, detector design trade-offs and ASIC architectures required to build cost-effective CZT based detection systems. Photon counting ASICs are essential part of the integrated module platforms as charge-sensitive electronics needs to deal with charge-sharing and pile-up effects.

Medipix3RX: Characterizing the Medipix3 Redesign With Synchrotron Radiation

The Medipix3RX is the latest version of the Medipix3 photon counting ASICs, which implements two new operational modes, with respect to the Medipix2 ASIC, aimed at eliminating charge shared events (referred to as Charge Summing Mode (CSM)) and at providing spectroscopic information (referred to as Colour Mode (CM)). The Medipix3RX is a redesign of the Medipix3v0 ASIC and corrects for the underperformance of CSM features observed in the previous version. This paper presents the results from synchrotron X-rays tests to evaluate the Medipix3RX ASIC performance. The newly implemented CSM algorithm eliminates the charge sharing effect at the same time as allocating the event to the readout pixel corresponding to the sensor pixel where the X-ray photon impinged. The new pixel trimming circuit led to a reduced dispersion between pixels. Further results of the linearity for all the gain modes, energy resolution and pixel uniformity are also presented.

Fast and precise algorithms for calculating offset correction in single photon counting ASICs built in deep sub-micron technologies

An important trend in the design of readout electronics working in the single photon counting mode for hybrid pixel detectors is to minimize the single pixel area without sacrificing its functionality. This is the reason why many digital and analog blocks are made with the smallest, or next to smallest, transistors possible. This causes a problem with matching among the whole pixel matrix which is acceptable by designers and, of course, it should be corrected with the use of dedicated circuitry, which, by the same rule of minimizing devices, suffers from the mismatch. Therefore, the output of such a correction circuit, controlled by an ultra-small area DAC, is not only a non-linear function, but it is also often non-monotonic. As long as it can be used for proper correction of the DC operation points inside each pixel, it is acceptable, but the time required for correction plays an important role for both chip verification and the design of a big, multi-chip system. Therefore, we present two algorithms: a precise one and a fast one. The first algorithm is based on the noise hits profiles obtained during so called threshold scan procedures. The fast correction procedure is based on the trim DACs scan and it takes less than a minute in a SPC detector systems consisting of several thousands of pixels.

Hybrid pixel-waveform CdTe/CZT detector for use in an ultrahigh resolution MRI compatible SPECT system

In this paper, we will present a new small pixel CdTe/CZT detector for sub-500μm resolution SPECT imaging application inside MR scanner based on a recently developed hybrid pixel-waveform (HPWF) readout circuitry. The HPWF readout system consists of a 2-D multi-pixel circuitry attached to the anode pixels to provide the X–Y positions of interactions, and a high-speed digitizer to read out the pulse-waveform induced on the cathode. The digitized cathode waveform could provide energy deposition information, precise timing and depth-of-interaction information for gamma ray interactions. Several attractive features with this HPWF detector system will be discussed in this paper. To demonstrate the performance, we constructed several prototype HPWF detectors with pixelated CZT and CdTe detectors of 2–5mm thicknesses, connected to a prototype readout system consisting of energy-resolved photon-counting ASIC for readout anode pixels and an Agilent high-speed digitizer for digitizing the cathode signals. The performances of these detectors based on HPWF are discussed in this paper.

A High-Rate Energy-Resolving Photon-Counting ASIC for Spectral Computed Tomography

We describe a high-rate energy-resolving photon-counting ASIC aimed for spectral computed tomography. The chip has 160 channels and 8 energy bins per channel. It demonstrates a noise level of ENC =214 electrons at 5 pF input load at a power consumption of <; 5 mW/channel. Maximum count rate is 17 Mcps at a peak time of 40 ns, made possible through a new filter reset scheme, and maximum read-out frame rate is 37 kframe/s.

ChromAIX: Fast photon-counting ASIC for Spectral Computed Tomography

X-ray attenuation properties of matter (i.e. human body in medical Computed Tomography) are energy and material dependent. This dependency is largely neglected in conventional CT techniques, which require the introduction of correction algorithms in order to prevent image artefacts. The exploitation of the inherent energy information contained in the X-ray spectrum allows distinguishing the two main physical causes of energy-dependent attenuation (photo-electric effect and Compton effect). Currently a number of methods exist that allow assessing the energy-dependent attenuation in conventional systems. These methods consist of using two distinct spectra (kVp switching or dual source) or of discriminating low and high energy photons by means of stacking two detectors. Further improvements can be achieved by transitioning to direct-conversion technologies and counting-mode detection, which inherently exhibits a better signal-to-noise ratio. Further including energy discrimination enables new applications, which are not feasible with dual-energy techniques, e.g. the possibility to discriminate K-edge features (contrast agents, e.g. gadolinium) from other contributions to the X-ray attenuation of a human body. The capability of providing energy-resolved information with two or more independent measurements is referred to as Spectral CT. A new proprietary photon-counting ASIC (ChromAIX) has been developed to provide high count-rate capabilities while offering energy discrimination. ChromAIX consists of a pixel array with an isotropic pitch of 300 μm. Each pixel contains independent discriminators that enable the possibility to discretize the incoming photons into a number of energy levels. Extensive electrical characterization has been carried out to assess the performance in terms of count-rate performance and noise. Observed rates exceed 10 Mcps/pixel (Poissonian, mean incoming rates >27 Mcps). The energy resolution is better than 4.1 keV FWHM and has been shown to be consistent with the simulations. First measurement with X-rays have also been carried out on samples directly flip-chip bonded to CdTe and CZT crystals. The pulse shape and spectrum obtained from a 241Am source is consistent with the simulations.

FROST: a low-noise high-rate photon counting ASIC for X-ray applications

FRONTier RADiography is an R&D project to assess the feasibility of digital mammography with Synchrotron Radiation at the ELETTRA Light Source in Trieste. In order to reach an acceptable time duration of the exam, a fast- and low-noise photon counting ASIC has been developed in collaboration with Aurelia Microelettronica, called Frontrad ReadOut SysTem. It is a multichannel counting system, each channel being made of a low-noise charge-sensitive preamplifier optimized for X-ray energy range (10–100 keV), a CR-RC 2 shaper, a discriminator and a 16-bit counter. In order to set the discriminator threshold, a set of a global 6-bit DAC and a local (per channel) 3-bit DAC has been implemented within the ASIC. We report on the measurements done with the 8-channel prototype chip and the comparison with the simulation results.