Passivated Si Substrates Research Articles

Methyl passivation is better than silicon oxide passivation in five aspects for the Si/PEDOT:PSS interface

Methyl passivation has been demonstrated to be better than the silicon oxide passivation commonly used in Si/PEDOT:PSS solar cells; however, the reason is still unclear. Based on first-principle calculations on the carrier transport behaviors at the Si/PEDOT:PSS interface, we found that methyl passivation is superior to silicon oxide passivation in five aspects. First, methyl plays better than silicon oxide in eliminating the dangling bonds and introducing fewer defect levels in the bandgap. Secondly, the effective carrier mass in methyl passivated Si substrate is smaller than silicon oxide passivated. Thirdly, the carrier transfer rate through the Si/PEDOT:PSS interface with methyl passivation will be much larger than that with silicon oxide passivation. Fourthly, an additional electric field that can boost the separation of carriers will form at the methyl passivated Si/PEDOT:PSS interface. Finally, the energy band bending of the Si substrate with methyl passivation, ∼0.08 eV, will not hinder the holes extraction as significantly as that with silicon oxide passivation, ∼0.63 eV. This article provides a complete process for evaluating a passivation scheme based on first-principle calculations.

Atomistic insights into resistance to oxidation of Si (111) grafted different organic chains

Recent works have shown that self-assembled monolayers (SAMs) on the H-terminated Si surface are applied to prevent the oxidation of H-terminated silicon. Here, based on ReaxFF molecular dynamics simulations, we investigate the resistance to oxidation of the different passivated Si (111) substrates. As a result, the Si surfaces were oxidized via the structures of peroxy-like (H2O2). The growth of different terminated Si substrates oxides can be vividly described as a sandwich-like Si/SiOx/SiOH structure. Besides, we found the oxidation resistance of different organic-terminated Si substrates in the following order: HOOC-terminated > CH3-terminated ≈ CH3O-terminated. On the one hand, the HOOC-terminated Si substrate formed Hbonds during the interaction, which makes the O2 more difficult to pass through the tighter organic monolayers. On the other hand, Si atom RMSD in HOOC-terminated is lower than the CH3-terminated system, which prevents the transport of O atoms in Si substrate. Based on this research, the atomistic insights of the resistance to oxidation of various passivated Si substrates, which could be helpful in the manufacture of the metal–oxidesemiconductor (MOS) devices.

Intermixing during Epitaxial Growth of van der Waals Bonded Nominal GeTe/Sb2Te3 Superlattices

In the present work, GeTe and Sb2Te3 van der Waals bonded superlattices epitaxially grown by molecular beam epitaxy are investigated. These structures are grown on passivated Si substrates, resulting in one single epitaxial domain and its twinned domain, both sharing the same out-of-plane orientation. Supported by X-ray diffraction and Raman spectroscopy, attention is called to the thermodynamically driven tendency of GeTe and Sb2Te3 to intermix into a Ge–Sb–Te (GST) alloy at the interfaces. A growth model is proposed to explain how these GST structures are formed.

Fabrication of yttrium-doped barium zirconate thin films with sub-micrometer thickness by a sol–gel spin coating method

Abstract A modified sol–gel process was developed for the fabrication of sub-micrometer scale yttrium-doped barium zirconate (BZY) thin film at much lower processing temperatures. The film was fabricated by direct spin-coating of the sol on a Si3N4 passivated Si substrate, followed by low temperature thermal annealing at 1000 °C, and single BZY phase without barium carbonate residue was obtained. A 200 nm-thick thin film without obvious through-film cracks was fabricated with optimized process parameters of sol concentration and heating rate. The stoichiometry of the BZY thin film was well-controlled and no Ba evaporation was observed due to the low processing temperature. The combination of sol–gel and spin coating method can be a promising alternative to vacuum-based thin film deposition techniques for the fabrication of sub-micrometer scale BZY thin film.

Fine-Pitch UBM Pad Metallization and Flip-Chip Assembly for Plane Arrays Interconnection

We have developed and successfully obtained stable and reliable processes in our labs for metallization and pad definition of passivated Si substrates for microelectronic flip-chip assembly with solder bumps, applicable to high-density interconnection technology. Patterned samples were prepared with aluminum pads on Si/SiO2 over which the UBM multilayer metals were deposited. Pads are 90x90micron^2 with 185micron pitch. All metal layers show good stability and adherence, and the final processes have good reproducibility and stability. A flip-chip assembly using solder micro-bumps deposited over the pads was used to demonstrate stability and reliability of the process. This set of processes - metallization, pad definition and flip-chip assembly - will next be applied to functional devices.

Grain growth in nanocrystalline copper thin films investigated by non-ambient X-ray diffraction measurements

The microstructure evolution (crystallite size and microstrain) as well as the residual stress of Cu thin films of various thicknesses (250 nm, 500 nm, and 1 μm) on passivated Si substrates during isochronal annealing was investigated by in situ X-ray diffraction measurements in the temperature range between 25 °C and 250 °C. Before annealing, the thermoelastic behavior was investigated excluding the occurrence of thermally activated relaxation processes occurring above ambient temperature by in situ stress measurements below ambient temperature. On this basis, above ambient temperature, effects of stress relaxation and emerging secondary stresses (due to grain growth and annihilation of crystal defects, giving rise to a considerable tensile stress contribution development) could be identified for all three layers in the temperature regime between ambient temperature and 250 °C. Grain growth in the nanocrystalline thin films started at much lower temperatures as compared to coarse-grained materials. The results were discussed in terms of the effects of different driving forces and grain-boundary mobilities acting in nanocrystalline materials.

Passivation of Silicon Surfaces Using Atomic Layer Deposited Metal Oxides

AbstractSurface passivation of silicon substrates using atomic layer deposited Al2O3 and HfO2 thin films are assessed. Al2O3 and HfO2 dielectric layers with various thicknesses were deposited on both sides of n-type (100) FZ-Si substrates (resistivity 4 – 6 Ω-cm) at 200°C by atomic layer deposition (ALD) system. The effective excess carrier lifetime of as-deposited oxide/Si/oxide structure was measured by microwave-photoconductivity-decay (MWPCD) measurement technique and it was observed that the thicker ALD dielectrics lead to higher effective excess carrier lifetime and better surface passivation. The measurements showed average excess carrier lifetime values of 302 μs and 347 μs for as-deposited Al2O3 and HfO2 passivated Si substrates with 150 ALD cycles, respectively. MWPCD and capacitance-voltage (C-V) measurements suggest that as-deposited ALD HfO2 layer leads to a better surface passivation compared to as-deposited ALD Al2O3 layer. Further, the results suggest that there exist fixed negative charges in the bulk of the ALD dielectrics and this contributes to the field effect passivation of the silicon surfaces.

Production and assembly of atomic clusters

AbstractThis paper describes the production of atomic clusters and their subsequent assembly into conducting films and wires on insulating substrates. An Ultra‐High‐Vacuum compatible Inert Gas Aggregation cluster deposition system which allows in‐situ electrical measurements to be performed on deposited cluster films has been developed. Accurate placement and dimensional control of cluster‐assembled films has been achieved in this system using soft‐landed Bi and Sb clusters and templated substrates prepared using standard optical and electron‐beam lithography. Self‐contacting cluster‐assembled films produced on planar Six Ny and SiO2 passivated Si substrates have provided a means to study conduction through percolating networks. Cluster‐assembled wires with sub‐100 nm widths have been positioned on templated Six Ny and SiO2 passivated Si substrates. The reported assembly techniques rely upon controlling cluster reflection from substrates and factors which affect the probability of cluster‐reflection are discussed. (© 2006 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Electrically conducting Bi cluster-assembled wires formed using SiN nanostencils

This paper describes the selective deposition of clusters through nanoscale aperture-slots to form conducting cluster-assembled wires. PMMA coated SiN membranes featuring reactive ion etched aperture-slots were aligned over planar Ti/Au contacts on passivated Si substrates and then placed in the deposition chamber of an inert gas aggregation cluster deposition system. Bi clusters were deposited through the aperture-slots onto the contacted substrates. The contact-to-contact conduction was monitored throughout the cluster deposition process and a sharp increase in the conduction between the contacts indicated completion of a cluster-assembled wire. Whilst the Bi clusters adhere to SiN and Au layers, they are reflected from the PMMA coated membrane thus eliminating the possibility of accumulation within the aperture-slots. Conducting Bi wires with lengths up to 100 μm and widths down to 400 nm have been produced.

In situ transmission electron microscopy study of thermal-stress-induced dislocations in a thin Cu film constrained by a Si substrate

Thermal-stress-induced dislocation motion in a Cu film on an amorphous SiN x (a-SiN x ) passivated Si substrate was investigated by in situ transmission electron microscopy (TEM). Plan-view, in situ TEM experiments revealed a relatively constant dislocation density of 3.4×10 9–5.9×10 9 cm −2 throughout thermal cycling. However, dislocation motion was strongly temperature dependent. At elevated temperatures dislocation moved continuously, while at temperatures below ∼220°C dislocation motion became jerky with a projected mean free path of ∼70 nm. Furthermore, cross-sectional TEM specimens revealed that dislocations were attracted and pulled into the Cu/a-SiN x interface, where upon dislocation contrast disappeared. The limited dislocation mobility observed at low homologous temperatures may contribute to the high yield stress of the Cu films.

Nanoscale mechanical patterning for the selective deposition of nanostructures

In this paper, we describe a new method for creating nanostructures, and demonstrate its use by depositing Au, Ni, and Zn on a SiO2 passivated Si substrate. The method combined the spatial control of electron-beam lithography with the ease of fabrication of self-assembled arrays. The technique enabled the selective electrochemical deposition of nanostructures by creating specific nucleation sites by nanoindentation. This offered the possibility of accurately creating nanostructures ranging in size from one to hundreds of nanometers. We showed that it is possible to electrically isolate the nanostructures from the substrate and each other by a thermal oxidation process. In principle, this technique allowed fabrication of quantum devices of any geometry.

Ultrathin TiO2 Gate Dielectric Formation by Annealing of Sputtered Ti on Nitrogen Passivated Si Substrates in Nitric Oxide Ambient

ABSTRACTWe have fabricated very thin TiO2 film (Teq∼20Å) by RTP oxidation of sputtered Ti in NO ambient on nitrogen passivated Si substrates. The leakage current is about two orders magnitude lower than SiO2 of identical Teq. Results show that NO passivation layer prior to sputtering is critical in reducing the leakage current. XPS results show that the temperature RTP NO oxidation of sputtered Ti is very important for achieving high quality TiO2 films. high oxidation temperature an SiO2 layer is formed at the interface between TiO2 and Si and the leakage current is approaching to that of SiO2.

ECR-MOCVD of the Ba-Sr-Ti-O system below 400°C. Part I: Processing

SrTiO3 (or ST) and (Ba, Sr)TiO3 (or BST) thin films were deposited on Pt passivated Si substrates below 400°C, using β-diketonates of Ba, Sr, and Ti, electron cyclotron resonance (ECR) plasma-enhanced chemical vapor deposition (CVD), and direct liquid injection system. Reported here are results from various thin-film characterization techniques including TEM and SEM. To optimize the processing parameters with respect to phase purity, Sr/Ti ratio, and permittivity, the method of design of experiments was implemented. The as-deposited (at 390°C), unannealed ST films exhibited a permittivity of 120 and an ohmic contact with the bottom Pt electrode. The former was attributed to the small grain size (150–200 å) and presence of Sr rich second phases. The latter was related to the observed incubation period at the initial nucleation stages of film growth.

Deposition of Pb(Zr,Ti)O3 Thin Films by Metal‐Organic Chemical Vapor Deposition Using β‐diketonate Precursors at Low Temperatures

Lead zirconate titanate (PZT) thin films were deposited by metal‐organic chemical vapor deposition (MOCVD) using β‐diketonate precursors and 02 at temperatures below 500°C on variously passivated Si substrates. PZT thin films could not be deposited on bare Si substrates, owing to a serious diffusion of Pb into the Si substrate during deposition. Pt/SiO2/Si substrates could partially block the diffusion of Pb, but a direct deposition of PZT thin films on the Pt/SiO2/Si substrates resulted in a very inhomogeneous deposition. A TiO2 buffer layer deposited on Pt/SiO2/Si substrates could partially suppress the diffusion of Pb and produce homogeneous thin films. However, the crystallinity of PZT thin films deposited on the TiO2‐buffered Pt/SiO2/Si substrate was not good enough, and the films showed random growth direction. PZT thin films deposited on the PbTiO3‐buffered Pt/SiO2/Si substrates had good crystallinity and a‐ and c‐axis oriented growth direction. However, the PZT thin film deposited at 350°C showed fine amorphous phases at the grain boundaries, owing to the low chemical reactivities of the constituent elements at that temperature, but they could be crystallized by rapid thermal anneaiing (RTA) at 700°C. PZT thin film deposited on a 1000‐å PbTiO3,‐thin‐film‐buffered Pt/SiO2/Si substrate at 350°C and rapid thermally annealed at 700°C for 6 min showed a single‐phase perovskite structure with a composition near the morphotropic boundary composition.