Package Substrate Research Articles

Proof of concept for through silicon vias in application-specific integrated circuits for hard x-ray imaging detectors

Application-specific integrated circuits (ASICs) are commonly used to efficiently process the signals from sensors and detectors in space. Wire bonding is a space-qualified technique of making interconnections between ASICs and their substrate packaging board for power, control, and readout of the ASICs. Wire bonding is nearly ubiquitous in modern space programs, but their exposed wires can be prone to damage during assembly and subject to electric interference during operations. Additional space around the ASICs needed for wire bonding also impedes efficient packaging of large arrays of detectors. Here, we introduce the through silicon vias (TSV) technology that replaces wire bonds and eliminates their shortcomings. We have successfully demonstrated the feasibility of implementing TSVs to existing ASIC wafers (a.k.a. a via-last process) developed for processing the x-ray signals from the x-ray imaging CdZnTe detectors on the Nuclear Spectroscopic Telescope Array small explorer telescope mission that was launched in 2012. While TSVs are common in the semiconductor industry, this is the first (to our knowledge) successful application for astrophysics imaging instrumentation. We expect that the TSV technology will simplify the detector assembly and thus will enable significant cost and schedule savings in assembly of large area CdZnTe detectors.

Through-holes micromachining of alumina using a combined pulse-feed approach in ECDM

ABSTRACT Micromachining of alumina has gained a lot of interest due to unique combinations of electrical resistivity and good thermal conductivity, thus being a potential substrate for microsystems packaging in high-power electronics. Creating multiple through-holes simultaneously in alumina is difficult due to its hard and brittle nature. In this article, the formation of multiple through-holes in a 425 µm thick alumina substrate is demonstrated for the first time using the combined pulse-feed approach of the ECDM process with multi-tip array tool to improve productivity. Initial experiments are conducted with a single-tip electrode to understand the effect of duty factor, pulse frequency, and feed rate. A combined pulse-feed approach is adopted to create deep microholes (>600 µm). Later, multiple through-holes are formed using 3 × 3 multi-tip array tool to achieve an average etch rate of 24 µm/min using the combined pulse-feed approach. A duty factor of 70% and a pulse frequency of 20 kHz are suggested for stable electrochemical discharge. A low feed rate (<1 µm/s) is recommended to avoid physical contact between the tool and workpiece. These multiple through-holes can be filled with electroplated copper to form 3D interconnects for upcoming radio-frequency MEMS applications.

An innovative MEMs peizo speaker

MEMs micro-speaker development has trailed behind MEMs microphone development by over two decades due to fabrication and acoustical challenges. While MEMs microphones only need to respond to minuscule displacement, generating sound energy requires both motor force and far higher volume velocity of the transducer mechanism. Recent development of a full bandwidth piezo-MEMs micro-speaker with a silicon diaphragm creates a rigid, light, fast responding transducer with high resistance to humidity and low thermal expansion. Fabricated using a monolithic MEMS semiconductor process eliminates calibration and driver matching. 20 Hz to 20kHz frequency response is delivered in occluded earbud, IEM, and hearing aid applications. The 20 kHz resonance peak provides a smoothly increasing response in the upper octaves. This extra amplitude allows for a significant increase in hearing aid gain and bandwidth over balanced armature transducers. The device is packaged in both top- and side-fire port configurations with earbud EVKs currently shipping. Integration of the amp, on the package substrate or SiP module, opens possibilities for more compact devices, longer battery life, lower cost, and more robust construction. The combination of audio fidelity, size, and speaker to speaker uniformity is not possible with traditional voice coil or hybrid MEMS approaches.

FE Simulation Model for Warpage Evaluation of Glass Interposer Substrate Packages

Glass interposer substrates have attracted growing interest as an alternative to traditional organic and silicon-based interposers for 3-D integrated circuit (IC) and 2.5-D through silicon via (TSV) packages in recent years. However, while glass substrates have the advantages of excellent electrical isolation, superior RF performance, good coefficient of thermal expansion (CTE) adjustability, and the potential for large-scale fabrication, they are inherently brittle. Consequently, an appropriate choice of glass and epoxy molding compound (EMC) material is essential for minimizing the warpage of the molded wafer. To facilitate the package design process, this study, therefore, develops an ANSYS simulation model to predict the warpage of the molded glass wafer given the use of different glass and EMC materials. The validity of the simulation model is confirmed by comparing the numerical results for the warpage of an 8-in molded glass wafer with the experimental measurements obtained using an Advanced Metrology Analysis (aMA) system. Single-factor-analysis experiments are then conducted to examine the effects of five different control factors, namely, the glass substrate thickness, the glass CTE, the glass modulus, the EMC CTE, and the EMC modulus, on the warpage performance of the molded glass wafer. The simulation results provide useful guidelines for the design of robust glass substrate packages.

Compact Filtering Balun With Wide Stopband and Low Radiation Loss Using Hybrid Microstrip and Substrate-Integrated Defected Ground Structure

In this letter, a novel hybrid microstrip and substrate-integrated defected ground structure (SIDGS) are proposed for filtering balun design. Coupled microstrip and SIDGS resonators can not only achieve 180° phase imbalance with filtering response but also realize wide stopband and wideband low radiation loss. In addition, the feature of stacked substrate packaging could reduce the size of the circuit and be flexible for integration. To verify this mechanism, a filtering balun operating at 3.08 GHz with 3-dB fractional bandwidth (FBW) of 45% is proposed based on hybrid microstrip and SIDGS, which exhibits the in-band amplitude- and phase-imbalances of ±0.5 dB and ±0.4°, respectively. The stopband extends to 18 GHz with the rejection level of 20 dB, whereas the measured total loss (i.e., including radiation, metal, and substrate loss) is less than 15% up to 15.3 GHz.

Effect of Diamond Particle Size on the Thermal Properties of Diamond/Al Composites for Packaging Substrate

Effect of Diamond Particle Size on the Thermal Properties of Diamond/Al Composites for Packaging Substrate

Die Crack Resolution through Pick-up Process Optimization for BGA Package

With the new devices and new technologies in the semiconductor industry are getting more challenging to process because issues are unavoidable especially on thin dies. The paper is focused on the improvement done on a ball grid array (BGA) substrate package assembly to address the quantity of rejection of die crack during die picking at the die attach process station. High pick force and high needle top height found out during the pick-up process is the main root cause of die crack. Parameter optimization particularly for die picking with the combination of pick force and needle top height parameter was done to eliminate this type of issue after the die attaches process. With the die attach process improvement, a reduction of 100 percent of die crack occurrence was successfully achieved. For future works, the improvement and learnings could be used for devices with similar constraints.

A Novel Defect Detection Algorithm for Flexible Integrated Circuit Package Substrates

Efficient fabrication and high reliability of flexible integrated circuit package substrates (FICS) urgently need effective defect detection methods. Based on the defect categories of FICS images, including yellow circuit backgrounds, film backgrounds with speckles, and black backgrounds, a novel rapid detection algorithm of impurity defects in FICS images is proposed. Three successive procedures are indispensable to realize the rapid detection with high accuracy, including image contrast enhancement based on image gray value analysis, obtaining the standard templates to weaken the texture interferences, and the probability calculation of the background feature of each pixel in the edge region between background and defect. Then, the accurate identification of film/black backgrounds and impurity defects in high-density FICS images is achieved. Furthermore, the comparisons of time–accuracy tradeoff obtained by using existing methods (Lk-means, Ostu, GMEM, SPCNN, MBGCT, FTC) and the proposed algorithm are carried out to experimentally verify the feasibility. The defect detection algorithm will facilitate a solution for the high similarity between the inherent texture features of FICS and external impurity defects at micrometer scale and substantially improve the detection accuracy and efficiency of high-density FICS, which will meet the real-time industrial requirement for the rapid fabrication of high-density FICS.

Influence on temperature distribution of COB deep UV LED due to different packaging density and substrate type

The thermal performance of a deep UV LED package in three different chip on board (COB) substrates was studied by finite element simulation. The relationship between the temperature of each component in different COB substrates and the packaging density of the deep UV LED was analyzed. Having the same size of a 1313 COB substrate, this study indicates that the aluminum substrate can adapt to a 0.38 W/mm2 packaging density at a maximum owing to the existence of an insulation layer, which has a low thermal conductivity. However, an alumina ceramic substrate can be adapted to a 0.94 W/mm2 packaging density. Aluminum nitride ceramic can meet the demand for a higher packaging density; however, the cost is a key factor which cannot be ignored for large-scale applications. The results of this study provide detailed suggestions for researchers and industrial use for the selection of COB substrates packaged with deep UV LED according to different packaging densities, which have a higher practical application value.

In-situ characterization up to 100 ​GHz of insulators used in new 3D “System in Package on board” (SiPoB) technologies

Insulating materials used for the packaging of integrated circuits play an important role in the electrical performance of the new System-in-Package (SiP), designed to support flows greater than 10 Gbits/s. These insulating materials must have a low relative permittivity and low dielectric losses up to several tens of GHz in order to insure the integrity of the propagated signals. In this paper the in-situ characterization of molding resins and core materials, used respectively for the encapsulation and the package substrate of chips of new 3D SiP on Board (SiPoB 3D), is carried out up to 100 ​GHz. These characterizations are performed after the manufacturing process (deposition, drying) of insulators and in their final conditions of use (thicknesses of a few microns, thinning, polishing) since their permittivity is highly dependent on the entire process. The characterization methodology is based on two original techniques: the analysis of the signal propagation on specially optimized CPW lines (coplanar lines) and the analysis of the reflection coefficient measured at the end of a CPW RF probe directly set down the surface of the insulator sample. This new technique makes it possible to overcome whole metallization steps required to achieve waveguide structures used in most material characterization techniques. In addition, the complex permittivity can be 2D-scanned on the entire surface area of the sample of material under test with our technique.

Evaluation of the Survivability of SARS-CoV-2 on Cardboard and Plastic Surfaces and the Transferability of Virus from Surface to Skin

Objective: To 1) characterize the decay curve of infective SARS-CoV-2 over time on the surface of cardboard packaging and plastic mailer packaging; 2) characterize the transferability over time of virus-inoculated cardboard packaging and plastic mailer packaging to skin. Methods: We inoculated samples of plastic and cardboard packaging with a titer of SARS-CoV-2 > 106 TCID50/ mL to evaluate the survivability and transferability to the skin (pig skin) over time. A cell culture-based infectivity assay (TCID50) was used to determine viral titers. Regression analysis was used to characterize decay curves. Results: The time that SARS-CoV-2 remained transferable to skin was reduced on both packaging substrates compared to the total time of survivability, though cardboard demonstrated a substantially larger reduction. Virus inoculated plastic substrates continued to transfer the virus to the skin after 7 hours of holding time and regression analysis predicts this transferability would remain detectable up to 9.5 hours of holding time. Inoculated cardboard substrates demonstrated detectable transfer at 15 minutes of holding time, but no viable virus could be detected on the skin after 30 minutes of holding time. Conclusions: The type of material used as a packaging substrate substantially modifies the potential for SARS-CoV-2 fomite transmission. The use of materials that limit fomite transmission from packaging should be considered among strategies to reduce the transmission of SARS-CoV-2. Future research should investigate the generalizability of these findings for other viral pathogens that potentially transmit via fomite.

Electronic module assembly

Electronics is the vital basis for innovations and the essential enabler for global trends like connectivity, electro mobility and renewable energies. These applications require high performance and reliability of the electronic modules. Their assembly combines very heterogeneous process chains like remarkable productive and diminutive surface mount technology (SMT), powerful and robust power electronic interconnection techniques, as well as pioneering reel-to-reel based organic electronic printing. After briefly outlining the enormous global economic impact of electronic modules, this paper presents the state of the art of electronic module assembly including substrate materials, electronic components, packaging and assembly processes as well as quality and reliability testing methods.

Extracting Wideband Dielectric Properties of Stacked Packaging Substrates Using Coaxial Airlines

This article is a study of dielectric characterization of packaging substrates using a 1.85-mm coaxial airline. To the authors’ knowledge, this is the first time that wideband dielectric properties have been demonstrated up to 67 GHz using a single coaxial airline. The algorithm used to extract the material properties is Chalapat’s reference-plane-invariant (RPI) method. The measurement system and the extraction method are validated using air as the material under test (MUT) with SOLT and offset calibration. Traditionally, a sample length of less than $0.5\lambda $ is recommended for material extraction. However, this lowers the accuracy of the material properties. We utilized the advantage of RPI to stack fixed thickness samples to increase the MUT length. This produces a flat response and improves the accuracy of the extracted dielectric constant and loss tangent. The HFSS simulation and the Debye model have been used to compare dielectric properties with measurement using this airline.

Glass Substrate With Integrated Waveguides for Surface Mount Photonic Packaging

Co-packaged optics in next-generation datacenters require the assembly of multiple components on the same multichip module (MCM) and interconnection with hundreds of optical fibers. A novel photonic packaging substrate is required to leverage high-throughput electronic assembly with high precision optical alignment. This report highlights the results of glass substrate optimization to include optical waveguides, a fiber connector, and chip interfaces, as well as features for electrical connectivity, as a potential component for a co-packaging solution. Glass with smooth surfaces and high precision alignment features enables surface mounted flip-chip assembly of electrical integrated circuits, photonic components, and optical fiber connectors. All components will be placed by vision alignment using precise fiducials or passive alignment in mechanical features to the surface of the glass substrate with optical and electrical interconnects. Flip-chip assembly of photonic components is enabled by evanescent coupling with couplers having a minimum non-linear taper length of 1.5 mm. The designed interface loss to the integrated ion-exchanged glass waveguides is less than 1 dB with an interface which is robust to lateral misalignment of up to 4 microns. Light can be transmitted in the glass substrate with a propagation loss of 0.1 dB/cm. Fiber interfaces are mechanically and thermally decoupled from the photonic component and glass waveguides can fan-out the component pitch from 50 to 250 microns of the MTP-16 ferrule connector. The solder reflow compatible connector receptacle is passively aligned and demonstrate with an average loss of 0.68 dB.

Integration of EMI Shielding Design for Substrate Package Isolation

This paper presents a modified substrate design that would enable a bottom electromagnetic interference (EMI) shielding protection for EMI sensitive integrated unit (IC). The modified substrate design is applied and incorporated to the existing and known shielding technique to fully proof the structure to external interference through the application of EMI shielding layer on the substrate configuration. The EMI shielding layer will be connected to the surface coating (EMI shielding) and ground channel of the substrate and the external board.

A 28 GHz and 60 GHz Dual-Band On-Chip Antenna for 5G-Compatible IoT-Served Sensors in Standard CMOS Process

In this communication, a dual-band on-chip meander-line monopole antenna is proposed and demonstrated for emerging fifth-generation (5G)-compatible Internet of Things (IoT)-served sensor nodes. The targeted 28/60 GHz compact antenna is a hybrid structure of meander-line monopole antenna and packaging substrate to both shield the antenna from its deployed environment and to enhance the antenna radiation efficiency as well as the gain over the two bands of interest. The antenna model and design analysis are presented in this work together with a fabricated and tested 65 nm bulk CMOS chip. The prototyped on-chip antenna exhibits a measured gain of −10 dBi at 28 GHz with a bandwidth of 5.3% and 0 dBi at 60 GHz with a bandwidth of 5.9%. A radiation efficiency of 45% and 30% is obtained at 28 and 60 GHz, respectively. The antenna occupies a space of $0.25\times0.3$ mm2 ( $\lambda /43\times \lambda /35.7$ at 28 GHz). The on-chip antenna solution proposed in this work addresses the highly desirable yet challenging overall design of future wireless systems (5G and beyond) which hit the mark on compactness, cost, and compatibility. In addition, this work provides a viable design platform for achieving frequency diversity and multifunctionality of future wireless involving power harvesting, data transfer, and sensing operation.

Thin Glass Handling Solutions for Microelectronics Packaging

Abstract Glass substrates with fine-pitch through-glass via (TGV) technology gives an attractive approach to wafer level packaging and systems integration. Glass can be made in very thin sheets (&amp;lt;100 um thick) which aids in integration and eliminates the need for back-grinding operations. Electrical and physical properties of glass have many attractive attributes such as low RF loss, the ability to adjust thermal expansion properties, and low roughness with excellent flatness to achieve fine L/S. Furthermore, glass can be fabricated in panel format to reduce manufacturing costs. The biggest challenge to adopting glass as a packaging substrate has been the existence of gaps in the supply chain, caused primarily by the difficulty in handling large, thin glass substrates using standard automation and processing equipment. This paper presents a temporary bonding technology that allows the thin glass substrates to be processed in a semiconductor fab environment without the need to modify existing equipment.

Dielectric and Underfill Characterization Using Cavity Resonators for Millimeter-Wave Applications

Having an accurate dielectric constant and loss tangent when creating radiofrequency (RF) models in full-wave simulation is essential. With the introduction of new low-loss dielectrics and with the variability of dielectrics due to the manufacturing process, there is a need for a quick and simple method to characterize the permittivity of these materials. Dielectric characterization has become even more critical with the rollout of 5G cellular communications. At the higher frequency bands of 5G, around 28 GHz and 39 GHz, the dielectric losses can be significant, and the package design can be sensitive to dielectric constant variations. In this letter, two dielectrics are characterized; a flip-chip underfill material and a low-loss dielectric. Cavity resonators are used to extract the dielectric constant and loss tangent of flip-chip underfill, while substrate integrated waveguide (SIW) resonators are used to characterize packaging substrates. Simulations and extractions of the dielectric constant and loss tangent are completed at several frequencies using an in-house tool called Kappa Extractor, based on a rapid plane solver. The results are verified with a commercial full-wave simulator.

A Chip-First Microwave Package Using Multimaterial Aerosol Jet Printing

We show in this article two fully additively manufactured microwave packages with integrated active and passive components. Packages were constructed using a chip-first approach where package substrates (dielectrics) and interconnects (conductors) are built up around power amplifier bare die attached to carriers. Bypass capacitor dielectrics were printed using multimaterial aerosol jet printing, where aerosols of barium titanate and polyimide inks are mixed in place to fabricate a high dielectric constant polymer matrix nanocomposite film. The material properties of the film are characterized using three printed capacitors. We present S-parameter measurements to characterize small-signal performance, as well as load-pull measurements at the saturated output power. Finally, we demonstrate package performance after power cycling and temperature cycling to show the effect of aging on the part and the robustness of this packaging strategy. We measured a maximum packaged gain of 21.7 dB and a saturated output power of 21.9 dBm for a commercial-off-the-shelf (COTS) medium power amplifier specified to have a gain of 22 dB and a saturated output power of 22 dBm. The printed package-level performance is compared with the published bare die performance and a measured COTS packaged amplifier.

Scalable Manufacturing of MXene Films: Moving toward Industrialization

Industry-scale manufacturing techniques hold the key to the ultimate commercialization of MXene products. In Matter, Taylor, Gogotsi, and colleagues demonstrate a drop-casting method to prepare scalable and micro-patternable MXene films on hydrophobic substrates, highlighting the excellent potential for the commercial application in electromagnetic interference shielding.