On-wafer S-parameter Measurements Research Articles

Direct observation of radio-frequency negative differential resistance in GaN-based single drift region IMPATT diodes

We report the direct observation of radio-frequency negative differential resistance, via on-wafer S-parameter measurements, in GaN-based impact ionization avalanche transit time (IMPATT) diodes. Clear signatures of reflection gain are observed from 18.7 to 30.6 GHz. These observations have been made possible by suppressing the reverse leakage current (and thereby parasitic shunt conductance) by optimization of the fabrication process, in conjunction with the use of pulsed measurements to suppress device self-heating. Consistent with avalanche-dominated behavior, the measured DC reverse bias current–voltage measurements show a positive temperature coefficient of breakdown. For the high-frequency on-wafer characterization, pulsed-bias S-parameter measurements with low (0.0067%) duty cycle were used to mitigate thermal effects. The measured avalanche frequency aligns closely with theoretical predictions based on Gilden and Hines' small signal model [Gilden and Hines, IEEE Trans. Electron Devices ED-13(1), 169–175 (1966)], measured impact ionization coefficients [Cao et al., Appl. Phys. Lett. 112(26), 262103 (2018)], and experimental saturation velocity measurements [Bajaj et al., Appl. Phys. Lett. 107(15), 153504 (2015)]; this excellent agreement confirms IMPATT operation and provides insights needed to further optimize device performance.

Temperature-dependent DC and small signal performance of InGaAs/InP DHBT

Temperature-dependent DC and small-signal analysis have been carried out on 0.7 μm × 15 μm InGaAs/InP double heterojunction bipolar transistors over a temperature range of 25 °C–125 °C by on-wafer S-parameter measurements up to 50 GHz. The thermal behavior of DC and equivalent circuit parameters along with their temperature coefficients were analyzed and reported for the first time using the same InP-based DHBT. Most of the DC parameters show a negative with temperature, for example the temperature coefficients of the VBE,on and VBC,on are −1.4 and −1.48 mV/°C, respectively. And the peak current gain declined from 44.04 to 36.09 with the temperature increased from 25 °C to 125 °C. On the other hand, most of the small-signal parameters show a positive trend with temperature, except for the intrinsic base resistance Rbi, intrinsic base–collector capacitance Cbc, intrinsic base–emitter capacitance Cbe, and common-base current transport factor α0. The results will provide valuable references and insights for future design optimizations of temperature susceptible circuits.

Extraction of small-signal equivalent circuit for de-embedding of 3D vertical nanowire transistor

In this paper, we present an improved methodology to extract the small-signal electrical equivalent circuit of the parasitic elements using RF test structures for a 3D vertical nanowire transistor technology. The methodology is based on the extraction of the distributed parasitic elements from an open structure for which on-wafer S-parameter measurements were carried out up to 40 GHz. The electrical equivalent circuit of the passive device was then used for de-embedding of the transistor S-parameters for extraction of intrinsic small-signal parameters such as the gate capacitances.

Monte Carlo Analysis of Measurement Uncertainties for On-Wafer Multiline TRL Calibration Including Dynamic Accuracy

The multiline thru-reflect-line (TRL) calibration algorithm model is used to determine the error sources and uncertainties for on-wafer S-parameter measurements, and the uncertainty source is presented in a diagrammatic form. The quantitative contribution of each input error source to the S-parameter of the device under test (DUT) is obtained through the Monte Carlo method. Through analysis, it is found that the dynamic accuracy of the vector receiver as an ignored source of uncertainty makes a significant contribution to the amplitude of transmission coefficients and large reflection coefficient of the on-wafer S-parameters. Finally, the influence of dynamic accuracy measurement error on the DUT with different reflection coefficients is studied.

A Comparative Study of On-Wafer and Waveguide Module S-Parameter Measurements at D-Band Frequencies

In this paper, we present a comparative study of S-parameter measurements of electronic components on planar substrates performed with a waveguide module and in a conventional on-wafer probing environment. Measurements were conducted at three well-established measurement laboratories for the investigation of reproducibility at frequencies from 110 to 170 GHz. For the comparison, we fabricated waveguide modules for six passive structures, including devices under test (DUTs). Four of these structures are related to using a second tier calibration to achieve the same reference planes for the waveguide module measurements as used for the on-wafer probing measurements. Additionally, we processed three complete on-wafer calibration sets, including DUTs, equipped with different probe-to-pad interfaces. In this comparison, the DUT measurement from the waveguide module acts as a reference standard, with reduced crosstalk behavior in comparison to the on-wafer measurement. With the waveguide reference, we are able to assess the ability of two techniques to compensate for crosstalk and higher order modes influencing the on-wafer S-parameter measurements. On the one hand, we use a shielded probe-to-pad transition and on the other hand, we use an algorithm-based crosstalk correction scheme. To the best of our knowledge, this is the first time that such a comparison has been undertaken, comparing well-established waveguide calibrations with an equivalent on-wafer calibration.

Traceable Coplanar Waveguide Calibrations on Fused Silica Substrates up to 110 GHz

In this paper, we present a comprehensive uncertainty budget for on-wafer S-parameter measurements of devices on a custom-built fused silica wafer, including instrumentation errors, connector repeatability, and calibration standard uncertainties. All major steps toward achieving traceability with the aid of a multiline thru-reflect-line calibration for the given measurement scenario are explained. For the first time, it is now possible to compare against each other the relative importance of different sources of uncertainty in on-wafer measurements. Results are shown for three typical devices with varying reflection and transmission characteristics.

A New SOLT Calibration Method for Leaky On-Wafer Measurements Using a 10-Term Error Model

We present a new short-open-load-thru (SOLT) calibration method for on-wafer S-parameter measurements. The new calibration method is based on a 10-term error model which is a simplified version of the 16-term error model. Compared with the latter, the former ignores all signal leakages except the ones between the probes. Experimental results show that this is valid for modern vector network analyzers. The advantage of using this 10-term error model is that the exact values of all error terms can be obtained by using the same calibration standards as the conventional SOLT method. This avoids not only the singularity problem with approximate methods, such as least squares, but also the usage of additional calibration standards. In this paper, we first demonstrate how the 10-term error model is developed, and then, the experimental verification of the theory is given. Finally, a practical application of the error model using a 10-dB attenuator from 140 to 220 GHz is presented. Compared with the conventional SOLT calibration method without crosstalk corrections, the new method shows approximately 1-dB improvement in the transmission coefficients of the attenuator at 220 GHz.

InGaAs/AlAs Resonant Tunneling Diodes for THz Applications: An Experimental Investigation

This paper presents an experimental study of InGaAs/AlAs resonant tunneling diodes designed to improve the diode characteristics using five different device structures. A promising high peak to valley current ratio of 5.2 was obtained for a very low current density device. As expected, the measured results show a significant increase in the current density with thinner barriers and quantum well widths. This is, however, at the expense of an increase in the peak voltages for high peak current density devices. A 36-mV/ $\mu$ m2 voltage deviation was found for a diode with a peak current density of 10.8 mA/ $\mu$ m2 that we attribute to self-heating of the diodes, and which were confirmed using pulsed dc voltage tests. To demonstrate how the self-oscillation at low frequency can be eliminated, a 25 $\Omega$ resistor was integrated in parallel with the diodes. The experimental findings suggest that the partially stabilizing resistor is limited by the absolute value of the negative differential resistance. The equivalent circuit of the diodes was validated using on-wafer S-parameter measurements up to 40 GHz. An estimated high frequency operation limit of 2.7 THz was deduced for RTD sample #327.

Small signal modeling of HEMTs AlGaN/GaN/SiC for sensor and high-temperature applications

Thermal and small-signal model parameters analysis have been carried out on 0.25 mm×(2×140μm) AlGaN/GaN HEMT grown on SiC substrate. Two different technologies are investigated in order to establish a detailed understanding of their capabilities in terms of frequency and passivation using on-wafer S-parameter measurement at the temperature 300K.The knowledge of the elements in the small-signal equivalent circuit of such devices is crucial for a reliable design analog circuit; this paper contains the results of the application an improved method for the extraction of intrinsic and extrinsic parameters of the small-signal model from S-parameter measurements on a silicon carbide substrate and the influence of passivation on these parameters. The result provides some valuable insights for future design optimizations of advanced GaN technology.

Small signal model parameters analysis of GaN and GaAs based HEMTs over temperature for microwave applications

Thermal and small-signal model parameters analysis have been carried out on 0.5μm×(2×100μm) AlGaAs/GaAs HEMT grown on semi-insulating GaAs substrate and 0.25μm×(2×100μm) AlGaN/GaN HEMT grown on SiC substrate. Two different technologies are investigated in order to establish a detailed understanding of their capabilities in terms of frequency and temperature using on-wafer S-parameter measurement over the temperature range from −40 to 150°C up to 50GHz. The equivalent circuit parameters as well as their temperature-dependent behavior of the two technologies were analyzed and discussed for the first time. The principle elevation or degradation of transistor parameters with temperature demonstrates the great potential of GaN device for high frequency and high temperature applications. The result provides some valuable insights for future design optimizations of advanced GaN and a comparison of this with the GaAs technology.

On the Accurate Measurement and Calibration of S-Parameters for Millimeter Wavelengths and Beyond

It is well known that, in the millimeter (mm-wave) and sub-mm-wave range, on-wafer S-parameter measurements are often inaccurate and suffer from serious systematic artifacts. In this paper, we confirm that these artifacts are related to spurious wave modes that are excited and propagate in the substrate. These parasitic wave components may be scattered at neighboring structures on the wafer and cause detrimental crosstalk. While these parasitic components deteriorate the measurement itself, an even more serious complication arises from the fact that these modes are already present in the calibration measurement and are unintentionally imported and superposed to the measurement data. In this paper, we present a new type of RF pad with novel screening features and show that these parasitic modes can be efficiently suppressed by the use of proper on-wafer couple structures. Moreover, a novel calibration substrate and method is presented and demonstrated to be capable to remove spurious artifacts from S-parameter measurements up to 450 GHz.

A Non-Contact Submillimeter-Wave $S$-Parameters Measurement Technique for Multiport Micromachined Devices

This paper presents a novel non-contact broadband on-wafer S-parameter measurement technique for submillimeter-wave and terahertz applications. The proposed method enables S-parameters measurement of multi-port micromachined devices using a two-port measurement setup. In this method, a small fraction of the signal at each waveguide port is weakly coupled to free space using a small array of reflection-canceling slots which are then measured by an open-ended waveguide probe. The S-parameters of the device-under-test are calculated from the measured signals obtained from each port and from that of a reference match waveguide. A broadband waveguide slot array antenna with high return loss is designed as a matched load to terminate all ports of the device except the input port. To assess the reliability and accuracy of the proposed measurement method, three different micromachined waveguide directional couplers are designed, fabricated, and tested. Multiple apertures on the common wall between the adjacent waveguides are designed and optimized to achieve high directivity couplers over a broad frequency range. The measured S-parameters of the couplers are shown to be in good agreement with the simulations, which indicates the accuracy of the proposed measurement method.

Ultrawide Bandwidth Chip-to-Chip Interconnects for III-V MMICs

Ultrawide bandwidth coplanar waveguide interconnects between GaAs chips based on a novel fabrication process are demonstrated. Fabricated structures on 100 μm thick GaAs chips exhibited chip-to-chip insertion losses below 1 dB up to 110 GHz, and below 2.2 dB up to 220 GHz from on-wafer S-parameter measurements. A return loss larger than 10 dB from 100 MHz to 220 GHz was measured. The measured responses are consistent with numerical simulations, including the effects of excess solder at the chip-to-chip interface. Numerical simulations indicate that further improvements in performance, with insertion losses as low as 1.1 dB at 220 GHz, should be possible by minimizing the excess solder.

The Microwave Characteristics of an In0.4Ga0.6As Metal-Oxide-Semiconductor Field-Effect Transistor with an In0.49Ga0.51P Interfacial Layer

A high microwave performance enhancement-mode (E-mode) In0.4Ga0.6As channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a Si-doped In0.49gGa0.51P interfacial layer is fabricated. A 0.8-μm-gate-length In0.4Ga0.6As MOSFET with a 5-nm Al2O3 dielectric layer provides a current gain cutoff frequency of 16.7 GHz and a maximum oscillation frequency of 52 GHz. A semi-empirical small-signal-parameter extraction technique accounting for the low frequency anomaly of this MOSFET device is described, which is based on on-wafer S-parameter measurements. Excellent agreement between measured and simulated scattering parameters as well as the physically realistic circuit elements demonstrates the validity of this approach.

Modeling and parameter extraction of test fixtures for MOSFET on-wafer measurements up to 60 GHz

We present a circuit model and parameter determination methodology for test fixtures used for on-wafer S-parameter measurements on CMOS devices. The model incorporates the frequency dependence of the series resistances and inductances due to the skin effect occurring in the metal pads. Physically based representations for this effect allow for excellent theory-experiment correlations for different dummy structures, as well as when de-embedding transistor measurements up to 60 GHz. © 2012 Wiley Periodicals, Inc. Int J RF and Microwave CAE 23: 655–661, 2013.

Sub-Micron Area Heterojunction Backward Diode Millimeter-Wave Detectors With 0.18 ${\rm pW/Hz}^{1/2}$ Noise Equivalent Power

InAs/AlSb/AlGaSb heterojunction backward diodes are promising detectors for millimeter-wave imaging applications due to their high sensitivity, low noise, and high cutoff frequency. By using a device heterostructure with a thin (11 Å) barrier layer, δ-doped cathode, and optimized AlxGa1-xSb anode composition (x=12%), in conjunction with submicron (0.4×0.4 μm2) active area, fabricated detectors have demonstrated DC curvatures of -47 V-1 and record unmatched sensitivities of 4600 V/W at 94 GHz. Impedance-matched sensitivities of 49,700 V/W at 94 GHz are projected from on-wafer S-parameter and sensitivity measurements. These detectors have measured junction resistances of 814 Ω·μm2 and capacitances of 15 fF/μm2. A record low NEPmin of 0.18 pW/Hz1/2 has been projected under conjugate matching conditions. This study demonstrates the potential of Sb-heterostructure backward diodes as ultra-low-noise millimeter-wave direct detectors.

De-embedding method for on-wafer RF CMOS inductor measurements

In this work, an accurate de-embedding method for on-wafer RF measurements of CMOS large area devices like the inductors is presented. The method uses distributed and lumped-element models to represent the parasitic elements. The interconnect parasitics are calculated using the transmission line theory. The proposed method is compared to existing de-embedding methods. The validity of the method is checked with the DC resistance value of the interconnects as calculated from the layout and as extracted from measurements, as well as with inductance results of the fabricated inductor, extracted from measurements and from electromagnetic simulations. On-wafer S-parameter measurements have been taken from a test chip up to 20GHz.

Submillimeter-Wave InP MMIC Amplifiers From 300–345 GHz

In this letter, we describe the design, fabrication, simulation, and measured performance of a single-stage and three-stage 320 GHz amplifier using Northrop Grumman Corporation's (NGC) 35-nm InP high electron mobility transistor submillimeter-wave monolithic integrated circuit (S-MMIC) process. On-wafer S-parameter measurements using an extended waveguide band WR3 vector network analyzer system were performed from 210-345 GHz. We measured 5 dB of gain for the single-stage amplifier at 340 GHz and 13-15 of gain from 300-345 GHz for the three-stage S-MMIC amplifier.

Analytical Model and Parameter Extraction to Account for the Pad Parasitics in RF-CMOS

A model which considers the pad parasitic effects when performing on-wafer S-parameter measurements on microwave devices fabricated on silicon substrates is presented. The model parameters are directly determined using a simple and analytical measurement-based method, allowing the electrical representation of the complete test structure using an equivalent circuit. The validity of the model is verified by achieving excellent agreement between simulated and experimental data up to 55GHz. In addition, a recently reported simplified deembedding procedure is improved and compared to a conventional one to study its validity as frequency increases.

RF equivalent‐circuit model of interconnect bends based on S‐parameter measurements

AbstractA modified model for RF interconnect bends on lossy substrate in CMOS technology is presented. The model parameters are extracted directly from the on‐wafer S‐parameter measurements. The accuracy is verified up to 20 GHz by the measurements of the test structures. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 45: 170–173, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20760