On-chip Automatic Frequency Tuning Research Articles

A CMOS Gm—C complex filter with a reconfigurable center and cutoff frequencies in low-IF WiMAX receivers

This paper presents a reconfigurable fifth-order complex Gm—C filter for different data rates in low-IF WiMAX applications. The design procedure and linearized measures to realize the complex filter are described. In order to achieve the reconfigurability of bandwidth window, the center frequency and the cutoff frequency filter are adjusted simultaneously by changing capacitor values while keeping transconductors unchanged. Also, the filter integrates an on-chip automatic frequency tuning circuit based on a PLL. Experimental results show that it has an IRR of 32 dB, a THD of −43 dB, and an input-referred noise of 21 μVrms. The chip is fabricated in 0.13 μm CMOS process, occupies 0.7 × 1 mm2, and consumes 4.8 mA current from a 1.2 V power supply.

A 1.8-V, 5-mA reconfigurable analog baseband circuit for low-IF multi-mode multi-band receivers

A 1.8-V, 5-mA reconfigurable analog baseband circuit for low-intermediate frequency multi-mode multi-band receivers is presented. It consists of four fixed-gain amplifiers, four programmable gain amplifiers, a complex band-pass filter (CBPF) with reconfigurable bandwidth and a received signal strength indicator (RSSI). CBPF is implemented as the third-order Bessel active resistor–capacitor structure to provide the image rejection with flat group delay, and one on-chip automatic frequency tuning circuit is utilised to set the accurate frequency characteristics and overcome the effects of the process and temperature variations. The reconfigurable analog baseband circuit has been implemented in 0.18 µm complementary-symmetry metal–oxide–semiconductor. The measured results show that the presented circuit could provide 34 dB variable gain, 2 MHz/1 MHz/0.5 MHz reconfigurable bandwidth and accurate RSSI indicator. The analog baseband circuit is powered with a 1.8-V supply and totally draws a current of 5 mA.

A Simple On-Chip Automatic Tuning Circuit for Continuous-Time Filter

A simple on-chip automatic frequency tuning circuit is proposed. The tuning circuit is modified from voltage-controlled filter (VCF) frequency tuning circuit. We utilize an operational transconductance amplifier and a capacitor to from a single-time constant (STC) circuit which can produce a controllable delay time clock to tune the frequency of the filter. It can efficiently reduce the deviations in the 3 dB bandwidth from the variations of PVT (Process, Voltage and Temperature). The design of the STC circuit is simpler than VCF and it has less chip area. The chip has been implanted using TCMC 0.35 μm CMOS technology and the power consumption is less than 9.05 mW.

A highly linear CMOS G/sub m/-C bandpass filter with on-chip frequency tuning

A fourteenth-order CMOS transconductance-C (G/sub m/-C) bandpass filter with on-chip automatic frequency tuning is described. By using highly linear G/sub m/-C integrators, the filter achieves 75 dB dynamic range over 700 kHz noise bandwidth. The measured intermodulation distortion (IM3) @ 600 kHz for a 4 V/sub pp/ input signal is only -61 dB. On-chip automatic frequency tuning provides more than 300% center frequency range (i.e., 165-505 kHz) of the filter with /spl plusmn/1% frequency accuracy. The 0.7-/spl mu/m CMOS filter measures 4.8 mm/sup 2/ and consumes 70 mW from a single 5 V power supply.