Normally-off SiC JFET Research Articles

Operation of 4H-SiC high voltage normally-OFF V-JFET in radiation hard conditions: Simulations and experiment

Operation of high-voltage 4H-SiC vertical-JFET in radiation hard environment was investigated by simulation and experiment. Commercial 1700V normally-OFF SiC JFETs in TO-247 package were irradiated with fast neutrons to fluences of 4.0×1014cm−2 (1MeV Si equivalent) and the effect of radiation on their characteristics was then thoroughly analyzed. Four degradation mechanisms were identified, of which the most important is the increase of JFETs ON-state resistance due to the mobility degradation and removal of carriers from transistor's light doped channel and drift regions. As a result, the JFET ON-state losses grow and, at fluences higher than 4×1014cm−2, the low doped n-regions are fully compensated and transistor loses its functionality. On the contrary, irradiation slightly improves JFET's switching characteristics. The effect of neutron irradiation on operation of SiC V-JFET in a real application was then investigated on the step-UP 15V/60V DC-DC converter where the SiC JFET was used as an active switch. Converter characteristics were analyzed by means of the mixed-mode simulation using the developed 2D model of the neutron irradiated transistor. Results showed that the duty cycle of the PWM regulator is growing due to the increase in the voltage drop on the switching JFET. This effect, which is caused by the abovementioned increase the JFET's ON-state resistance, increases power dissipation and deteriorates converter efficiency. Finally, the effect of neutron irradiation on operation SiC V-JFET in the 850V/24V auxiliary flyback switching mode power supply was analyzed. We showed that the growth of the ON-state resistance increases transistor's conduction losses and decreases converter efficiency. Exceeding the fluence of 3.3×1014cm−2 neutrons then causes JFET overheating and subsequent destruction.

Experimental and Analytical Performance Evaluation of SiC Power Devices in the Matrix Converter

With the commercial availability of SiC power devices, their acceptance is expected to grow in consideration of the excellent low switching loss, high-temperature operation, and high-voltage rating capabilities of these devices. This paper presents the comparative performance evaluation of different SiC power devices in the matrix converter at various temperatures and switching frequencies. To this end, first, gate or base drive circuits for normally-off SiC JFET, SiC MOSFET, and SiC BJT by taking into account the special demands for these devices are presented. Then, four two-phase to one-phase matrix converters are built with different Si and SiC power devices to measure the switching waveforms and power losses for them at different temperatures and switching frequencies. Based on the measured data, four different SiC and Si power devices are compared in terms of switching times, conduction and switching losses, and efficiency at different temperatures and switching frequencies. Furthermore, a theoretical investigation of the power losses of the three-phase matrix converter with normally-off SiC JFET, SiC MOSFET, SiC BJT, and Si IGBT is described. The power losses estimation indicates that a 7-kW matrix converter would potentially have an efficiency of approximately 94% in high switching frequency if equipped with SiC devices.

Characteristics and Application of Normally-Off SiC-JFETs in Converters Without Antiparallel Diodes

In this paper, reverse characteristics of vertical-channel SiC-JFETs similar to an equivalent diode are discussed and compared with an actual SiC-SBD. The relationship between the reverse conduction voltage and the applied gate-to-source voltage is extracted along with channel structure of JFETs. Experiments involving operation of normally-off SiC-JFETs in actual converters are then conducted with and without antiparallel SiC-SBDs at different temperatures. The issue of JFET channel mistriggering is observed and evaluated by introducing extra negative gate bias during the switch-off state. Excellent dynamic performance can be obtained with minimal reverse-recovery charge when the SiC-JFET is driven properly. The dynamic losses are then calculated in different conditions. The results indicate that SiC-JFETs can perform the function of antiparallel diodes with minimal performance sacrifice in converters. Furthermore, an actual SiC-JFET-based dc-dc converter with/without antiparallel SiC-SBDs is built to verify the influence of eliminating the external diodes. It is concluded that with slight modification in the gate driver circuit to maintain safety, antiparallel diodes could be eliminated in vertical-channel SiC-JFET-based applications.

High-Speed Drive Circuit with Separate Source Terminal for 600 V / 40 A Normally-off SiC-JFET

When using JFETs with a threshold voltage lower than 2 V in a power supply system or inverter system, a high-speed drive circuit capable of precisely controlling the gate current and a mounting method are important to reduce the switching loss. In this paper, a drive circuit of a normally-off SiC-JFET with a separate source terminal is proposed and the effects are evaluated. By dividing the common source inductance and applying the speed-up capacitor, the turn-on time and turn-on energy losses can be decreased by 40% and 60%, respectively. A speed-up capacitor larger than 100 nF greatly decreases the rising time (tr) and turn-on energy losses. By applying the developed normally-off SiC-JFETs and proposed gate driver to PFC circuits and DC/DC circuits, a highly efficient power supply will be achieved.

Unclamped repetitive stress on 1200 V normally-off SiC JFETs

An experimental characterization of new-generation normally-off vertical channel 1200V SiC JFETs under unclamped repetitive stress (URS) is presented. The drain and gate leakage currents are monitored, and their time evolution is recorded.The degradation of the leakage characteristics has been compared with repeated short circuits tests, at the same stress energy, thus demonstrating that different mechanisms take place in these conditions. Furthermore, a post-failure analysis of the surface of the device by means of a optic microscope indicates that a termination weakness could be the major cause for the device leakage increment and consequent failure.

Operation of SiC normally-off JFET at the edges of its safe operating area

The paper presents the results of an experimental characterization about the operation of the last-generation normally-off SiC JFETs at the edges of their safe operating area. Short circuit and unclamped turn-off operations have been investigated by means of a nondestructive experimental set up where the device is switched in the presence of a protection circuit capable of limiting the energy dissipated on the device after the failure occurrence. The experimental results confirm the very good performances of the device in short circuit for which the failure can be associated only to the increase of the temperature over the limits imposed by the surface metallization. A different scenario appears for the unclamped tests where a second breakdown occurs after a quite long avalanche phase followed by the device failure. It is demonstrated that the duration of the avalanche phase depends on the temperature of the device under test. The damaged area after an avalanche failure is localized at the edge termination of the device and, in particular, at the corner between source and gate metallization.

A performance comparison of normally-off and normally-on SiC JFETs toward use in high-temperature power modules

The high-temperature static and dynamic characteristics of the new 1200 V, 45 mΩ, 9 mm2 depletion-mode SiC vertical trench junction field-effect transistor (vtJFET) are compared with those of a 1200 V, 50 mΩ, 9 mm2 enhancement-mode SiC vtJFET. It is shown that both devices are fully capable of high-temperature operation and that each type has its own unique advantages. For applications operating in extreme high-temperature environments, the larger saturation current (~2.5x) and lower on-state resistance (~150 mΩ at 250 °C) of the depletion-mode SiC vtJFET provide very attractive performance at temperatures beyond silicon's fundamental limitations. In addition, operating the normally-on vtJFET at VGS less than 2 V reduces the gate drive's current requirements to a negligible level, which is an important design factor for high-temperature power modules that use multiple die in parallel.

System Improvements of Photovoltaic Inverters with SiC-Transistors

In this paper the system improvements of PV-inverters with SiC-transistors are demonstrated. The basic characteristics of engineering prototypes of normally-off SiC-JFETs and SiC-MOSFETs were measured and their differences in the application are considered. To demonstrate the improvement in PV-inverter performance, a 5 kW single-phase and a three-phase full bridge inverter with normally-off SiC-JFETs were developed at Fraunhofer ISE. Different switching frequencies up to 144 kHz were applied and the impact on production costs and inverter performance was rated under the aspects of an industrial product development. This means, the influences on the efficiency and power density. In this work, a world record in PV-inverter efficiency of 99 % was achieved in a single-phase inverter and for the three-pase inverter, the power density was tripled with respect to commercially available state of the art PV-inverters.

Applications of SiC-Transistors in Photovoltaic Inverters

Currently there are several silicon carbide (SiC) field effect or bipolar transistor types in development with normally-on and normally-off characteristics. It is not yet clear, which transistor type will prevail in the market and which will remain a niche product. This is not only determined by their electrical characteristics, but also by their acceptance by engineers. In this paper the implementation and the performance of 1200 V / 20 A / 100 m SiC-DMOSFETS and 1200 V / 12 A / 125 m normally-off SiC-JFETs in photovoltaic inverters (PV-inverters) is shown.

High-Temperature SOI/SiC-Based DC-DC Converter Suite

A complete design strategy (mechanical and electrical) for a 25 W 28 V/5 V dc-dc converter utilizing SiC and SOI electronics is presented. The converter includes a high-temperature SOI-based PWM controller featuring 150 kHz operation, a PID feedback loop, maximum duty cycle limit, complementary or symmetrical outputs, and a bootstrapped high-side gate driver. Several passive technologies were investigated for both control and power sections. Capacitor technologies were characterized over temperature and over time at 300C∘, power inductors designed and tested up to 350C∘, and power transformers designed and tested up to 500C∘. Northrop Grumman normally-off SiC JFETs were used as power switches and were characterized up to 250C∘. Efficiency and mass optimization routines were developed with the data gained from the first prototype. The effects of radiation on SiC and SOI electronics are then discussed. The results of the first prototype module are presented, with operation from 25C∘ up to an ambient temperature of 240C∘.