Neutral Point Voltage Balance Research Articles

An Enhanced Model Predictive Control Using Virtual Space Vectors for Grid-Connected Three-Level Neutral-Point Clamped Inverters

Reliability of power systems can be improved by the use of voltage source inverters (VSIs) with fast dynamic control, which can handle uncertainties induced by renewable energy resources and nonlinear loads. To ensure fast-dynamic response and simplified controller design, various model predictive control (MPC) methods are investigated in this paper. In the conventional MPC design for three-level VSIs, the cost function requires an additional term to ensure the balance of the neutral-point voltage (NP-V), which however can considerably impact the main goal of the MPC. To address this issue, an enhanced MPC using virtual space vectors is proposed, which allows the use of a significantly reduced weighting factor for the term in the cost function for NP-V balancing, while retaining fast-dynamic response. Additionally, the proposed MPC leads to reduced harmonic distortion in the VSI output voltage and current. Both simulation and controller hardware-in-the-loop studies are performed to demonstrate the effectiveness of the proposed enhanced MPC in an operating microgrid under both steady-state and fast-transient conditions.

An Extended DPWM Strategy With Unconditional Balanced Neutral Point Voltage for Neutral Point Clamped Three-Level Converter

According to different clamping methods, nine modes (C_MODE1-9) of the traditional discontinuous pulsewidth modulation (DPWM) for neutral-point-clamped three-level converter have been revealed. Since traditional DPWM cannot balance neutral point (NP) voltage under the full range of modulation index (MI) and power factor (PF), two extended modes (E _MODEs) are proposed in this paper, which can balance NP voltage. The proposed extended discontinuous pulsewidth modulation (EDPWM) is characterized by using C_MODEs and E_MODEs alternately.Therefore, EDPWM can balance NP voltage under the full range of MI and PF. Since the switching numbers under C_MODE and E_MODE in one switching cycle are two and three, respectively, the switching loss under EDPWM is lower than that under other pulsewidth modulation (PWM) strategies. The performance of EDPWM is analyzed and compared with traditional DPWM, space vector PWM (SVPWM) and virtual SVPWM (VSVPWM) in terms of switching loss, waveform quality, and the ability of NP voltage control. Finally, the feasibility and superiority of the proposed method are verified by experiments.

Simplified double switching SVPWM implementation for three‐level VSI

A generalised space vector pulse width modulation (SVPWM) framework for the realisation of all double switching states with a memory-optimised method is proposed to reduce the total harmonic distortion (THD) and to provide neutral point voltage balancing for three-level NPC voltage source inverter (VSI). The proposal provides an efficient SVPWM implementationwith reduced hardware requirement and zero increase in software complexity in comparison to the existing schemes. Microcontroller analogue-to-digital converter (ADC) hardware replaces multichannel ADC and associated Field programmable gate array hardware in this proposal. The proposed method follows digital control architecture and eliminates the need to sample phase voltages separately. The proposed algorithm samples rms voltage of one phase and generates eight bit modulation index command by a suitable compensation algorithm. The implemented SVPWM algorithm takes the modulation index command value and generates phase voltage values by multiplying with the stored sine angle values. Gate pulses are generated in the proposed implementation by the hardware pulse width modulation (PWM) block and there is no need for digital-to-analogue converter. The proposed strategy is validated with a fundamental frequency of 50 Hz on a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI using low-cost PIC microcontroller. The superiority of the proposed method lies in providing an efficient three-level SVPWM implementation with reduced THD, neutral point voltage balancing, reduced hardware requirement, small lookup table and zero increase in the software computing overhead.

A Generalized Design Framework for Neutral Point Voltage Balance of Three-Phase Vienna Rectifiers

This paper proposes a generalized design framework for three-phase Vienna rectifiers to handle the neutral point voltage balance issue. On the basis of the design framework, it is convenient to construct various neutral point voltage balancing methods with the guarantee of stability. As demonstration, three representative neutral point voltage balance approaches are presented by choosing different zero-sequence voltages. A comprehensive comparison among the three approaches is given in the aspects of input current quality, capacitor voltage fluctuation, and system efficiency. The comparison results provide guidance for constructing the most appropriate approach based on the specific requirement. Finally, simulation and experimental results verify the correctness and effectiveness of the presented approaches and the related performance analysis.

A Simplified Common-Mode Voltage Suppression and Neutral-Point Potential Control for the NPC Three-Level Inverter

Neutral-point potential unbalancing is an inherent disadvantage of NPC three-level inverter. Traditional control methods, e.g. the space vector PWM (SVPWM) considering balance factor or the model predictive control (MPC), usually needs large amounts of calculation and the common-mode voltage usually keeps large due to the zero vectors being involved in the modulation or the roll optimization. Aiming at above problems, this paper proposes a simplified model predictive algorithm based on the characteristics analysis on the unbalancing and common-mode voltage. Firstly, an approximate two-level structure containing 12 vectors is proposed by the reduced-order processing for the three-level structure, which solves the calculation complexity problem. Meanwhile, multi-constraints including switching frequency, neutral-point potential deviation and the common-mode voltage, are constructed within the roll optimization items of the MPC scheme to make common-mode voltage being restricted less than 1/6 DC voltage while the switching frequency is almost constant. Finally, experiments were carried out to verify that this method can realize a neutral-point voltage balance and a low common-mode voltage along with less execution time.

Two-Layer Pulsewidth Modulation Strategy for Common-Mode Voltage and Current Harmonic Distortion Reduction in Vienna Rectifier

Vienna rectifier, which is a nongenerative-boost-type rectifier, is widely used in industrial applications, such as wind turbine systems. However, the Vienna rectifier will face the challenge of reducing common-mode voltage (CMV), maintaining the sinusoidal input currents, and balancing neutral-point (NP) voltage in practice. As these issues are mutually coupled, the conventional space vector modulation (SVM) and various types of enhanced schemes cannot solve these problems properly, especially under nonunity power factor operation. To overcome these limitations, a two-layer pulsewidth modulation scheme through vector selection is developed. In the first layer of the proposed strategy, the NP voltage oscillations are mitigated by adjusting the switching sequence and dwell time of large, medium, small, and zero vectors with reduced CMV as the same in large, medium, and zero vector modulation. In the second layer of the proposed strategy, the switching states are reselected, and the dwell times are real time adjusted to eliminate the distortions in input currents. Through the aforementioned two-layer control method, CMV reduction, input current distortion elimination, and NP voltage balancing in Vienna rectifier can be realized simultaneously. The correctness and effectiveness of the proposed SVM method are verified by the experiment.

A Study on Neutral-Point Potential in Three-Level NPC Converters

This paper proposes an accurate mathematical model of three-level neutral-point-clamped (NPC) converters that can accurately represent the midpoint potential drift of the DC link with parameter perturbation. The mathematical relationships between the fluctuation in neutral-point voltage, the parametric perturbation, and the capacitance error are obtained as mathematical expressions in this model. The expressions can be used to quantitatively analyze the reason for the neutral-point voltage imbalance and balancing effect based on a zero-sequence voltage injection. The injected zero-sequence voltage, which can be used to balance the DC-side voltages with the combined action of active current, can be easily obtained from the proposed model. A balancing control under four-quadrant operation modes is proposed by considering the active current to verify the effectiveness of this model. Both the simulation and experiment results validate the excellent performance of the proposed model compared to the conventional model.

A Novel Modulation Strategy With Unconditional Neutral Point Voltage Balance and Three Switching Actions in One Switching Cycle for Neutral Point Clamped Three-Level Converter

The carrier-based pulsewidth modulation (CBPWM) and virtual space vector pulsewidth modulation (VSVPWM) for neutral point clamped three-level converter are reviewed briefly in this paper. A novel modulation strategy is proposed to maintain unconditional neutral point voltage balance under the full range of power factor and modulation index. The proposed PWM strategy is featured with three switching actions in one switching cycle, which is named 3SNPBPWM hereafter. In 3SNPBPWM, one phase is clamped to a certain level without switching action, and the other two phases have one and two switching actions in one switching cycle (SC), respectively. Moreover, a neutral point voltage recovery algorithm for 3SNPBPWM is also proposed. The performance of 3SNPBPWM is analyzed and compared with CBPWM and VSVPWM in terms of switching loss, waveform quality, and ability of neutral point voltage recovery. Finally, the feasibility and superiority of 3SNPBPWM are verified by experiment.

Analysis of Effective Three-Level Neutral Point Clamped Converter System for the Bipolar LVDC Distribution

Low-voltage direct current (LVDC) distribution has attracted attention due to increased DC loads, the popularization of electric vehicles, energy storage systems (ESS), and renewable energy sources such as photovoltaic (PV). This paper studies a ±750 V bipolar DC distribution system and applies a 3-level neutral-point clamped (NPC) AC/DC converter for LVDC distribution. However, the 3-level NPC converter is fundamental in the neutral-point (NP) imbalance problem. This paper discusses the NP balance control method using zero-sequence voltage among various solutions to solve NP imbalance. However, since the zero-sequence voltage for NP balance control is limited, the NP voltage cannot be controlled to be balanced when extreme load differences occur. To maintain microgrid stability with bipolar LVDC distribution, it is necessary to control the NP voltage balance, even in an imbalance of extreme load. In addition, due to the bipolar LVDC distribution, the pole where a short-circuit condition occurs limits the short current until the circuit breaker operates, and a pole without a short-circuit condition must supply a stable voltage. Since the conventional 3-level NPC AC/DC converter alone cannot satisfy both functions, an additional DC/DC converter is proposed, analyzed, and verified. This paper is about a 3-level NPC AC/DC converter system for LVDC distribution. It can be used for the imbalance and short-circuit condition in bipolar LVDC distribution through the prototype of the 300 kW 3-level NPC AC/DC converter system and experimented and verified in various conditions.

Topology, Efficiency Analysis, and Control of a Four-Level $\pi$ -Type Converter

This paper provides a comprehensive analysis for a four-level $\pi $ -type converter for low-voltage applications. This topology is a kind of reduced device-count neutral-point-clamped multilevel converter and formed by only six switches in each phase leg. The line (phase-to-phase) output voltage can have seven levels and the output harmonics are much lower than that of a standard two-level converter. The switching states and their associated output voltage levels have been analyzed. A generalized averaged analytical power loss model of this converter has also been developed to investigate the loss distribution among the power devices as well as the efficiency. The four-level $\pi $ -type converter has a higher efficiency when the switching frequency is above 5 kHz compared with two-level and three-level converters with the power devices used in this paper. The reduced output harmonics, hence reduced filtering requirement together with improved efficiency and cooling (heat sink) requirement, offer a higher density alternative to the two-level converter. A simplified level shifted carrier-based modulation method with dynamic optimal zero-sequence signal injection has been employed to modulate the converter and to control dc-link neutral-point voltages. This paper has experimentally validated the predicted four-level $\pi $ -type converter efficiency and the neutral-point voltage balancing control with a back-to-back configuration under high modulation indices and unity power factor. The neutral-point voltage balance region has been plotted and experimentally verified.

Model Predictive Control Methods for Three-Level Sparse Neutral Point Clamped Inverter

Three-level sparse neutral point clamped inverter is employed in this paper due to low harmonic, fewer switching devices, and less dc-link capacitor voltage imbalance problems. Model predictive control (MPC) methods are proposed to fully exploit the advantages of this inverter while ensuring neutral point voltage balance and maintaining low computational complexity. First, the desired voltage vector reference is constructed to realize reference current tracking based on the model of three-level sparse neutral point clamped inverter. Second, the n-type or the p-type small voltage vectors are carefully tuned to minimize the neutral-point (NP) voltage unbalance. Last, the voltage vectors that are far from the desired voltage vector reference are excluded in the cost function so as to reduce the computational burden. Therefore, only 5 effective voltage vectors instead of totally 13 voltage vectors are required in the implementation of the proposed fast MPC algorithm, which saves computational time up to 61.5%. Moreover, it compensates the one cycle digital delay through predictions. The performance of the proposed method has been validated by the simulation and experimental results.

Simultaneous Common-Mode Voltage Reduction and Neutral-Point Voltage Balance Scheme for the Quasi-Z-Source Three-Level T-Type Inverter

The conventional three-level inverter only has voltage buck capability. The quasi-Z-source three-level T-type inverter (QZS 3LT $^2$ I) has been proposed to realize voltage buck–boost operation. In this paper, we further propose a novel modulation scheme for the QZS 3LT $^2$ I to realize voltage boosting, reduce the common-mode voltage (CMV), and control the neutral-point voltage balance simultaneously. The proposed scheme adopts a large vector, a medium vector, a small vector with low CMV magnitude, a zero vector, and a shoot-through vector to generate the output voltage. According to sector number and neutral-point voltage difference, a p-type or n-type small vector with low CMV magnitude is properly selected to balance the neutral-point voltage. Shoot-through states are inserted within zero vector to boost the dc input voltage without affecting the ac output voltage. Dwell times of basic vectors are calculated through the revised volt–second balance equation. Furthermore, a coordinate control strategy between neutral-point voltage balance and voltage boosting is proposed. Doing so, the CMV magnitude can be restricted within one-sixth of dc-link voltage and neutral-point voltage imbalance can be effectively mitigated. The effectiveness of the proposed scheme is verified by simulations and experiments.

Space Vector Modulation Method for Simultaneous Common Mode Voltage and Circulating Current Reduction in Parallel Three-Level Inverters

Parallel three-level inverters are widely used in high-power applications for increasing the power capacity of the system. However, when multiple three-level T-type inverters are connected to a single dc bus, the zero sequence circulating current (ZSCC) will be generated. For the operation of paralleled inverters, another requirement is to reduce the common mode voltage (CMV) associated with pulsewidth modulation (PWM) method. As these two issues are mutually coupled, the conventional space vector modulation (SVM) and active control methods reported so far cannot address them properly simultaneously. To overcome this limitation, a modified SVM technique is proposed to reduce the CMV, suppress ZSCC, and balance neutral point (NP) voltage. The generating mechanism of the ZSCC with respect to modulation scheme is analyzed. Based on the analysis, the large, medium, small, zero vector modulation method is proposed for reducing ZSCC and balancing the NP voltage with reduced CMV as the same in large, medium, zero vector modulation. Furthermore, the effectiveness of the proposed method is verified by comparing its results with those of the convectional PWM. The results are obtained from simulation and experiments.

Model Predictive Direct Power Control Based on Improved T-Type Grid-Connected Inverter

In this paper, the improved T-type three-level topology can significantly reduce the conduction loss in zero states compared with the traditional T-type three-level topology. In the direct-axis and quadrature-axis rotating coordinate system, a control method combining the model predictive algorithm and the direct power control (DPC) is proposed. This control method divides 27 kinds of switch states into two groups and decides which group of switch states is to be scrolled optimally by comparing the two capacitor voltages on the dc side. This method reduces the computational burden by reducing the number of rolling optimization under the condition of ensuring the neutral point voltage balance. Compared with the traditional multilevel model predictive control, the method eliminates the need for predicting the neutral-point voltage as well as the cost function computation, and the control method is more direct and effective. Simulation and experimental results show that the proposed model predictive DPC method based on the improved T-topology can improve system robustness, fast dynamic response, wide operating range, and stability.

A Modified Neutral Point Balancing Space Vector Modulation for Three-Level Neutral Point Clamped Converters in High-Speed Drives

This paper describes a high-performance neutral point voltage balancing technique for a neutral point clamped (NPC) converter. Conventional neutral point voltage balancing methods do not function well under low power factor, low pulse ratio, and near-unity modulation index operation conditions. These conditions are essentially dominant operation conditions for aircraft starter/generator systems. This paper introduces an alternative space vector modulation technique for three-level NPC converters in an aircraft starter generator system. The selection of voltage space vectors is optimized for high modulation index and low power factor operation. Disturbances caused by a low pulse ratio are also compensated. The proposed method maintains neutral point voltage balance and ripple minimization over the full range of operating conditions. This paper also provides a detailed analysis of the sources of neutral point voltage imbalances and ripples in high-speed drives with deep flux weakening. Simulation results obtained from a Simulink/PLECS model and experimental results obtained from a 45 kVA, 32 krpm aircraft starter generator test rig prove that the proposed method eliminates the neutral point voltage imbalance and significantly reduces the neutral point voltage ripple.

Modified Predictive Control Method of Three-Level Simplified Neutral Point Clamped Inverter for Common-Mode Voltage Reduction and Neutral-Point Voltage Balance

Three-level simplified neutral point clamped (NPC) inverters are studied due to lower harmonics and fewer switching devices. Nevertheless, this topology needs to obtain neutral point (NP) voltage balance through either control or modulation methods. For the operation of photovoltaic application, the common-mode voltage (CMV) is needed to meet the requirements of leakage current. To address these issues, a modified predictive control method via two-layer vector selection criteria is proposed. In the first layer, the candidate switching vectors for the CMV reduction are selected. In the second layer, the P-type or N-type small vectors are selected for NP voltage balance. Then, the control method selects the optimized switching vector from the cost function consisting of the number of switching and the current, which can obtain the better performance depending on the power rating. Simulation and experimental verification results show that the modified predictive control method can reduce CMV and balance NP voltage both steady-state and transient process.

A Carrier-Based PWM Strategy Providing Neutral-Point Voltage Oscillation Elimination for Multi-Phase Neutral Point Clamped 3-Level Inverter

General pulse width modulation (PWM) model for multi-phase neutral point (NP) clamped (NPC) 3-level inverter (3LI) is described. A novel PWM strategy for $N$ -phase NPC 3LI with unconditional NP voltage balance is proposed as well as its carrier-based realization, in which PWM sequences are generated by comparing a single carrier wave with double modulation waves. The proposed PWM strategy is consistent with the principle of virtual space vector PWM (VSVPWM). However, the mechanism of NP voltage balance under the proposed PWM strategy is based on precisely calculating and executing level 1 action time of each phase, which may be influenced by some non-ideal factors. To avoid that, an active NP voltage control for the proposed PWM strategy is put forward. Then 3-phase and 5-phase NPC 3LIs are built as examples to verify the correctness of the proposed PWM strategy. Finally, the experimental results indicate that the proposed PWM strategy has better NP voltage control abilities.

Modeling, Analysis and Evaluation of Modified Model Predictive Control Method for Parallel Three-Level Simplified Neutral Point Clamped Inverters

Parallel three-level simplified neutral point clamped inverters (3L-SNPCIs) are applied in this paper because of fewer switching devices, low harmonic, larger power capacity and more flexibility. However, the challenge of zero-sequence circulating current (ZSCC) is inevitable, which causes the output current distortion and system instability. The conventional control and modulation methods introduced by far cannot solve them properly due to the limitations of fewer voltage vectors selection. To overcome these limitations, a modified model predictive control (MMPC) strategy is proposed based on the discrete mathematical model of parallel 3L-SNPCIs. The MMPC strategy realizes circulating current suppression and neutral-point voltage balancing by selecting P-type or N-type small voltage vector. In addition, the control objectives are optimized and the implementation is simplified, which can reduce the burden of calculation and reserve the advantages of the conventional model predictive control (MPC) algorithm. The proposed control strategy can be flexibly extended to parallel multilevel inverters. The efficiency of the proposed method is proved by simulation and experimental results under various conditions.

Lyapunov-Induced Model Predictive Power Control for Grid-Tie Three-Level Neutral-Point-Clamped Inverter With Dead-Time Compensation

In this paper, a new power control strategy based on a model predictive power control for the grid-tie three-level neutral point clamped inverter is presented. A dynamical model based on the orientation of grid voltage is used to predict the performance of control variables required for the system. A cost function that includes the tracking power ability, the neutral-point voltage balancing and switching frequency reduction is used to achieve the optimal switching state. A proposed selection scheme of control input is introduced to comprehend the stability of the closed-loop system and reduce the computational cost. At each sampling time, only candidate switching state inputs that guarantee the stability condition through a control Lyapunov function is evaluated in the cost function of the MPC algorithm. Thus, the execution time is remarkably decreased by 26% in comparison with traditional model predictive control. Moreover, the dead-time effect is compensated by incorporating its influence in the proposed prediction model. Simulation and experimental results compared with the traditional model predictive control are used to confirm the effectiveness of the proposed scheme.

Neutral-point Voltage Balancing Strategy for Three-level Converter based on Disassembly of Zero Level

Neutral-point Voltage Balancing Strategy for Three-level Converter based on Disassembly of Zero Level