Multilevel Inverter Research Articles (Page 1)

Power Quality Enhancement in Smart Grids Using DFIG-PV-IG Integrated UPQC with Unequal Step Multilevel Inverter for Sensitive Electric Vehicle and Medical Loads

A common-ground switched-capacitor multilevel inverter with extended input range for renewable energy applications

A single-phase high gain switched-capacitor multilevel inverter topology with reduced voltage stresses

While the conventional topologies of multilevel inverters (MLIs) operate with unity voltage gain, switched capacitors-based MLIs (SCMLIs) offer a solution to realize an inherent voltage gain of more than one, thereby stepping up the voltage in the process of DC to AC conversion. This work proposes a novel SCMLI constituting thirteen levels, requiring only one DC input and 3-capacitors to achieve an inclusive three-fold gain in voltage. The number of power switches employed in the proposed module is thirteen, where nine switches peak-inverse-voltage (PIV) is considered as one-third of the output voltage amplitude. Experimental results validate the proposed inverter (PI), demonstrating its efficacy. The superior performance of the PI with respect to component count, power switch voltage ratings, and cost function (CF) is highlighted by comparison with other SCMLIs. The total standing voltage (TSV) per level, expressed in per unit with respect to [Formula: see text] is 1.307, while the PIV per level is 0.153, which is competitive with recent literature. Additionally, the CF is 4.538, lower than other designs, enhancing the performance of the structure for real-time applications.

In this paper, a novel Asymmetric Circular Multilevel Inverter (AC-MLI) that eliminates the need for a polarity generator. The proposed configuration is increased with multi-stages to achieve 7 and 15-level output voltage. Several algorithms are defined to determine the magnitude of the DC voltage sources, which are scaled asymmetrically to achieve higher degrees of voltage. From this, the optimal algorithm, which yields a higher voltage level, is selected for the design. Further, the suggested inverter is compared to various MLIs and conventional inverters to evaluate the advantage of the proposed topology. To investigate Total Harmonic Distortion (THD) reduction and voltage level improvement, the three-stage AC-MLI is simulated in MATLAB using conventional PWM, OLSPWM (Optimized Level Shifted PWM), and Repository (REPO-PWM) techniques, tested with resistive, inductive, and motor loads. OLS-POD (Phase Opposition and Disposition) has achieved high efficiency and least THD. Moreover, the factors like Weighted THD (WTHD), Harmonic Spread Factor (HSF), and Distortion Factor (DF) are calculated for the developed 15-level AC-MLI. To evaluate its effectiveness, the proposed AC-MLI is implemented in real time and tested under dynamic operating conditions. This ensures the proposed AC-MLI generates high-quality output with minimal component count.

Renewable energy applications have shown a strong interest in switched-capacitor (SC) based multilevel inverters (MLIs) because of their ability to raise ac voltage while simultaneously balancing the capacitor's voltage. It is less expensive and takes up less space than other topologies since it just uses one source. New switched-capacitor multilevel inverters (SCMLIs) have been developed in effect to expanding demands for higher power capacities with enhanced power quality. Recently designed SCMLIs let for maximize ac output via inversion with single-stage voltage enhanced. In an attempt to decrease the quantity of apparatus, this study presents a nine-level SCMLI that utilize two capacitors with three diodes, and is of the boost kind. Voltages across capacitors are balanced by design and may be quadrupled starting a single source when using the series-parallel connection method. No semiconductor device can withstand voltage stresses extra than double the input voltage. The suggested SCMLI may be upgraded to handle higher voltage levels with fewer components and no extra dc input. Each expansion module keeps the maximum voltage stress constant at 9 levels, but adds 2 more steps to the output voltage. After a comprehensive estimate of power losses with circuit functioning, a study of recently planned single-phase 9-level MLIs is conducted to validate their design is better. In regulate to validate the key individuality of the 9-level SCMLI in real-time prepared environments, widespread simulation results are provided. For the purpose of determining if the new multi-level inverter was feasible, the analysis and simulation waveforms were evaluated under a range of load circumstances. The performance of the suggested MLI is superior to that of current multilayer inverters.

ABSTRACT This research article demonstrates the protection of point of common coupling (PCC) by mitigating voltage harmonics produced by electric vehicle fast‐charging station (EVFCS) using multilevel inverter (MLI) based dynamic voltage restorer (DVR). The DVR is a series‐connected voltage‐compensating device. A five‐level T‐type inverter is used as voltage source inverter (VSI) of DVR. Three Li‐ion batteries, each rated as 48 V, 10 Ah, 5 A, are connected to the common DC‐bus configuration consecutively. The DVR enhances the quality of PCC voltage in terms of voltage harmonics as per the IEEE 519 standard, thereby protecting the other loads connected to the PCC. Also, the various characteristics of EVFCS are determined experimentally, which exhibit the smooth operation of the grid‐powered EVFCS by the closed‐loop current‐controlled DC‐DC buck converter. Lastly, the experimental results strengthen the results of simulation and prove the main contributions of this research work.

This work presents a new integration of the Whale Optimization Algorithm (WOA) with Finite Control Set Model Predictive Control (FCS‑MPC) to optimise Fractional‑Order Proportional–Integral (FOPI) controllers for Multilevel Inverters (MLIs)—a combination hitherto unexplored in the literature. In the proposed hierarchical scheme, the WOA‑tuned FOPI operates in the outer loop to generate highly accurate and adaptive current reference signals, while FCS‑MPC forms the inner loop, predicting the inverter’s behaviour for all possible switching states and selecting the one that minimises a defined cost function. This coordinated outer–inner control design enhances reference tracking accuracy and reduces steady‑state error, leading directly to improved harmonic suppression, voltage regulation, and dynamic stability. The proposed WOA‑FOPI‑FCS‑MPC control achieves a 12–15% reduction in Total Harmonic Distortion (THD) and a 22% improvement in dynamic stability compared to conventional PI‑based predictive control. Additionally, a systematic comparison between diode‑clamped and T‑type MLIs in a 1 MW PV‑grid system reveals that the T‑type inverter reaches 98.5% efficiency and 1.48% voltage THD at 7‑level operation, offering an optimal trade‑off between switching device count, power quality, and efficiency. Statistical analysis—including mean, minimum, maximum, standard deviation, and computational time—confirms the robustness and consistency of the proposed optimisation, while benchmark function evaluations validate the global search capability of WOA. The results, validated through MATLAB/Simulink simulations and preliminary experimental tests, demonstrate the method’s strong potential for high performance industrial PV grid integration.

A Hybrid Aquila-Chimp Algorithm Based Selective Harmonic Elimination in Cascaded Multilevel Inverter for PV Applications

This study proposes a unique control approach to improve the power quality of a multilevel inverter architecture based on an Open-End Winding Induction Motor (OEWIM) drive system. To obtain an open-end induction motor, two different voltage-source inverters are fed from both ends of the star-connected primary winding. The OEWIM is supplied from one end by a main three-level inverter that is created by cascading dual two-level inverters which are controlled using space-vector modulation (SVM). To offset the harmonics generated by the three-level inverter, a supplemental inverter that operates as a series compensator is connected to the other end of the OEWIM. An active filtering control method is utilized to govern the supplemental two-level inverter to reduce the voltage harmonic distortions brought on by the three-level inverter. The strategy leverages the inherent advantages of OEWIMs, such as enhanced fault tolerance and reduced common-mode voltage, making the system suitable for high-performance industrial applications. Detailed analysis of the inverter's switching patterns, simulations, and experimental validation demonstrate significant improvements in power quality for different modulation indices. As the motor voltage and current waveforms' harmonic distortions diminish, the drive's efficiency will rise.

This paper proposes a unity-gain active-neutral-point-clamped (ANPC) multilevel inverter topology utilizing two DC sources, ten switches, and four DC-link capacitors. The proposed inverter generates 17 and 25 output voltage levels by leveraging input voltage ratios of V2 = 3V1 (triple) and V2 = 5V1 (quintuple), respectively. Unlike conventional designs, the topology eliminates the need for an H-bridge to produce bipolar voltage waveforms, thereby reducing the number of switches exposed to the maximum output voltage from four (in H-bridge-based structures) to two. Additionally, the inverter supports diverse load types across a wide range of power factors. Comparative analysis demonstrates that the proposed topology achieves the lowest number of conducting switches (only three) to generate any output voltage level, minimizing voltage drop, device losses, and conduction losses while enhancing overall efficiency and output voltage quality. Furthermore, it requires fewer DC sources and switches compared to existing 25-level inverters. Experimental results from a laboratory-scale prototype validate the effective operation of the proposed ANPC inverter in both 17- and 25-level configurations.

ABSTRACT Multi-level inverters without transformer coupling are growingly popular for solar uses because of their compact design, minimised voltage stress, and improved efficiency. In this paper, the proposed novel triple-boost 7-level inverter is optimised for seamless integration with the grid. The proposed inverter employs self-regulating switched-capacitors to achieve a threefold voltage amplification, effectively eliminating the need for an independent boost converter stage. This architecture benefits low-voltage PV systems by improving efficiency, reducing cost, and ensuring superior performance. Moreover, the 7-level inverter adopts a common-ground topology, effectively mitigating leakage currents in PV system applications. The paper elaborates on the operational modes of the proposed inverter and the design of a current controller tailored for a grid-tied PV-based seven-level inverter. Additionally, simulation and experimental validation are conducted utilising hardware-in-the-loop (HIL) methods to evaluate system performance. Finally, a comprehensive comparative analysis is presented between the proposed seven-level inverter and existing seven-level inverters, highlighting the advantages of the proposed inverter design.

This article presents a revolutionary 7-level, nine-times voltage boosting property converter. The main disadvantage of traditional Multilevel Inverter (MLI) is that, in order to use renewable energy sources, a high-voltage DC-DC chopper must be tolerant of raise input voltage. The suggested converter makes use of ten switches, two inductors, four diodes, three switching capacitors, and just one DC supply. The capacitor’s voltage equalizes itself automatically. Less components are needed and a capacitor is used instead of a DC source to create the switched capacitor MLI. To produce the output voltage waveforms with seven levels, the switching Inductor/capacitor must be appropriately charged and discharged. Without requiring a voltage regulating circuit with a closed loop, the suggested inverter can self-balance the capacitor’s voltage. Because of the continuous series-parallel discharge and charging over a full cycle, three capacitors receive equal charges from the input source and the inductors. Compared to the majority of recently produced topologies, the suggested 7-level Switched Capacitor (SC) inverter involves a reduced number of switches, driver diodes, capacitors, also semiconductor switches. Additionally, four pairs of switches run simultaneously using the same control signal, simplifying the control system, and eight of the ten the fundamental frequency is used by switches to function. An elementary frequency switching system is employed to regulate the inverter’s output. On the PSIM/MATLAB platform, the suggested structure’s voltage-boosting and self-balancing capabilities are verified.

Abstract This paper presents an innovative PWM technique for a three-phase seven-level PUC-NPC converter that achieves automatic capacitor voltage balancing without complex control systems or additional sensors, addressing a key challenge in multilevel inverters. Unlike conventional designs requiring costly closed-loop control, the proposed hybrid PUC7-NPC topology generates five-level output using a single DC source while leveraging inherent redundant switching states for natural voltage regulation. The method simultaneously minimizes total harmonic distortion (THD) through optimized switching patterns, ensuring compliance with power quality standards. MATLAB/Simulink simulations confirm the converter’s stable performance across various switching frequencies, demonstrating its suitability for diverse applications including motor drives and grid-tied solar systems. The proposed solution represents a cost-effective, high-performance alternative for modern power conversion systems, offering simplified implementation without compromising output waveform quality.

ABSTRACTTwo‐level voltage source converters (2L‐VSCs) use a single DC‐link for renewable energy/storage integration but require multiple series connections, limiting power extraction under partial shading or cell mismatch conditions. A multilevel inverter with independently controlled DC terminals can mitigate this issue. This paper presents a cost‐effective split DC‐link configuration using a 10‐switch neutral‐point clamped converter (TS‐NPC) and its control strategy. This results in a saving of two switches and six antiparallel diodes compared to the conventional three‐level (3L) neutral‐point clamped converter (3L‐NPC) offering a split DC‐link. The proposed control technique addresses the effect of voltage imbalance across split DC‐links on the AC side using virtual voltage vector formation, allowing autonomous control of DC voltages in the preceding stage. This paper investigates the operation of the TS‐NPC under unequal voltages in a split DC‐link, detailing the space vector modulation principle, virtual vectors, and duty ratio calculation. A comprehensive discussion on autonomous split DC‐link voltage control is provided. Extensive results and comparative analyses across various factors, including total harmonic distortion (THD), power loss, switching ratings, voltage stresses, and cost are presented. The performance of the TS‐NPC is experimentally verified, with results presented to validate its effectiveness.

A switched-capacitor-based multilevel inverter with enhanced voltage boosting and self-balancing capabilities

This article presents the design of a modular pure sine wave microinverter with a high-efficiency maximum power point tracking (MPPT) regulator for photovoltaic (PV) systems. The design starts with a DC/DC buck-boost chopper regulator, simulated using the perturb and observe (P&O) algorithm. Next, a high-frequency DC/AC conversion stage is implemented using a toroidal transformer to achieve various voltage levels and isolated power sources. Finally, a 27-level multilevel inverter is designed to produce a pure sine wave with minimal total harmonic distortion (THD). Simulation results indicate that the microinverter achieves a total efficiency of 90% and produces a pure wave output with 3% harmonic distortion. Compared to commercial solutions, the proposed design enhances efficiency while integrating key components. Additionally, the system maintains a cost-effectiveness and directly proportional to its energy efficiency, making it a viable and cost-effective solution for PV energy conversion.

A novel asymmetric space vector modulation technique for performance-optimized boost integrated T-type multilevel inverter

Bang-Bang Pulse Magnitude Modulation and Binary Search Tree-Based Voltage Balancing Method of Multilevel Inverter for Wireless Power Transfer

Enhancing Power Quality in Grid-Connected Hybrid Renewable Energy Sources Using a Fennec Fox Optimization-Amplitude Transformed Quantum Convolutional Neural Network with Cascaded H-Bridge Multilevel Inverter