Design Of Multilevel Inverter Research Articles

RSO based selective harmonic elimination control for nine-level switched capacitor inverter

Abstract Renewable energy utilization has gained much attention in the recent time owing to the sharp increase in the power demand. Out of different renewable sources, photovoltaic (PV) energy utilization in different forms is one of key focus. Power converter such as multilevel inverters (MLIs) are proven as key components for PV systems as well as for other applications such as motor drives, electric vehicles, and charging stations. With the advancement of the design of MLIs, the switched-capacitor (SC) based MLIs have been widely deployed for their boosting capability which is a major requirement for PV systems. In this paper, a reduced switch single input step-up 9-level SC MLI is first proposed. Followed by this, a new Rat Swarm Optimization (RSO) based Selective Harmonic Elimination (SHE) control method is incorporated for switching operation. RSO has the ability to provide the solution with higher competency within less time and a less computationally complex approach. The operation of proposed structure is analyzed and its advantages are justified by comparison with exiting topologies. The effectiveness of RSO based SHE scheme is also verified by comparing it with other nature-inspired algorithms. The effectiveness and workability of the proposed system are examined using simulation and experimental tests.

Multi-DG qZSI based grid tied inverters

The increasing adoption of distributed generation (DG) systems, driven by their numerous advantages, has led to a growing utilization of hybrid systems. Multilevel converters have emerged as essential components in power electronics applications, offering benefits such as harmonic reduction. However, designing effective control strategies for multilevel inverters presents challenges. This paper proposes a multi-DG quasi-Z-Source Inverter (qZSI) designed with a cascaded H-bridge controller. The incorporation of qZSI in the system enhances reliability and component safety while enabling the implementation of additional shoot-through control. This feature facilitates the balancing of inequalities arising from the two DG sources, thereby improving disturbance rejection. Furthermore, a current control scheme is implemented on the AC side to seamlessly feed active power into the grid without introducing distortions in current injection. Overall, the proposed system addresses key challenges in multilevel inverter design and offers a promising solution for efficient and reliable grid integration of DG systems. This work is thus useful in variety of applications, including electric vehicles and environment sustainability.

SHE PWM based 21 level inverters with hardware analysis

Recently, the advancement of multilevel inverters (MLI) has been a crucial factor in high power and medium voltage applications. This MLI has multiple topologies and has been used in a variety of applications. Cascaded MLI is preferred over other forms of multilevel inverter topologies. Nonetheless, significant obstacles are encountered when implementing these topologies. They necessitate an increased number of switches, DC sources, capacitors, and diodes. Increased losses and total harmonic distortion (THD) will be present in the system. In addition, the MLI is more expensive. The better construction of a multilevel inverter results in more output levels with fewer switches, sources, and driver circuits, as well as low THD. A new single-phase cascaded asymmetrical DC voltage sources based multilevel inverter design and the selective harmonic elimination (SHE) approach are used to attain these goals. After confirming in MATLAB/Simulink, the hardware implementation of the multilevel inverter in 21 levels was completed in this article.

Single Source Switched Capacitor Based Multilevel Inverter With Reduced Number of Components

Multilevel inverters find extensive use across various applications owing to their capability to generate voltage waveforms of superior quality. thereby minimizing harmonic distortion. Traditional multilevel inverters require a substantial number of power semiconductor devices and passive components, resulting in heightened costs, intricacy, and physical dimensions. These multilevel inverters play a pivotal role in the electric vehicle sector, serving as a critical component in EV power trains for converting Convert DC power from batteries into AC power to operate electric motors.. The research methodology involves the following steps: Design and configuration of a multilevel inverter utilizing switched capacitor technology from a single source.. Design proposed topologies for multilevel inverter design. Design a circuit according topologies in MATLAB. Comparative analysis with existing multilevel inverter designs. Evaluation of the inverter's performance in terms of harmonic distortion, output voltage quality, and efficiency. Rather than employing a multilevel inverter with fewer switches that operates from a single source the highest possible levels are preferred. This paper introduces an innovative 9-level multilevel inverter based on a single source and switched capacitors, which significantly reduces the number of switches required, utilizing only three capacitors and a single DC source. This design approach serves to streamline the inverter's intricacy, decrease costs, and minimize its physical footprint. Furthermore, it elevates the voltage levels by up to 96%, enhancing the overall performance and efficiency of the inverter. Additionally, this technology can be applied in electric vehicles, integrated with renewable energy sources, and utilized in industrial settings. The novelty of this research lies in the utilization of a single-source switched capacitor configuration to achieve multilevel inverter functionality. This approach reduces the number of components required, leading to potential cost savings and improved system reliability. The novel features of this study include: Integration of switched capacitors in a single-source multilevel inverter design. Achieving multilevel inverter functionality with fewer components. Improved performance and efficiency compared to traditional multilevel inverter designs.

Harmonizing power systems with a 13-level modified Packed U-Cells multi-level inverter: Design and implementation

Traditional multilevel inverter designs often face complexity challenges, prompting the need for a simplified solution. This study introduces and evaluates the performance of a Modified Packed U-Cells (MPUC) inverter in the realm of multilevel inverter technology. The study addresses challenges associated with conventional multilevel inverters and proposes the MPUC inverter as a solution to simplify the design complexity. The MPUC inverter, utilizing three DC sources and eight switches, presents a groundbreaking thirteen-level output waveform. The primary focus lies in assessing the inverter's performance in terms of Total Harmonic Distortion (THD) and output voltage. Utilizing MATLAB/Simulink, the inverter's performance is evaluated with and without Pulse Width Modulation (PWM) strategies. The results reveal a notable reduction in THD, from 26.25% to 9.91% post-filtering when PWM is not employed. Various multi-carrier Level-Shifted PWM strategies, including PDPWM, PODPWM, APODPWM, and COPWM, are explored to enhance output waveform smoothness and efficiency. Unequal Carrier strategies, specifically UEAPDPWM and UEAPODPWM, emerge as superior in THD management at different frequency ranges. The study further incorporates real-time hardware implementation of the proposed 13-level MPUC topology, highlighting the success of the UEAPD-PWM strategy in improving waveform quality. The research aims to establish a multilevel inverter design protocol meeting international standards and emphasizes the pivotal role of PWM techniques in enhancing waveform quality. This comprehensive evaluation contributes to advancing the field of multilevel inverter technology and sets a benchmark for future research in this domain.

Advancing battery energy storage system: State‐of‐health aware state‐of‐charge balancing in multilevel inverters for electric transportation

AbstractThis research presents an innovative methodology for enhancing battery energy storage systems for electrically powered transportation, utilizing a distinctive cascaded H‐bridge multilevel inverter design, termed P‐CHBMI. Central to this work is the development of a state‐of‐health aware state‐of‐charge (SoH‐aware‐SoC) balancing technique, which leverages an advanced algorithm integrated with a Proportional‐Integral (PI) controller technique to efficiently balance battery cells according to their state‐of health (SoH). This technique significantly improves operational efficiency and extends the lifespan of battery systems by intelligently optimizing cell discharge processes. Moreover, this research work delivers a wide range of simulations for the generation of a streamlined control algorithms for the development of the symmetric and asymmetric configuration of the P‐CHBMI. Similarly, recommended topology is proficient of equal voltage discharge across battery cells, which is an exclusive property of the conventional cascaded H‐bridge topology. The study includes extensive MATLAB/Simulink simulations to validate the superiority of the P‐CHBMI and the SoH‐aware‐SoC balancing method over conventional systems, highlighting substantial enhancements in switch count efficiency, operational flexibility, and battery durability. Further, the practical applicability of the proposed topology is evidenced through a hardware implementation of a symmetric 5‐level inverter. This study plays a significant role in the development of the inverter technology particularly in off‐grid scenarios such as electric vehicle and aircrafts, keeping the battery efficiency and reliability as a most important factor.

Overview of Intelligent Inverters and Associated Cybersecurity Issues for a Grid-Connected Solar Photovoltaic System

The major problem associated with the grid-connected solar photovoltaic (PV) system is the integration of the generated DC power into the AC grid and maintaining the stability of the system. With advancements in research on these PV inverters, artificial intelligence (AI)-based control models are replacing the existing linear methods. These smart PV systems are prone to a variety of attacks, ranging from physical attacks on the PV plants to data integrity attacks and communication-based attacks. This paper provides an overview of the cybersecurity issues with smart PV inverters, their impacts on the grids, and control methods that exist to detect and identify cyber-attacks on a smart PV grid system. An extensive bibliography is provided on grid-forming and grid-following inverters with a variety of control techniques like Proportional–Integral–Derivative (PID) control, fuzzy-based control, and their performances under different fault situations. Multi-level inverter design approaches with various intelligent control techniques to overcome switching failures and other system faults are reviewed. Moreover, some recommendations for future research on intelligent inverters for grid-connected PV systems are proposed. This work will benefit researchers, scientists, and engineers who are working in the field of intelligent inverters for the grid-connected PV system.

Simulation of Asymmetrical Seven Level Multi Level Inverter using MATLAB Simulink

Abstract: Multi-Level Inverter (MLI) has gained significant significance in medium power and medium voltage AC drive applications. Various topologies have been developed in the design of MLIs. Hybrid topologies are emerging to minimize component requirements and reduce switching losses. This paper introduces a comprehensive analysis and functioning of the asymmetrical seven level multi-level inverter topology. The modeling process is executed using the MATLAB Simulink environment.

Realization of an extended switched-capacitor multilevel inverter topology with self voltage balancing

Achieving high voltage levels is an important issue in the design of multi-level inverters (MLIs). In this paper, the basic unit of a new switched-capacitor (SC) topology is extended to achieve higher voltage levels with fewer components. The capacitors are charged from the single supply voltage directly by turning on appropriate switching states, which can generate a high-amplitude nearly sinusoidal output voltage. The operating principles, modulation strategy, method of determining capacitance, and power loss of the extended structure are presented in detail. Also, a comparative study with recent similar structures has been done. The extended SCMLI has the advantages of self-balancing the voltage of the capacitors, generating a bipolar output voltage, and satisfying the standard of harmonics (IEEE519). The experimental test and MATLAB simulation results of a 17-level prototype are given to verify the performance of the extended structure.

A Novel High-Efficiency Three-Phase Multilevel PV Inverter With Reduced DC-Link Capacitance

We present a novel three-phase multilevel inverter (MLI) design for PV applications that does not require large DC-link capacitors to buffer the 120 Hz power ripple and allows individual inverter module to process trapezoidal power instead of sinusoidal power. This new design features two inverters connected in parallel to each DC source and N inverters connected in series to each grid phase to support the grid voltage. The trapezoidal operation improves the overall system&#x2019;s efficiency by allowing the inverter module to output peak or zero power for most of the AC cycle. We present the controller design and simulate the proposed MLI system in PLECS. We demonstrate an experimental 110<inline-formula><tex-math notation="LaTeX">$V$</tex-math></inline-formula> DC input, 208 <inline-formula><tex-math notation="LaTeX">$V_{rms}$</tex-math></inline-formula> three-phase AC output, 1kW 5-level prototype with <inline-formula><tex-math notation="LaTeX">$&gt;$</tex-math></inline-formula>&#x00A0;95&#x0025; efficiency. With the same inverter module, we compare the efficiency of the proposed design to the conventional MLI design, where all modules share phase power evenly. We demonstrate that the proposed design consistently outperforms the conventional design in efficiency, with <inline-formula><tex-math notation="LaTeX">$&gt;$</tex-math></inline-formula>&#x00A0;20&#x0025; loss reduction at light load conditions.

Design of Multilevel Inverter based Active Filter for Harmonic Elimination &amp; Frequency Regulation

Abstract: For harmonic and reactive power adjustment in two-wire (single phase), three-wire (three phase without neutral), and four-wire (three phase with neutral) ac power networks with nonlinear loads, active filtering of electric power has already reached maturity. This article provides a thorough analysis of active filter (AF) designs, control methods, component choices, additional relevant technical and economic factors, and their selection for certain applications. It aims to give researchers and application developers working with AF technology a comprehensive perspective on the state of the technology

A New Design of Multilevel Inverter Based on T-type Symmetrical and Asymmetrical DC Sources

A New Design of Multilevel Inverter Based on T-type Symmetrical and Asymmetrical DC Sources

A Cascaded Multilevel Inverter design based Harmonic Optimization using TLBO Algorithm for Wind Energy System

In order to remove undesirable lower order harmonics from a cascaded H-bridge multilevel inverter and solve a constrained in design optimization issue with parameters involved in a changeable objective function for the given system, the TLBO approach is provided. To test the stability of the system, the recommended system output was designed to be supplied to various load drive systems. The entire efficiency of wind grid inverters has now decreased due to the low wind speed, making it unable to utilise wind energy effectively. To solve this issue, it is necessary to improve both the control method and the inverter side’s topological structure. A cascaded H-bridge multilevel inverter architecture is used to implement the entire system’s functionality, with the first stage circuit being built in MATLAB-Simulink.

Mathematical modeling and engineering design of multi-level inverter based on selective harmonic elimination

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Studi Analisis Perbandingan Pwm Carrier Untuk Multilevel Inverter Tiga Fasa Lima Belas Level Dengan Sumber Input Simetris Terpisah

Inverters are used to convert direct current or DC (Direct Current) sources into alternating current sources or AC (Alternating Current). A method is needed to make the output waveform close to a sinusoidal waveform. The Multi Level Inverter (MLI) method has a large number of levels and is closer to a sinusoidal wave. The three-phase MLI design with a separate symmetrical input source in this study is able to produce a three-phase output wave, where the resulting Total Harmonic Distortion (THD) value is smaller, namely 5.65% when using the Modified PWM method where the carrier signal has no frequency

A Grey Wolf Optimized 15-Level Inverter Design with Confined Switching Components

Multilevel inverters are a new class of dc-ac converters designed for high-power medium voltage and power applications as they work at high switching frequencies and in renewable applications by avoiding stresses like dv/dt and has low harmonic distortion in their output voltage. In variable speed drives and power generation systems, the use of multilevel inverters is obligatory. To estimate the switching positions in inverter configuration with low harmonic distortion value, a fast sequential optimization algorithm has been established. For harmonic reduction in multilevel inverter design, a hybrid optimization technique combining Firefly and the Genetic algorithm was used. In several real-time systems and for solving complex engineering problems, optimization approaches are gaining popularity. Based on Grey Wolf Optimization (GWO), this research paper proposes a novel multilevel inverter architecture. The GWO algorithm is based on the natural leadership hierarchy and hunting mechanism of grey wolves (Canis lupus). The Grey Wolf Optimizer (GWO) algorithm is used to find the best switching angles for a cascaded multilevel inverter in order to eliminate some high order harmonics while sustaining the desired fundamental voltage. The proposed inverter has 15 stages, and the circuit’s unique feature includes a limited switching device. This proposed method comprises, MOSFET-based switches well as three DC sources in the main circuit. The switching parameters of the inverter topology are tuned using GWO in this methodology. The THD value of the proposed system is reduced to 6.629% compared to that of Multilevel Inverter using Genetic Algorithm, standalone power supply, Firefly assisted Genetic Algorithm, hybrid APSO algorithm, DC voltage regulation and FPGA. A few simulation studies have been included in this paper to affirm the capability of the hybrid topologies with various condition parameters, dynamic changes, and modulation indexes.

Compare the Symmetric Hybridized Cascaded MLI with 17 levels with the Asymmetric Switched Capacitor MLI Topologies for Dynamic Loading

This article builds a symmetric hybridized cascaded a switching capacitor unit in a multilayer inverter and compares it to For 17 level inverters, A switched capacitor unit is utilized with an asymmetric multilevel inverter. In the symmetric hybridized multilevel inverter design, a In the midst of a dual-input dc source, there is a bi-directional switch is utilized to create a modified H-bridge inverter with a five-level output voltage instead of three. In the proposed scenario, In an asymmetric multilevel inverter, the switched capacitor unit substitutes the dc sources. which enlarges By a factor of two, The output voltage has been increased. and the voltage levels at the loads are increased by a factor of two. MATLAB-SIMULINK was used to verify the suggested topology using the staircase modulation approach. The findings show that multilayer inverter topologies with low total harmonic distortion, fewer switches, With greater levels of output voltage are better stable during load disturbance circumstances, making them ideal for renewable energy applications.

Design and Implementation of Multilevel Inverters for Electric Vehicles

The efficient and compact design of multilevel inverters (MLI) motivates in various applications such as solar PV and electric vehicles (EV). This paper proposes a 53-Level multilevel inverter topology based on a switched capacitor (SC) approach. The number of levels of MLI is designed based on the cascade connection of the number of SC cells. The SC cells are cascaded for implementing 17 and 33 levels of the output voltage. The proposed structure is straightforward and easy to implement for the higher levels. As the number of active switches is less, the driver circuits are reduced. This reduces the device count, cost, and size of the MLI. The solar panels, along with a perturb and observe (P&O) algorithm, provide a stable DC voltage and is boosted over the DC link voltage using a single input and multi-output converter (SIMO). The proposed inverters are tested experimentally under dynamic load variations with sudden load disturbances. This represents an electric vehicle moving on various road conditions. A detailed comparison is made in terms of switches count, gate driver boards, sources count, the number of diodes and capacitor count, and component count factor. For the 17-level, 33-level, and 53-level MLI, simulation results are verified with experimental results, and total harmonic distortion (THD) is observed to be the same and is lower than 5% which is under IEEE standards. A hardware prototype is implemented in the laboratory and verified experimentally under dynamic load variations, whereas the simulations are done in MATLAB/Simulink.

Implementation of LDN to MLI and RSC-MLI configurations with a simple carrier-based modulation

The design of multilevel inverters (MLI) and reduced switch count (RSC) MLIs majorly depend on the requirements of desired output voltage levels, number of dc sources switching devices, and their ratings. With regard to these requirements ‘Level Doubling Network (LDN)’ configuration is introduced. LDN has the ability to double the output voltage levels of any MLI or RSC-MLI, preserving inverter modularity. However, the implementation of LDN to MLI or RSC-MLI is not unified and varies with switching operations. Thus, this work presents the implementation of LDN to popular MLI and RSC-MLI configurations and further presents a brief comparison on theswitch count, number of levels, and harmonic performance for both LDN and non-LDN cases. Further, a generalized carrier-based PWM scheme is presented to implement the LDN for any MLI and RSC-MLI configurations irrespective of voltage levels, dc-voltage ratios, and topological configuration. The performance of the inverter and the proposed modulation scheme are validated on MATLAB/Simulink environment.

Implementation of a new Bi-Directional Switch multilevel Inverter for the reduction of harmonics

In the current scenario, multilevel inverter plays a major role in heavy duty drive systems. MLI is one of the most advanced power converters for highly efficient AC output. But there is more to the requirement of number of control switches and total number of input sources which often generates more losses. This paper presents a new multilevel inverter design with limited number of control switches and with just one DC source to reduce these demerits. It uses a smaller number of Bi-directional switches. So that complexity of the circuit is reduced. Finally, an eleven-level inverter is designed and simulated using MATLAB/SIMULINK and THD reduction has been analyzed. This paper also provides a comparative statement of required components for various conventional methods.