Multilayer Gate Research Articles

Achieving low-voltage operating high-mobility organic thin-film transistors by a multi-layered gate dielectric

Organic thin-film transistors (OTFTs) have attracted great attention for their inherent advantages and promising applications in emerging fields. Simultaneously realizing low-voltage operation and high-mobility in one OTFT is one of prerequisites for the commercialization, which is a huge challenge so far. An important route to address this challenge is to develop an ideal gate dielectric with a high capacitance and a low interfacial trap density at the dielectric/channel. In this Letter, we demonstrate the low-voltage operating high-mobility OTFTs by elaborately designing and processing a multi-layered gate dielectric. The gate dielectric consists of a high permittivity polymer film, a polymer buffing layer with a high surface energy, and an ultrathin long-chain alkane buffer layer. The effects of both the structures and the processes of gate dielectrics on the performances of OTFTs are investigated in detail. In addition, the relevant physical mechanisms are discussed. Finally, the optimal OTFTs exhibit high mobilities with the average and maximum values up to 5.62 and 6.74 cm2/V s, respectively, at low operating voltages below −5 V. Our findings reveal that designing and processing a reasonable multi-layered gate dielectric is a promising strategy to achieve both high-mobility and low-voltage operation in OTFTs, thereby fostering their development.

Modified BBFTO ceramic oxide with high dielectric constant and low loss-tangent for possible electronic applications

In this report, a complex barium titanate ceramic oxide of the form BaBi1.6Fe0.4TiO6 was prepared by the solid-state casting process. More Bi3+ percentage was selected to boost the dielectric and ferroelectric effects, while lowering the Fe3+ content could minimize the leakage current and consequently, the dielectric loss (tanδ). The X-ray diffraction (XRD) data suggests an establishment of monoclinic distortion (P21/c) of smaller mean crystallite size (∼40 nm) using the Debye-Scherrer formula. The compound exhibits dielectric values, such as ɛr ∼ 771, and relatively low loss, tanδ ∼ 0.017 at the ambient experimental conditions. Thus, the material can be incorporated into different electronic devices where higher dielectric constant and lower losses are essential, for example, multi-layered ceramic capacitors, transmission lines, and gate dielectrics. The AC-conductivity essence of the compound follows Jonscher’s power law as well as Arrhenius relation. The PE hysteresis loop was traced at different conditions with a function of the incident electric field in the ambient atmospheric conditions. The outcome of this study revealed that the material has remanent polarization hence suggesting a ferroelectric effect with less hysteresis loss; therefore, it could be useful in memory storage devices.

DNA-based programmable gate arrays for general-purpose DNA computing.

The past decades have witnessed the evolution of electronic and photonic integrated circuits, from application specific to programmable1,2. Although liquid-phase DNA circuitry holds the potential for massive parallelism in the encoding and execution of algorithms3,4, the development of general-purpose DNA integrated circuits (DICs) has yet to be explored. Here we demonstrate a DIC system by integration of multilayer DNA-based programmable gate arrays (DPGAs). We find that the use of generic single-stranded oligonucleotides as a uniform transmission signal can reliably integrate large-scale DICs with minimal leakage and high fidelity for general-purpose computing. Reconfiguration of a single DPGA with 24 addressable dual-rail gates can be programmed with wiring instructions to implement over 100 billion distinct circuits. Furthermore, to control the intrinsically random collision of molecules, we designed DNA origami registers to provide the directionality for asynchronous execution of cascaded DPGAs. We exemplify this by a quadratic equation-solving DIC assembled with three layers of cascade DPGAs comprising 30 logic gates with around 500 DNA strands. We further show that integration of a DPGA with an analog-to-digital converter can classify disease-related microRNAs. The ability to integrate large-scale DPGA networks without apparent signal attenuation marks a key step towards general-purpose DNA computing.

A Novel Remaining Useful Life Probability Prediction Approach for Aero-Engine with Improved Bayesian Uncertainty Estimation Based on Degradation Data

As the heart of aircraft, the aero-engine is not only the main power source for aircraft flight but also an essential guarantee for the safe flight of aircraft. Therefore, it is of great significance to find effective methods for remaining useful life (RUL) prediction for aero-engines in order to avoid accidents and reduce maintenance costs. With the development of deep learning, data-driven approaches show great potential in dealing with the above problem. Although many attempts have been made, few works consider the error of the point prediction result caused by uncertainties. In this paper, we propose a novel RUL probability prediction approach for aero-engines with prediction uncertainties fully considered. Before forecasting, a principal component analysis (PCA) is first utilized to cut down the dimension of sensor data and extract the correlation between multivariate data to reduce the network computation. Then, a multi-layer bidirectional gate recurrent unit (BiGRU) is constructed to predict the RUL of the aero-engine, while prediction uncertainties are quantized by the improved variational Bayesian inference (IVBI) with a Gaussian mixture distribution. The proposed method can give not only the point prediction of RUL but also the confidence interval of the prediction result, which is very helpful for real-world applications. Finally, the experimental study illustrates that the proposed method is feasible and superior to several other comparative models.

Band alignment of TiO2/SiC and TiO2/Si heterojunction interface grown by atomic layer deposition

Silicon carbide (SiC) is regarded as a promising semiconductor owing to its wide band gap and high thermal conductivity. Meanwhile, it possesses issues such as interface properties, which may affect the performance of SiC substrate power devices (e.g. MOSFET), especially when compared with similarly structured silicon appliances. Given that the development of SiC semiconductor devices has a number of commonalities with conventional silicon-based semiconductors, titanium dioxide (TiO2), a material that has a great track record in Si-based semiconductor devices, has been chosen for investigation in this work. Although TiO2 is not capable of being a gate dielectric alone on the SiC substrate because of its relatively narrow band gap, it can be adopted into composite or multilayer gate dielectrics to reach satisfying characteristics. As such, the interfacial state and heterostructure between TiO2 and SiC remain worthy being researched. In the present study, the properties of atomic layer deposited (ALD) TiO2 films on silicon substrates were compared with those on 4H-SiC substrates via x-ray photoelectron spectroscopy, atomic force microscopy, and x-ray reflectometry. It is shown that the interface state between ALD TiO2 film and both types of substrates as-deposited have similar chemical conditions, whereby TiO2 layer barely react with substrates, containing great amount of oxygen vacancies. According to band alignment calculations, heterostructure of both samples are type-II heterojunctions with negatively shifted conduction band. Although the large bandwidth of 4H-SiC hinders the use of TiO2 as a gate dielectric in power devices, this structure has the potential for other semiconductor products.

Thermally hardened AlGaN/GaN MIS-HEMTs based on multilayer dielectrics and silicon nitride passivation

AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) were demonstrated to operate at temperatures of up to 600 °C. High-quality multilayer gate dielectrics (Al2O3/SiO2/SiON) were developed to enhance the thermal stability of the MIS-HEMTs at high temperatures. Furthermore, we found that silicon nitride passivation and circular structure can effectively reduce the off-state drain current, which is critical for high-temperature operations. Based on the optimized process, we demonstrated the AlGaN/GaN MIS-HEMTs with record high Ion/Ioff ratios (1011 at room temperature and 105 at 600 °C) and high transconductances (47 mS/mm at room temperature and 8 mS/mm at 600 °C for a channel length of 2.4 μm). The maximum transconductance was enhanced by ∼28% after the operation at 600 °C. Lifetime measurement of the MIS-HEMT showed stable DC characteristics with a nearly unchanged on-state drain current and threshold voltage over the course of 25-h thermal stress at 525 °C.

Mitigating Host Burden of Genetic Circuits by Engineering Autonegatively Regulated Parts and Improving Functional Prediction.

Mitigating unintended interferences between circuits and host cells is key to realize applications of synthetic regulatory systems both for bacteria and mammalian cells. Here, we demonstrated that growth burden and circuit dysregulation occurred in a concentration-dependent manner for specific transcription factors (CymR*/CymR) in E.coli, and direct negative feedback modules were able to control the concentration of CymR*/CymR, mitigate growth burden, and restore circuit functions. A quantitative design scheme was developed for circuits embedded with autorepression modules. Four key parameters were theoretically identified to determine the performance of autoregulated switches and were experimentally modified by fine-tuning promoter architectures and cooperativity. Using this strategy, we synthesized a number of switches and demonstrated its improvement of product titers and host growth controlling the complex deoxyviolacein biosynthesis pathway. Furthermore, we restored functions of a dysregulated multilayer NOR gate by integrating autorepression modules. Our work provides a blueprint for engineering host-adaptable synthetic systems.

Multi-Layer High-K Gate Stack Materials for Low D<sub>it</sub> 4H-SiC Based MOSFETs

Metal-oxide-semiconductor capacitors with single and multi-layer high-K gate dielectrics on Si (0001) face of n-type 4H-SiC substrates have been investigated. Multi-layered nanolaminated gate-stack comprises alternating ultrathin (6nm) Al2O3 and HfO2. A 5nm thick interfacial silicon oxynitride is deposited prior to laminated films to investigate interface trap properties and tuning of flat band voltage. Total thickness of gate-stack films including interfacial layer is 55nm. The thermal stability of multi-layered nanolaminated film is investigated using XTEM. Localized crystallization of HfO2 is visible after RTA at 900°C while Al2O3 remains fully amorphous. Some of HfO2 grains have extended into Al2O3 layer but was not able to crossover. The measured accumulation capacitance of 55nm thick gate dielectric gives an effective dielectric constant value of 9.6 and an equivalent oxide thickness of 22nm from high-frequency capacitance-voltage measurements. A positive flat band voltage ( of 12.2V and 10.6V are observed from both single layer HfO2 and Al2O3 dielectrics, respectively due to presence of negatively charged oxygen interstitial defects generated during atomic layer deposition process. However, VFB shifted towards negative voltage-7.6V for multi-layered Al2O3/HfO2 stacks probably associated with positive Al and Hf interstitials at interface of Al2O3/HfO2. Ultrathin interfacial oxynitride films is effective to reduce Dit to 3×1011/eVcm2 and tuning of VFB. The breakdown field of stacked gate dielectric on 4H-SiC is 10.0 MV/cm.

Organic-Inorganic Hybrid Gate Dielectrics Using Self-Assembled Multilayers For Low-Voltage Operating Thin-Film Transistors

Advanced electronic materials have attracted great interest for their potential use in flexible, large-area, and printable electronic applications. However, fabricating high-performance low-voltage thin-film transistors (TFTs) for those applications with these advanced semiconductors is still challenging because of a lack of dielectric materials which satisfy both the required electrical and physical performance. In this work, we report self-assembled hybrid multilayer gate dielectrics prepared using a facile solution procedure to achieve organic semiconductor and amorphous oxide semiconductor-based thin-film transistors with ultralow operating voltage. These self-assembled hybrid multilayer gate dielectrics were constructed by iterative self-assembly of synthesized bifunctional phosphonic acid-based organic molecules and ultrathin high-k hafnium oxide layers. The novel self-assembled hybrid multilayer gate dielectrics exhibit excellent dielectric properties with exceptionally large capacitances (up to 815 nF/ cm2) and low-level leakage current densities of < 1.56 × 10-6 A/cm2, featureless morphology (RMS roughness < 0.24 nm), and thermal stability (up to 300 °C). Consequently, these hybrid gate dielectrics can be incorporated into thin-film transistors with pentacene as p-type organic semiconductors, and with indium oxide as n-type inorganic semiconductors. The resulting TFTs functioned at ultralow voltages (< ± 2 V) and achieved high transistor performances (hole mobility: 0.88 cm2 / V·s, electron mobility: 7.8 cm2 / V·s and on/off current ratio >104, and threshold voltage: ± 0.5 V).

PMMA/High-k Self-assembled TiO2/PMMA Multi-layer Gate Dielectric for P3HT Organic Field Effect Transistors

In this work, a multi-layer structure of poly (methyl methacrylate)/ titanium dioxide/poly (methyl methacrylate) (PMMA/TiO₂ /PMMA; PTP) was proposed as a top-gate insulator for P3HT-based organic field-effect transistors (OFETs). Adding a TiO₂ interlayer as a high dielectric constant (high-k) material into PMMA film enables the modification of the dielectric constant of the multi-layers PTP film. The content of TiO₂ in the PTP film, which can be varied by changing the number of soaking cycles in TiO₂ solution, plays a crucial rule in modifying the dielectric constant of the PTP film. The higher the TiO₂ content used in the PTP film, the higher the dielectric constant of PTP film can be obtained. However, using high TiO₂ content led to a reduction in the dielectric constant of the PTP film due to leakage current induced by the agglomeration of TiO₂. The utilization of the top-gate insulator containing TiO₂ significantly enhanced several P3HT-OFETs characteristics, e.g., an increase in the Ion/Ioff ratio, and a decrease in the threshold voltage. However, the use of the PTP top-gate insulator with a high content of TiO₂ resulted in regressions in the OFETs characteristics, such as a decrease in carrier mobility and reduction in the Ion/Ioff ratio. OFETs operating at the optimum conditions of the PTP gate-insulator, with PTP thickness of 225 nm and RMS roughness of 20.0 nm, provided a dielectric constant of 7.13, a threshold voltage of -8.49 V, a saturation mobility of 2.2× 10-4 cm²V-1s-1, Ion/Ioff ratio of 37.9, and a subthreshold slope of 0.39 V/decade.

The Effect of Si Surface Flattening Process on the MISFET With High-k HfNx Multilayer Gate Dielectrics

Metal-insulator-semiconductor field-effect transistors (MISFETs) with high-k HfN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> multilayer gate dielectrics fabricated with Si surface flattening process were investigated. The Si surface flattening process was carried out by Ar/1.0%H <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> annealing for 30 min. A higher I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> on</sub> / I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> off</sub> current ratio was obtained by increasing the number of HfN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> gate dielectric layers while its characteristics such as drain current, saturation mobility and subthreshold swing (SS) are not markedly degraded. This is attributed to the thicker gate dielectrics. Furthermore, it is found that these characteristics are found to be effectively improved by Si surface flattening process.

Signatures for coexistence of monoclinic and hexagonal phases in GaTe nanoflakes

The burgeoning two-dimensional (2D) layered materials provide a powerful strategy to realize efficient light-emitting devices. Among them, gallium telluride (GaTe) nanoflakes, showing strong photoluminescence (PL) emission from multilayer to bulk crystal, relax the stringent fabrication requirements of nanodevices. However, detailed knowledge on the optical properties of GaTe varies as layer thickness is still missing. Here we perform thickness-dependent PL and Raman spectra, as well as temperature-dependent PL spectra of GaTe nanoflakes. Spectral analysis reveals a spectroscopic signature for the coexistence of both the monoclinic and hexagonal phases in GaTe nanoflakes. To understand the experimental results, we propose a crystal structure where the hexagonal phase is on the top and bottom of nanoflakes while the monoclinic phase is in the middle of the nanoflakes. On the basis of temperature-dependent PL spectra, the optical gap of the hexagonal phase is determined to be 1.849 eV, which can only survive under temperature higher than 200 K with the increasing phonon population. Furthermore, the strength of exciton-phonon interaction of the hexagonal phase is estimated to be 1.24 meV/K. Our results prove the coexistence of dual crystalline phases in multilayer GaTe nanoflakes, which may provoke further exploration of phase transformation in GaTe materials, as well as new applications in 2D light-emitting diodes and heterostructure-based optoelectronics.

Ta2O5/SiO2 Multicomponent Dielectrics for Amorphous Oxide TFTs

Co-sputtering of SiO2 and high-κ Ta2O5 was used to make multicomponent gate dielectric stacks for In-Ga-Zn-O thin-film transistors (IGZO TFTs) under an overall low thermal budget (T = 150 °C). Characterization of the multicomponent layers and of the TFTs working characteristics (employing them) was performed in terms of static performance, reliability, and stability to understand the role of the incorporation of the high-κ material in the gate dielectric stack. It is shown that inherent disadvantages of the high-κ material, such as poorer interface properties and poor gate insulation, can be counterbalanced by inclusion of SiO2 both mixed with Ta2O5 and as thin interfacial layers. A stack comprising a (Ta2O5)x(SiO2)100 − x film with x = 69 and a thin SiO2 film at the interface with IGZO resulted in the best performing TFTs, with field-effect mobility (µFE) ≈ 16 cm2·V−1·s−1, subthreshold slope (SS) ≈ 0.15 V/dec and on/off ratio exceeding 107. Anomalous Vth shifts were observed during positive gate bias stress (PGBS), followed by very slow recoveries (time constant exceeding 8 × 105 s), and analysis of the stress and recovery processes for the different gate dielectric stacks showed that the relevant mechanism is not dominated by the interfaces but seems to be related to the migration of charged species in the dielectric. The incorporation of additional SiO2 layers into the gate dielectric stack is shown to effectively counterbalance this anomalous shift. This multilayered gate dielectric stack approach is in line with both the large area and the flexible electronics needs, yielding reliable devices with performance suitable for successful integration on new electronic applications.

Semianalytical Modelling and 2D Numerical Simulation of Low-Frequency Noise in Advanced N-Channel FDSOI MOSFETs

Thorough investigations of the low-frequency noise (LFN) in a fully depleted silicon-on-insulator technology node have been accomplished, pointing out on the contribution of the buried oxide (BOX) and the Si-BOX interface to the total drain current noise level. A new analytical multilayer gate stack flat-band voltage fluctuation-based model has been established, and 2D numerical simulations have been carried out to identify the main noise sources and related parameters on which the LFN depends. The increase of the noise at strong inversion could be explained by the access resistance contribution to the 1/f noise. Therefore, considering uncorrelated noise sources in the channel and in the source/drain regions, the total low-frequency noise can simply be obtained by adding to the channel noise the contribution of the excess noise originating from the access region (Δr). Moreover, only two fit parameters are used in this work: the trap volumetric density in the BOX, and the 1/f access noise level originating from the access series resistance, which is assumed to be the same for the front and the back interfaces.

Dual phase two-color emission observed in van der Waals GaTe planes

After the eagerly study on two-dimensional (2D) electronic devices made by layered semiconductors, light-emitting devices based on 2D semiconductors have also flourished in recent years due to their special characters of flexibility, flatness surface, and thickness-tunable band gap modulation, etc. Among the 2D materials, III-VI layer compounds with hexagonal structure like GaSe and InSe are essentially direct semiconductors that own high band-edge luminescence efficiency and wide thickness tunable range from bulk to thin few-layer scale. In this work, dual-phase two-color emissions of multilayered gallium monotelluride positioned at 1.588 and 1.652 eV are simultaneously detected by micro-photoluminescence (μPL) measurement at 300 K. The lower-energy peak may originate from the hexagonal GaTe (H-GaTe) phase while the higher-energy luminescence might come from monoclinic GaTe (M-GaTe) phase and which are verified by micro-thermoreflectance (μTR) and high-resolution transmission electron microscopy (HRTEM). Micro-time-resolved photoluminescence (TRPL) and area fluorescence lifetime mapping (AFLM) of the multilayer GaTe indicated that the luminescence decay time constant of the H-GaTe is larger than that of the M-GaTe for verification of the dominant phase in multilayered GaTe is the monoclinic phase. In-plane structural and optical anisotropy of the multilayered GaTe were characterized by using polarized micro-Raman and polarized μPL measurements. The results clearly indicate that the monoclinic-phase GaTe possesses higher polarized extinction ratio with respect to that of the hexagonal GaTe for fully extinction of the Raman vibration mode and band-edge emission in the dual-phase gallium telluride. The existence of dual crystalline phases in multilayer GaTe may render it possible for fabrication of two-color emission device available for near-infrared (NIR) optical communication use.

Breakdown transients in high-k multilayered MOS stacks: Role of the oxide–oxide thermal boundary resistance

In this work, breakdown transients of multilayered gate oxide stacks were analyzed to study the impact of the interfaces between oxides on the heat dissipation considering an electromigration-based progressive breakdown model. Using two distinct measurement setups on four different sets of samples, featuring two layers and three layers of Al2O3 and HfO2 interspersed, the breakdown transients were captured and characterized in terms of the degradation rate. Experimental results show that the number of oxide–oxide interfaces present in the multilayered stack has no visible impact on the breakdown growth rate among our samples. This strongly supports the interpretation of the bulk materials dominating the heat transfer to the surroundings of a fully formed conductive filament that shows no electrical differences between our various multilayered stack configurations.

Intelligent fault prediction of rolling bearing based on gate recurrent unit and hybrid autoencoder

Accurate fault prediction of rolling bearing can predict the operation condition in advance, which is an important means to ensure the safety and reliability of rotating machinery. Aimed at the data processing of rolling bearing vibration signal with multi-fault and long time series, an intelligent fault prediction model based on gate recurrent unit and hybrid autoencoder is proposed in this paper. Firstly, vibration signals of multi-faults are brought into multi-layer gate recurrent unit model for multi-step and multi-variable time series prediction. Secondly, variational autoencoder is used for data augmentation of fault samples. Thirdly, the augmented fault samples are brought into stacked denoising autoencoder for noise reduction and fault prediction. Finally, fault prediction results of rolling bearing can be achieved on the basis of gate recurrent unit and hybrid autoencoder of variational autoencoder and stacked denoising autoencoder. The bearing datasets of Case Western Reserve University are used to verify the effectiveness of the proposed method. Comparative experiment results show that the proposed fault prediction model has more accurate time series prediction result and higher fault prediction accuracy than other deep learning models. With 98.68% accuracy of fault prediction, the proposed fault prediction model can be taken as an effective tool for intelligent predictive maintenance of rolling bearing.

Aptamer-Enhanced Organic Electrolyte-Gated FET Biosensor for High-Specificity Detection of Cortisol

Organic field-effect transistor (FET) devices offer a low-cost manufacturing and simple integration of biorecognition molecules for biosensory applications. In electrolyte-gated organic FET (EGOFET) biosensors, a biofluid is directly integrated as the OFET gate dielectric for label-free bioelectronic sensing. The critical constraints of these devices are biofouling and the organic polymer's susceptibility to environmental effects. In this letter, we solve these issues by implementing a multilayered gate dielectric system in our low-cost OFET biosensor, encompassing the bioelectrolyte and an aptamer-enhanced top gate surface for the rapid high-sensitivity detection of cortisol in synthetic buffer solutions. To emphasize the crucial architectural and operational differences to EGOFETs, we have termed these devices as organic electrolyte-gated FET (OEGFETs). We also reported a numerical model that can be fitted to predict the behavior of the cortisol-specific OEGFET biosensors and highlighted the distinct advantages of our system, compared with the more traditional EGOFET sensors. The specificity of our cortisol biosensor is rigorously tested using two negative control biomolecules, i.e., progesterone and cortisone. Molecules that structurally resemble cortisol and like cortisols are present in detectable concentrations in the saliva. The detectable cortisol concentration range of our OEGFET biosensor is currently identified as 27.3 pM-27.3 μM.

Effects of interlayer interactions on the nanoindentation response of freely suspended multilayer gallium telluride

Freestanding indentation is a widely used method to characterise the elastic properties of two-dimensional (2D) materials. However, many controversies and confusion remain in this field due to the lack of appropriate theoretical models in describing the indentation responses of 2D materials. Taking the multilayer gallium telluride (GaTe) as an example, in this paper we conduct a series of experiments and simulations to achieve a comprehensive understanding of its freestanding indentation behaviours. Specifically, the freestanding indentation experiments show that the elastic properties of the present multilayer GaTe with a relatively large thickness can only be extracted from the bending stage in the indentation process rather than the stretching stage widely utilised in the previous studies on thin 2D materials, since the stretching stage of thick 2D materials is inevitably accompanied with severe plastic deformations. In combination with existing continuum mechanical models and finite element simulations, an extremely small Young’s modulus of multilayer GaTe is obtained from the nanoindentation experiments, which is two orders of magnitude smaller than the value obtained from first principles calculations. Our molecular dynamics (MD) simulations reveal that this small Young’s modulus can be attributed to the significant elastic softening in the multilayer GaTe with increasing thickness and decreasing length. It is further revealed in MD simulations that this size-induced elastic softening originates from the synergistic effects of interlayer compression and interlayer shearing in the multilayer GaTe, both of which, however, are ignored in the existing indentation models. To consider these effects of interlayer interactions in the theoretical modelling of the freestanding indentation of multilayer GaTe, we propose here novel multiple-beam and multiple-plate models, which are found to agree well with MD results without any additional parameters fitting and thus can be treated as more precise theoretical models in characterising the freestanding indentation behaviours of 2D materials.

Nanowire Grid Polarization and Polarized Excitonic Emission Observed in Multilayer GaTe.

In this study, near-infrared (NIR) x-polarized (P-state) light is created from the transmission ray of monoclinic multilayer GaTe near the band edge. The P-state transmittance photons are produced via the transmission light of a ribbonlike multilayer GaTe with a plurality of nanowire grids being parallel and constructed along the y direction (b axis) from 1.56 to 1.62 eV. At 300 K, a P-state excitonic emission at 1.652 eV can be clearly detected in polarized microphotoluminescence (μPL) measurement. The free-exciton extinction energy and recombination lifetime of the band-edge exciton are evaluated and determined to be ΔE = 32 ± 4 meV and τ ≈ 0.032 ns, respectively, for the multilayer GaTe. Polarized microthermoreflectance (μTR) measurement also verifies that the x-polarized transition is allowed while y-polarized (S-state) transition is forbidden in the multilayer GaTe. An asymmetric p-to-p transition along the x polarization is thus inferred to comprise the band edge of multilayer GaTe to form in-plane optical anisotropy.