Double-gate Research Articles

On the double channel engineering of dual gate AlGaN/GaN HEMTs for heavy ion sensing applications

This work investigates the influence of Single Event Transient (SET) effect on Double Channel Dual Gate (DC-DG) AlGaN/GaN HEMT using TCAD simulations. Both Single Channel (SC) and Double Channel HEMT have been calibrated with reported experimental results and further extended by introducing a second gate in the structures to analyze its sensitivity towards heavy ion strike. The effective gate length has been optimized in such a way that the saturation currents and threshold voltage of dual gate devices is similar to that of the single gate devices. The DC-DG HEMT improves the heavy ion sensitivity, thus making it a more viable device for sensing application (mainly radiation). Different biases and gate materials have been used to observe the influence of SET on the DC-DG AlGaN/GaN HEMT. Further, the impact of the graded AlGaN barrier on the device current as well as on the sensitivity of the DC-DG HEMT towards SET is studied. To ascertain the performance of DC-DG HEMT for dosimeter applications, its sensitivity toward heavy ion impact in switched mode is monitored. Investigation reveals that the device current returns to its original order of magnitude after every ion impact, and therefore can be effectively used as a dosimeter.

Fabrication of p-type 2D single-crystalline transistor arrays with Fermi-level-tuned van der Waals semimetal electrodes

High-performance p-type two-dimensional (2D) transistors are fundamental for 2D nanoelectronics. However, the lack of a reliable method for creating high-quality, large-scale p-type 2D semiconductors and a suitable metallization process represents important challenges that need to be addressed for future developments of the field. Here, we report the fabrication of scalable p-type 2D single-crystalline 2H-MoTe2 transistor arrays with Fermi-level-tuned 1T’-phase semimetal contact electrodes. By transforming polycrystalline 1T’-MoTe2 to 2H polymorph via abnormal grain growth, we fabricated 4-inch 2H-MoTe2 wafers with ultra-large single-crystalline domains and spatially-controlled single-crystalline arrays at a low temperature (~500 °C). Furthermore, we demonstrate on-chip transistors by lithographic patterning and layer-by-layer integration of 1T’ semimetals and 2H semiconductors. Work function modulation of 1T’-MoTe2 electrodes was achieved by depositing 3D metal (Au) pads, resulting in minimal contact resistance (~0.7 kΩ·μm) and near-zero Schottky barrier height (~14 meV) of the junction interface, and leading to high on-state current (~7.8 μA/μm) and on/off current ratio (~105) in the 2H-MoTe2 transistors.

Design and performance analysis of front and back Pi 6 nm gate with high K dielectric passivated high electron mobility transistor

Advanced high electron mobility transistor (HEMT) with dual front gate, back gate with silicon nitride/aluminum oxide (Si3N4/Al2O3) as passivation layer, has been designed. The dependency on DC characteristics and radio frequency characteristics due to GaN cap layers, multi gate (FG and BG), and high K dielectric material is established. Further compared single gate (SG) passivated HEMT, double gate (DG) passivated HEMT, double gate triple (DGT) tooth passivated HEMT, high K dielectric front Pi gate (FG) and back Pi gate (BG) HEMT. It is observed that there is an increased drain current (Ion) of 5.92 (A/mm), low leakage current (Ioff) 5.54E-13 (A) of transconductance (Gm) of 3.71 (S/mm), drain conductance (Gd) of 1.769 (S/mm), Cutoff frequency (fT) of 743 GHz maximum oscillation frequency (Fmax) 765 GHz, minimum threshold voltage (V<sub>th</sub>) of -4.5 V, on resistance (Ron) of 0.40 (Ohms) at V<sub>gs</sub>=0 V. These outstanding characteristics and transistor structure of proposed HEMT and materials involved to apply for upcoming generation high-speed GHz frequency applications.

Investigation on Effect of Interface Trap Charges and Temperature in Gate Overlap Graphene Source Step Shape Double Gate Tunnel FET

Abstract This work evaluates the electrical parameters of Gate Overlap Graphene source Step Shape Double Gate TFET (GO-GR-SSDG-TFET) with wide variation in interface trap charges (ITCs) and temperature. Here, both the positive interface charges (PITCs) and negative interface charges (NITCs) along with temperature ranges from 200-500 K on DC, RF/analog and linearity characteristics are analyzed using TCAD Sentaurus Simulator. It is observed that there is improvement (degradation) in current ratio, transconductance, gain, cut-off frequency, and delay with increase (decrease) in PITC (NITC), whereas, opposite trend is realized in terms of linearity parameters. The rise in temperature leads to degradation is subthreshold behaviour due to exponential characteristic of Shockley-Read-Hall (SRH) recombination with temperature. It is also seen that at high temperature there is degradation transconductance, device efficiency, cut-off frequency, current ratio, delay, and temperature sensitivity (ST) in the proposed TFET. Moreover, the linearity parameters are degraded with rise in temperature. Finally, a comparison table is highlighted in terms of various electrical parameters for proposed TFET with existing data.

Design and analysis of Z shaped InGa0.5As0.5/Si tunnel FET using non-equilibrium Green’s function model for hydrogen gas sensing application

—In this paper, a high-k stacked gate Z shaped hetero-juncture TFET (Z-HTFET) is introduced as transducer sensor for the application of hydrogen gas detection. The positioning of stacked gate over the entire source region resulting Z shaped TFET exhibits vertical line tunneling mechanism between the source and the channel yielding higher ON state current (Id) as compared to conventional double gate (DG) TFET. Further, the combination of low band gap source of In0.5Ga0.5As and hetero-gate dielectric engineering helps to facilitate improved device current, steeper subthreshold slope and lower leakage current (Ileak) conduction. Here, palladium (Pd) and the high-k gate stack (HfO2/SiO2) is used as the sensing platform. The induced shift in work function of Pd gate electrode due to the dissociation and diffusion of hydrogen gas molecules into the catalytic gate metal is considered as the detection metric for calculating the sensitivity of the proposed TFET based gas sensor. The behavior of the hydrogen gas sensor is studied using numerical device simulator in terms of surface potential, electric field, transfer characteristics, transconductance, Id/Ileak ratio with variation in work-function and finally Id/Ileak sensitivity is measured. The sensor behavior for a wide range of temperature is also examined to explore the temperature stability of the device. The comparative performance analysis of Z-HTFET with sensitivity of 95.26% establishes the superiority of the device for hydrogen gas sensing as compared to some of the recently reported FET based sensors.

In-Situ Orthogonal TEM Lamella Conversion for Catching Subtle Defects in 3D Transistors of Microprocessor Devices.

In-Situ Orthogonal TEM Lamella Conversion for Catching Subtle Defects in 3D Transistors of Microprocessor Devices.

DFT based atomic modeling and Analog/RF analysis of ferroelectric HfO2 based improved FET device

In this study, we systematically investigated the Analog/RF and linearity parameter of SM DGNCFET (single metal double gate negative capacitance field effect transistor) and DM DGNCFET (double metal double gate negative capacitance Field effect transistor) with the help of Cogenda Visual TCAD simulator, and also demonstrated the enhancement in the electronic and optical properties of Si-doping bulk structure by using the Quantum ATK. The analog parameters are enhanced for SM DGNCFET such better performance of switching ratio 279 times better, DIBL 54% lower, SS decay, and some other improved parameter transconductance, TGF and Radio frequency parameter is also enhanced, transconductance frequency product (TFP) for improving reliability and stability of device. Linearity parameters like that second and third order transconductance (gm2, g m3), voltage intercept point for 2nd, 3rd. Tran Blaha modified Becke Johnson (TB-mBJ) approxiamation gives the accurate band gap of crystal. In DFT based atomic study, 12.5% of Si doping in bulk structure reveals better results for ferroelectric HfO2 based crystal in the direct band gap of bandstructure is zero, Density of state (DOS) is also improved conductivity for Si doping crystal. Hence, Si doping in crystal structure is also better for conductivity.

Contact-engineered reconfigurable two-dimensional Schottky junction field-effect transistor with low leakage currents

Two-dimensional (2D) materials have been considered promising candidates for future low power-dissipation and reconfigurable integrated circuit applications. However, 2D transistors with intrinsic ambipolar transport polarity are usually affected by large off-state leakage currents and small on/off ratios. Here, we report the realization of a reconfigurable Schottky junction field-effect transistor (SJFET) in an asymmetric van der Waals contact geometry, showing a balanced and switchable n- and p-unipolarity with the Ids on/off ratio kept >106. Meanwhile, the static leakage power consumption was suppressed to 10−5 nW. The SJFET worked as a reversible Schottky rectifier with an ideality factor of ~1.0 and a tuned rectifying ratio from 3 × 106 to 2.5 × 10−6. This empowered the SJFET with a reconfigurable photovoltaic performance in which the sign of the open-circuit voltage and photo-responsivity were substantially switched. This polarity-reversible SJFET paves an alternative way to develop reconfigurable 2D devices for low-power-consumption photovoltaic logic circuits.

Biomimetic Artificial Tetrachromatic Photoreceptors Based on Fully Light‐Controlled 2D Transistors

AbstractArtificial photoreceptors offer a promising solution for developing biomimetic vision systems that incorporate in‐sensor processing, which can greatly reduce power consumption and operation latency compared to traditional machine vision systems. This work presents a tetrachromatic optical synaptic device based on a 2D tungsten diselenide optoelectronic p‐type transistor with a unique UV light‐activated surface electron doping layer. Fully light‐controlled bidirectional synaptic excitation and inhibition are demonstrated with visible and UV light stimuli, respectively, with a reasonable power density of <10 mW cm−2 that matches the imaging condition of a biological vision. The weight updates of up to 64 states, high dynamic range, and low nonlinearity are demonstrated for long‐term potentiation and depression behaviors. This artificial tetrachromatic photoreceptor can mimic the alert and foraging behaviors of a reindeer with low power consumption and enhanced signal contrast. Furthermore, it can be employed as an intelligent collision detection solution with in‐sensor processing capabilities. This bioinspired tetrachromatic photoreceptor offers a low‐cost, energy‐efficient, and low‐latency solution for future artificial machines.

Numerical Analysis Study of The Effects of Backscattering Coefficient on Electrical Performance of Double-Gate nano-MOSFET

The simulated and computed electrical characteristics, with and without carriers backscattering, of 10 nm double-gate (DG) nano-MOSFET have been investigated and compared in this paper. The electrical parameters thus studied include Ballistic Enhancement Factor (BEF), on-state ballistic drain current Id, 2D electron density Qi and electron velocity v. BEF values with and without backscattering coefficients are 2.065 and 2.149, respectively because injection velocity reduced when considering backscattering. Average electron velocity near the beginning of the device channel has been found to reduce from 4.131x105 ms-1 to 1.186x105 ms-1 with the inclusion of backscattering phenomenon. The 2D electron density with and without backscattering coefficient are 3.927x1016 m-2 and 3.850x1016 m-2, respectively. The increment is because backscattered electrons and injected electrons superimposed and interfered with each other in the channel due to wave nature of electrons occurance in nanometer transistors. There are two current equations studied in this paper. The first one is based on flux-theory and the other one based on the product of electron concentration and electron velocity. The first method showed a current reduction from 2.548x103 μA/μm to 2.497x103 μA/μm. The second way also approximately showed reduction from 2.548x103 μA/μm to 2.497x103 μA/μm after minor modification in modeling. Both ways indicated that electrons are backscattered to the source by the potential barrier at the beginning of the channel and thereby reduced the number of electrons reaching the drain. In conclusion, backscattering is a physical phenomenon which can’t be ignored in describing electron transport in DG nano-MOSFETs.

Compact I-V model for back-gated and double-gated TMD FETs

A physics-based analytical DC compact model for double and single gate TMD FETs is presented. The model is developed by calculating the charge density inside the 2D layer which is expressed in terms of the Lambert W function that recently has become the standard in SPICE simulators. The current is then calculated in terms of the charge densities at the drain and source ends of the channel. We validate our model against measurement data for different device structures. A superlinear current increase above certain gate voltage has been observed in some MoS2 FET devices, where we present a new mobility model to account for the observed phenomena. Despite the simplicity of the model, it shows very good agreement with the experimental data.

Optimization of Double-Gate Carbon Nanotube FET Characteristics for Short Channel Devices.

Transistors are the fundamental electronic component integrated into electronic devices' chips Carbon Nano Tube (CNT) based field. Effect Transistor (FET) is a promising component for next-generation transistor technologies; as it has high carrier mobility, device stability, and mechanical flexibility. Nevertheless, some shortcomings in the CNT FET's design prevent it from providing the best performance while preserving thermal stability. The structure and functionality of transistors with Double-Gate (DG) devices, which use carbon nanotubes as active channel regions, have been examined by the authors of this study. The DG CNT FET has been extensively simulated using an electronic device simulator with various device geometrics, including channel length, oxide thickness for its output, and transfer characteristics. In comparison to reported patents and published works, this demonstrates a significant improvement Conclusion: A new perspective on the DG CNT FET's device performance characteristics is provided by this research work, which can be scaled down to minimum channel length without Short Channel Effects (SCEs).

Machine learning-based output prediction of negative capacitance tunnel-FET

ABSTRACT Machine learning-based prediction of the output characteristics of a negative capacitance (NC) double gate (DG) Tunnel FET (TFET) (NC DG TFET) has been demonstrated in this paper. On current (ION), OFF current (IOFF) and sub-threshold slope (SS) have been predicted for different values of the body thickness (TSi), oxide thickness (TOX) and channel length (LCh) and the work function (WF). Random Forest Regression (RFR) model is used in the ML framework to explore the device characteristics. A total of 5444 simulated data has been generated by using the SILVACO ATLAS tool. After pre-processing the data, RFR-ML has been applied to obtain maximum accuracy. Root means square error (RMSE) (~0.34), R2 score (~0.965) and accuracy (~98.51%) parameter have been used as the figures of merit (FOM) to judge the efficiency of the proposed model with respect to the state-of-the-art literature. Besides, with higher accuracy, the model is capable of predicting the data within a few seconds compared to the few hundred hours using TCAD tools. This fast and accurate design strategy will surely be efficacious for the present VLSI industries.

Potential Analysis of Double Gate Vertical TFET Using 2-D Modeling for Low Power Application

Potential Analysis of Double Gate Vertical TFET Using 2-D Modeling for Low Power Application

Boundary-obstructed topological superconductor in buckled honeycomb lattice under perpendicular electric field

In this work, we show that a buckled honeycomb lattice can host a boundary-obstructed topological superconductor (BOTS) in the presence of f-wave spin-triplet pairing (fSTP). The underlying buckled structure allows for the manipulation of both chemical potential and sublattice potential using a double gate setup. Although a finite sublattice potential can stabilize the fSTP with a possible higher-order band topology, because it also breaks the relevant symmetry, the stability of the corner modes is not guaranteed. Here we show that the fSTP on the honeycomb lattice gives BOTS under nonzero sublattice potential, thus the corner modes can survive as long as the boundary is gapped. Also, by examining the large sublattice potential limit where the honeycomb lattice can be decomposed into two triangular lattices, we show that the boundary modes in the normal state are the quintessential ingredient leading to the BOTS. Thus the effective boundary Hamiltonian becomes nothing but the Hamiltonian for Kitaev chains, which eventually gives the corner modes of the BOTS.

Investigation of single-event-transient effects on n+ pocket double-gate tunnel FET

This article investigates the response of double gate tunnel effect transistors (DG-TFETs) exposed to single-event effect (SEE) radiation. The radiation effects on different regions of DG-TFET are studied for various linear energy transfers (LETs) and drain voltages. The findings show that in both vertical and horizontal radiation, the channel and tunneling junction are the radiation-sensitive parts of DG-TFETs, respectively. To enhance radiation tolerance, an n + pocket is inserted at the source/channel junction to increase recombination and decrease the collected charges after irradiation. The results demonstrate that the n + pocket DG-TFET reduces the drain transient current peak under radiation by 23% compared to conventional DG-TFET. Furthermore, the incorporation of an n + pocket enhances the transistor's performance in multiple aspects. It not only reduces the subthreshold swing (SS) but also boosts the ON current (Ion) by a significant factor of 11 compared to the conventional DG-TFET.

An Analytical Approach to Study the Impact of Traps on Ge-Source Double Gate PNPN TFET

The analytical models for surface potential, electric field, and drain current of a Ge-source double gate hetero-structure PNPN Tunnel FET are developed taking into account the oxide-semiconductor interfacial trap charges. Although other researchers have used similar modeling techniques on various structures, the proposed structure has not yet utilized them when considering the source/drain depletion region and interfacial trap charges that reflect changes in the flat band voltage. The proposed device consists of Ge-source, Si1−xGex pocket (mole fraction 0.3), and Si channel and drain. Moreover, the non-uniform concentration of trap charges is considered at the oxide/semiconductor interfaces: 1013 cm−2 at HfO2/ Si1−xGex interface and 1012 cm−2 at HfO2/Si interface. 2D Poisson’s equation is solved with the help of parabolic potential approximation and different boundary conditions to develop the surface potential model. The developed potential model is subsequently used to construct the electric field model. The drain current model of the proposed TFET is finally developed with the help of the generated electric field and some other parameters. All the developed models are validated using TCAD-simulated data. The studies show that there is good agreement between the simulated and modeled results, ensuring the applicability of the device in charge-trapped memory systems based on tunneling.

Performance Analysis of Multi-Channel-Multi-Gate-Based Junctionless Field Effect Transistor

In this paper, a multi-gate junctionless field-effect transistor with a quad gate and multiple channels has been proposed and thoroughly simulated. The proposed device offers a lower I off current of 4.34 × 10−19 A, an I on current of 4.17 × 10−06 A with an I on/I off current ratio of 9.65 × 1012, a threshold voltage of 0.86 V, a transconductance of 5 × 10−05 S, a drain-induced barrier lowering (DIBL) of 22 mV/V, and a subthreshold slope (SS) of 61.51 mV/dec. The visual contour plots of the device are also included in this study to understand the working mechanism. The larger tunneling width between the channel drain and barrier height between the source–channel interface exhibits a lower leakage current and better performance. The performance of the proposed device is also studied when the work function between the semiconductor and gate material is altered. The work function difference improves the performance metrics. Aside from that, the effects of temperature variation on the device's performance characteristics are also being studied. When the temperature varies by 33% the threshold voltage of the proposed device drops by only 7% which shows a minimum variation in the proposed device. The results obtained from the proposed device exhibit the potential of using multi-gate multi-channel junctionless field effect transistor (MCMG) device in low-power logic circuits and memory devices.

Inductive Coupling of Bipolar Signals with a Conjugate Coil Pair for an Analog Passive ECG Sensor Using a PPy-Coated pvCNT Dry Electrodes.

The wireless capture of analog differential signals from fully passive (battery-less) sensors is technically challenging but it can allow for the seamless capture of differential biosignals such as an electrocardiogram (ECG). This paper presents a novel design for the wireless capture of analog differential signals using a novel conjugate coil pair for a wireless resistive analog passive (WRAP) ECG sensor. Furthermore, we integrate this sensor with a new type of dry electrode, namely conductive polymer polypyrrole (PPy)-coated patterned vertical carbon nanotube (pvCNT) electrodes. The proposed circuit uses dual-gate depletion-mode MOSFETs to convert the differential biopotential signals to correlated drain-source resistance changes and the conjugate coil wirelessly transmits the differences of the two input signals. The circuit rejects (17.24 dB) common mode signals and passing only differential signals. We have integrated this novel design with our previously reported PPy-coated pvCNT dry ECG electrodes, fabricated on a stainless steel substrate with a diameter of 10 mm, which provided a zero-power (battery-less) ECG capture system for long duration monitoring. The scanner transmits an RF carrier signal at 8.37 MHz. The proposed ECG WRAP sensor uses only two complementary biopotential amplifier circuits, each of which has a single-depletion MOSFET. The amplitude-modulated RF signal is envelope-detected, filtered, amplified, and transmitted to a computer for signal processing. ECG signals are collected using this WRAP sensor and compared with a commercial counterpart. Due to the battery-less nature of the ECG WRAP sensor, it has the potential to be a body-worn electronic circuit patch with dry pvCNT electrodes that stably operate for a long period of time.

Modeling of magnetic sensitivity of the metal-oxide-semiconductor field-effect transistor with double gates

<span lang="EN-US">In this paper, we investigated the effect of magnetic field on the carrier transport phenomenon in metal-oxide-semiconductor field-effect transistor (MOSFET) with double gates by examining the behavior of the semiconductor under the Lorentz force and a constant magnetic field. Various behaviors within the channel have been simulated including the potential distribution, conduction and valence bands, total current density, total charge density and the magnetic field. The results obtained indicate that this modulation affects the electrical characteristics of the device such as on-state current (I<sub>ON</sub>), subthreshold leakage current (I<sub>OF</sub>), threshold voltage (V<sub>Th</sub>), and the Hall voltage (V<sub>H</sub>) is induced by the magnetic field. The change in threshold voltage caused by the magnetic field has been observed to affect the switching characteristics of the device, such as speed and power loss, as well as the threshold voltage V<sub>Th</sub> and (I<sub>ON</sub>/I<sub>OF</sub>) ratio. Note that it is reduced by 10-3 V. 102 for magnetic fields of ±6 and ±5.5 tesla respectively.</span>