Multicarrier Sinusoidal Pulse Width Modulation Research Articles

Voltage balancing for active power filter using dual-frequency multicarrier modulation with balanced H-bridge control

In this paper, a switching control method integrated with voltage balancing feature is presented to manage operation of single-phase 5-level cascaded H-bridge (CHB) inverter as parallel-connected active power filter (PAPF), and at the same time maintain its voltage balance. CHB inverters are always preferred for PAPF due to their dominating features of modularity, flexibility and least components count. However, inherent voltage unbalance issues of CHB inverter which is due particularly to unequal switching operation across its individual H-bridge module have always been the most troublesome when handling CHB inverter. For consistent voltage balance across each H-bridge module, proportional-integral (PI) controller for voltage balancing control and multicarrier sinusoidal pulse-width modulation (MCSPWM) for switching control have commonly been integrated together. However, these conventional approaches do not directly address the issue of unequal switching. Hence, in this work, effort is performed to allow each individual H-bridge module to operate with balance switching pattern, by evenly distributing the PWM switching signal to them. Design concept of the proposed method is modeled in MATLAB-Simulink platform. To critically assess its effectiveness, comparative analysis involving two types of highly nonlinear rectifier loads and distorted grid is performed. The presented simulation findings confirmed effectiveness of the proposed method in maintaining voltage balance of the 5-level CHB inverter when mitigating harmonics under adverse grid.

Seven‐level single‐source switched capacitor inverter with triple boosting capability and high reliability

SummaryA single‐source switched capacitor multilevel inverter (SCMLI) topology utilizing only 10 switches and 1 diode with the capability of generating seven output voltage levels and a triple voltage boosting factor is proposed in this paper. The converter has capacitors that are self‐balanced and do not require any additional circuitry. The multicarrier sinusoidal pulse width modulation (PWM) technique is used to generate various switching signals for the 10 switches. Moreover, the reliability analysis using the Markov model has been carried out to assess the lifespan of power electronic components used in the proposed converter. The converter's performance is analyzed when an open circuit fault occurs in one or multiple switches. Power loss and efficiency in the converter are calculated by PLECS software using thermal modeling. The efficiency of SCMLI was found to be 97.6% for a 300 W load. The inverter working is verified by building a 500 W prototype in the lab. The experimental results in steady‐state and dynamic conditions agree with the theoretical and simulation analysis.

An Effective Modulation Technique for Multi Level Inverters

High frequency modulation techniques play very important role in multilevel inverters MLIs. These techniques have several advantages over low frequency modulation methods where they provide lower harmonic contents and higher performance in real time adaptation. Multicarrier sinusoidal pulse width modulation MCSPWM is a common high frequency technique and control method for MLIs. The synchronization of carrier signals, complexity of hardware components and high cost are very important issues when implementing multicarrier MCSPWM in real time. This paper presents an efficient approach that can overcome the problems of multicarrier signals. The proposed approach combines the advantages of low and high frequency modulation techniques. Real time adaptation of modulation index can be achieved easily, and harmonics contents are reduced to very low levels as well. Simulation and comparison of the proposed approach with MCSPWM are presented. The proposed approach is applied and tested effectively with different topologies of MLIs.

Design of 15 level reduced switches inverter topology using multicarrier sinusoidal pulse width modulation

In this proposed paper, multicarrier sinusoidal pulse width modulation (M-SPWM) method is implemented for design of 15 level reduced switches inverter topology. This inverter topology generates 15 level output-voltage with suitablelswitching pulse production using M-SPWM and altered level of voltages are attained with distinction of modulationlindex. The split inductor is used to diminish the harmoniclcontent and flatted output current. This type of system which contains different range of different range of voltage supplies. As a result, this inverter reduces the difficulty in gating time calculation and there is no neutral point fluctuation issue. This paper illuminates the modes of switching and minimization of stress in voltage and harmonic diminution are examined. The grades of the projected multilevel inverter (MLI) system are verified using Matlab/Simulink and dsPIC controller respectively.

Multi-Level Inverter Fed Induction Motors Based on Simplified and Efficient Modulation Techniques

Speed control of three phase and single phase induction motors represents a very important issue in residential and industrial applications. This paper presents a voltage to frequency speed control of both single phase and three phase induction motors derived by multi-level inverters (MLIs). 15-level and 31-level multi-level inverters are considered. Both MLIs are operated by applying two proposed simplified and efficient modulation techniques in addition to the application of conventional multicarrier sinusoidal pulse width modulation technique MC-SPWM. The proposed modulation techniques overcome several difficulties related to MC-SPWM. The scaler voltage to frequency control method operates very well during starting along with step changes in motor speeds. Simulation results verify the high performance of the proposed modulation techniques when controlling both induction motors based on 15-level and 31-level MLIs.

Experimental Validation of Multi-Carrier Sinusoidal PWM Control of a Multi-Level H-Bridge Inverter

This paper presents an experimental validation of multi-carrier PWM of a five-level untied inverter for a PV system. The inverter is controlled by the multi-carrier sinusoidal pulse width modulation MCSPWM technique. According to the location of carriers relative to each other’s, six strategies of MCSPWM have been considered, namely PDPWM, PODPWM, APODPWM, COPWM, PSCPWM and VFPWM. The criterion for choosing the most suitable control strategy for a PV system is based on the quality of the output voltage waveform and especially its THD%. A model of the presented system has been simulated and tested in the MATLAB/Simulink environment. Using the dSPACE 1104 controller board platform, the experimental test has been implemented avid performed on a five-level cascade H-bridge inverter based on MOSFET power switches. Results show that the PSCPWM is the most desirable control technique for a PV system based on H-bridge inverters.

An Improved Conventional Diode-Clamped Multilevel Inverter Using Non-Zero Triangular- Based Unipolar Modulation Scheme

This paper presents an improved conventional diode-clamped multilevel inverter using non-zero triangular-based unipolar modulation scheme. The proposed scheme is meant to reduce the number of carrier waves, minimize the circuits of modulation scheme and obtain stabilized output voltage waveforms. Non-zero triangular-based unipolar modulation scheme is actualized by using two zero-free triangular wave carriers and two modulating sinewaves for line-to- line five level output voltage waveforms in single phase full bridge diode-clamped multilevel inverter unlike conventional multicarrier sinusoidal pulse width modulation that uses four triangular waves and one modulating sinewave for the same inverter type. The proposed system also used microcontroller in the combinational of its wave signals in order to generate the appropriate triggering signals for switching the power semiconductor switches. The proposed system has the following features: (i) It produces two distinct triggering trains (W1 and W2) meant to reduce the low and high harmonics unlike conventional modulation techniques (ii) All its carrier waves operate in continuous current mode which makes it unique from other multicarrier and other related modulation schemes (iii) it has low component counts. The proposed scheme on the conventional diode-clamped inverter produced the following results: voltage and current with total harmonic distortions of 0.4547%, stabilized 400V output voltage and 20A output current, probability results at each level of voltage and current occurrences are 0.10, 0.25, 0.25, 0.75 and 0.90; power output of 80kW, low component counts of modulation circuit scheme and experimental prototype.

A New Multicarrier Sinusoidal Pulse Width Modulation (SPWM) Strategy based on Rooted Tree Optimization (RTO) Algorithm for Reducing Total Harmonic Distortion (THD) of Switched-Capacitor Nine-level Inverter in Grid-connected PV systems

This paper proposed a new strategy of sinusoidal pulse width modulation (SPWM) technique to control three-phase nine-level switched-capacitor inverter (9LSCI) in grid-connected PV systems. The main advantage of this inverter is high voltage gain, achieved by switching the capacitors in series and parallel to boost up the output voltage using low voltage input. To improve the quality of solar energy for injection into the electrical grid, a rooted tree optimization (RTO) algorithm is used to get optimum values of initial angles of multi carriers SPWM technique, giving the lowest possible values of the total harmonic distortion (THD). The design also can maximize the efficiency of the multi-level inverter by minimizing its size using fewer components and a single DC source and reducing the rate of THD. The higher effectiveness and accuracy of the suggested RTO-SPWM technique was tested and verified in comparison to existing classical SPWM technique from the performance of PV-grid systems that it can effectively reduce the total harmonic distortion to 0.16 %.

Dual Control of Asynchronous Motor for EV Fed by 5-level Diode Clamped Multilevel Inverter using SPWM Technique

This paper presents the discussion about the working principle and simulation of three phases Induction Motor (IM) for electric vehicle fed by five level diode clamped multilevel inverter. Multilevel inverter technology has emerged recently as a very important alternative in the area of EV system. The main objective of this paper is to control the speed of an IM by using 5-level diode clamped multilevel inverter. To obtain high quality sinusoidal output voltage with reduced harmonics, multicarrier PWM control scheme is proposed for diode clamped multilevel inverter. A speed control and torque control can be achieved by using sinusoidal output voltage which has high quality by multicarrier Sinusoidal Pulse Width Modulation (SPWM) technique. The planned system is best progress in production of towering switching losses results compared with other conventional method. The proposed system is an effective replacement for the conventional method which produces high switching losses and results in poor drive performance. The simulation results reveal that the proposed circuit effectively controls the motor speed and enhances the drive performance through reduction in total harmonic distortion. Also this shows that the planned method controls the speed and torque of motor in efficient manner. Hence, the system usefulness is established through simulation.

Investigation of fault-tolerant capabilities of some recent multilevel inverter topologies

ABSTRACT In this paper, some recently proposed multilevel power converters are investigated for their fault-tolerant capabilities and improved reliability. These reported topologies are generally reduced device multilevel inverter (RD-MLIs) configurations that cannot tolerate switch failures due to absence of redundant states. Present work therefore aims to incorporate open-circuit fault-tolerant capability by adding few redundant states in switching sequences of existing topologies. The work in this paper objectively presents two existing topologies of five-level and seven-level Multi-Level Inverters (MLIs) modified for fault-tolerant (FT) capability against single switch open-circuit (OC) faults. The modification for fault-tolerant feature (FT-MLI) has intrinsic self-voltage balancing capability, low cost and control simplicity. The modified FT-MLI uses multi-carrier sinusoidal pulse-width modulation (SPWM) technique to generate control switching pulses as per desired switching sequences. Simulation and experimental results of these modified FT-MLI topologies under healthy, faulty and post-fault mode are presented and discussed. Experimental results verify the feasibility and effectiveness of these modified FT-MLI topologies which are suitable for safety-critical applications.

A Novel Switching Sequence for Asymmetrical 15-Level Packed U Cell Inverter Topology with Improved Total Harmonic Distortion

Multilevel inverters (MLIs) have a major drawback of a utilizing more number of power semiconductor components (PSC), switching losses, increasing of voltage stress on the switches while going for higher level generations. In this work, drawbacks of conventional MLI topologies have been overcome through an advanced MLI topology called packed U cell (PUC). PUC-15 level MLI topology is developed by using lesser number of PSC, so that losses and voltage stress on switch is less when compared to conventional topologies. In this article, the novel switching sequence of PUC-15 topology is developed. It controls the switching stress due to its random switching operation. The PUC-15 switching sequence is controlled by using advanced sawtooth carrier- and triangular carrier- based multi-carrier sinusoidal pulse width modulation. The functionality of novel switching sequence and PWM techniques are confirmed via simulations, and results are compared in terms of total harmonic distortion (THD) at disparate modulation indexes. The measured FFT analysis of %THD is lesser than 5% which is under IEEE-519 standard for both voltage and current.

Design, Optimization and Experimental Verification of a Low Cost Two-Microcontroller Based Single-Phase STATCOM

ABSTRACT This paper proposes the design and optimization procedure for a low cost single-phase Static Synchronous Compensator (STATCOM) based on Cascaded H-bridge Multilevel Converter (CHBMC) topology. The CHBMC consists of two series-connected identical H-bridge converters so that five voltage levels at the AC side of STATCOM are attained. After summarizing the basic STATCOM operation and the modelling of the CHBMC topology, the STATCOM model connected to a 220 V single-phase grid is simulated in order to verify closed-loop operation of the STATCOM. In this study, two PI controllers are used for reactive power control and regulating the average DC link voltage of the two H-bridge converters. The optimization of the PI controller parameters are achieved by particle swarm optimization method. Finally, the hardware design of a small power rated of single-phase STATCOM connected to 220 V grid is realized and verified experimentally. Phase shifted multi-carrier sinusoidal pulse width modulation is chosen to drive the MOSFET switches. It is shown that STATCOM is able to be operate both in capacitive and inductive mode of operation and injects the desired amount of reactive power into the grid. The advantages of the developed prototype are low-cost, easy to implement and upgradable to higher voltage/power levels.

Step‐Up seven‐level neutral‐point‐clamped inverter based topology for TL‐PVS

Single-phase transformerless inverters are widely installed in grid connected photovoltaic systems due to their outstanding advantages, namely, high efficiency, low cost and high power density. The lack of galvanic isolation leads to common-mode voltage (or current) issues, which are solved by means of modifications to topologies, control schemes and modulation strategies. This study proposes a novel multilevel inverter for single-phase transformerless photovoltaic systems. The topology is based on the neutral-point-clamped inverter, and is aimed to attenuate the leakage ground current. The latter is caused by the common-mode voltage fluctuations affecting the stray capacitances formed between the photovoltaic cells and the grounded frame. On the one hand, the proposed multilevel inverter can synthesise a seven levels output voltage, which reduces the total harmonic distortion. On the other hand, the magnitude of the output voltage can reach up to 1.5 times the DC input voltage, which eliminates the need of a voltage-boosting stage for grid interconnection. This study also presents three dedicated pulse-width modulation strategies, all of them based on the level-shifted multicarrier sinusoidal pulse-width modulation scheme. Numerical simulations and experimental tests in a 1 kW setup have been performed to evaluate the performance of the proposed topology

A new multilevel DC-AC converter topology with reduced switch using multicarrier sinusoidal pulse width modulation

Multilevel converters have a significant role in power processing control in the power system, which has some inherent features like reduced harmonics, high power & medium voltage, reduced voltage stress. In this proposed paper, a novel multilevel inverter with reduced number of switches and without passive components. The proposed inverter generates 15 level output voltage with suitable switching pulse generation using multicarrier sinusoidal pulse width modulation (MSPWM) and different level of voltages are obtained with variation of modulation index. Also coupled inductor is used to minimize the harmonic content and smoothing output current. The scheme which includes different range of unequal voltage sources. As a result, the proposed system it reduces switching control complexity and there is no voltage balancing problem. This paper elucidates the operating modes, voltage stress minimisation and harmonic reduction are discussed. The results of the proposed multilevel dc-ac converter are verified using matlab/simulink. The simulation & hardware results of the proposed inverter were verified using matlab simulink and dsPIC controller respectively, which was analysed with different voltage level and different modulation index.

Three-Phase Symmetric Cascading Z-Source Seven Levels Multilevel Inverter Excited by Multi Carrier Sinusoidal Pulse Width Modulation Scheme

The Multilevel Z sources Inverter have been documented as attractive topologies used for elevated voltage adaptation. As the digit of levels improved, the synthesized set of steps output waveform have many ladder, imminent the preferred sine waveform but the major weakness of MLI be its amplitude of ac output voltage is imperfect to DC input sources voltage summing up. To conquer this drawback seven level cascading symmetric multilevel inverter based Z source inverter have been projected. This work focuses on different multi-carrier sinusoidal PWM scheme for the seven level three phase Z source symmetric cascading inverter. Performance parameters of seven level three phase Z source symmetric cascading inverter has been analyzed. A simulation circuit model of seven level three phase Z source symmetric cascading inverter urbanized using MATLAB/SIMULINK and its presentation have been urbanized.

A Novel Architecture of Boost Dc-Link Cascaded Multilevel Inverter for Harmonic Mitigation

Present years have seen the repeated use of the Multi Level Inverters (MLI) with the Photo voltaic (PV) panel in addition more than a few research works have as well been performed in this field. In the past two eras, decreasing the amount of electronic components such as switches, dc sources in MLI are the most important research works. This proposed method principally concentrates on implementing an effective topology with decreased amount of electronic elements for MLI. Reduction in switch count creates the system cost effective. A seven level inverter (+3Vdc, -3Vdc, +2Vdc,-2Vdc and +Vdc, -Vdc and 0) with a single dc source as well as reduced loss in switching power was designed. With the help of multicarrier sinusoidal pulse-width modulation (MCSPWM) method, DC-link switching is attained. It brings about enhanced quality of attained output AC power. Simulation model of a seven-level BDCLCMLI system is designed and to examine its performance for several modulation condition

Multicarrier SPWM Control Techniques for Three Phase Eleven Level Diode Clamped Multilevel Inverter and Hybrid Inverter with Reduced Number of Components

<p class="Els-Abstract-text">A comparative analysis of three phase eleven level diode clamped multilevel inverter (DCMLI) and hybrid inverter is performed in this paper in which the later requires fewer carrier signals, less number of devices and gate drive circuits. The performance is evaluated using phase disposition (PD), alternate phase opposition disposition (APOD) and carrier overlapping (CO) sinusoidal pulse width modulation (SPWM) methods. The hybrid multilevel inverter has superior features over diode clamped multilevel inverters and is more efficient since the positive levels of the inverter that are generated by high frequency switches (level generation part), are reversed by low frequency switches (polarity generation part) when the voltage polarity is required to be changed for negative polarity. Therefore, the overall cost and complexity of the hybrid inverter are greatly reduced particularly for higher inverter output voltage levels. Simulation is performed for three phase eleven level diode clamped multilevel inverter and hybrid multilevel inverter using MATLAB/Simulink for induction motor load and the total harmonic distortion is evaluated at different load torques.</p>

Design and Simulation of Novel 11-level Inverter Scheme with Reduced Switches

This work recommends the performance of coupled inductor based novel 11-level inverter with reduced number of switches. The inverter which engender the sinusoidal output voltage by the use of split inductor with minimised total harmonic distortion (THD). The voltage stress on each controlled switching devices, capacitor balancing and switching losses can be reduced. The proposed system which gives better controlled output current and improved output voltage with moderate THD value. The switching devices of the system are controlled by using multicarrier sinusoidal pulse width modulation algorithm by comparing the carrier signals with sinusoidal signal. The simulation and experimental results of the proposed 11-level inverter system outputs are established using matlab/Simulink and dsPIC microcontroller respectively.<br /><br />

Hardware realization of DVR with 27 level multi carrier PWM based MLI

The quality of the electrical power delivered to consumers is heavily affected by the power electronics based controllers, introduced in both domestic and industrial sectors, which in turn results in malfunctioning of equipment or eventual damage. Series compensators, Shunt compensators and series-shunt compensators are some of the strategies applied to address the power quality issues effectively. In this work a series compensating device, viz. 27 level-cascaded multilevel inverter based Dynamic Voltage Restorer (DVR) with multicarrier SPWM technique is proposed to mitigate voltage swells and voltage sags. The PWM technique used in this work is Alternate Phase Opposition PWM (APODPWM), which is one of the vertical arrangement multicarrier sinusoidal pulse width modulation techniques, to control the cascaded H-bridge inverter. The single-phase version of the proposed system is simulated to verify the effectiveness in addressing voltage issues and it is found that the obtained simulation results are satisfactory. The THD is found to be 3.40%, which is well below IEEE standards apart from considerable improvement in response time. The prototype of the proposed model is developed and the pic-microcontroller PIC16F887 is employed to implement the APODPWM. The experimental results obtained from the prototype are compared with the respective simulation results and they match with reasonable accuracy.

Multicarrier-Based PWM Strategies With Complete Voltage Balance Control for NNPC Inverters

Compared with multilevel space vector modulation, level-shifted multicarrier sinusoidal pulsewidth modulation (SPWM) for nested neutral point-clamped (NNPC) inverters requires much less calculations and implementation efforts, but the existing conventional SPWM cannot suppress the severe flying-capacitor (FC) voltage ripples under low output-frequency conditions. In order to solve this problem, a multicarrier-based PWM strategy with complete voltage balance control (VBC) capacity is proposed in this paper. For NNPC inverters operating under low output-frequency conditions, two preprocessing steps, the zero-sequence injection and the modulation-signal rearrangement, are proposed before the comparisons between level-shifted carriers and modulating signals. These preprocessing steps make the average currents flowing through FCs zero, which is beneficial to greatly reduce the FC voltage ripples under low output-frequency conditions. Together with additional VBC, the proposed modulation can assure the FC voltages balanced under the entire output-frequency conditions. Principles and implementation processes of proposed modulation techniques and VBC methodsare elaborated in detail and compared with conventional modulation methods. Both simulation results from a 5-MVA system and experimental results based on a 5-kVA platform are presented to verify the effectiveness.