Multilevel Buck Converter Research Articles

Inverse decoupling internal model control for multilevel buck converter with constant power load

Multilevel buck converter has attracted much attention in power electronic systems for their advantages of low switching voltage stress, small filter size and easy capacity expansion. However, this kind of converter has the characteristics of multivariable, strong coupling and nonlinearity, which challenges the voltage balance of flying capacitor and the stability of output voltage. Meanwhile, a large number of electronic loads are connected to the multilevel buck converter. These loads are usually regarded as constant power loads (CPLs) with negative impedance characteristics, which seriously degrades the stability of the power system. This paper proposes an inverse decoupling internal model control strategy for a multilevel buck converter with CPL. A nonlinear mathematical model of the multilevel buck converter with CPL is built, and the reversibility of the model is analyzed based on the inverse system theory. The inverse system expression is derived, and the model is linearized and decoupled into multiple pseudo-linear subsystems, which offsets the effect of the negative impedance characteristics. By selecting filters, internal model controllers are designed for the pseudo-linear subsystems. Furthermore, the stability and robustness of the control system are explored. Compared with other control methods, experimental results show that the proposed control strategy has better dynamic regulation performance and stronger robustness against disturbances.

SOC-Based Fast and Stable Charging Control Using Multilevel DC-DC Buck Converter for EVs

In order to abate the carbon emission in the environment, electric vehicles (EVs) are being adopted across the world. Fast charging of EVs is now a point of prime concern for manufacturers. An efficient and reliable technique for rapid charging of an electric vehicle battery using a multilevel buck converter is proposed in this paper. Three-stage charging infrastructure is proposed: medium rate of charging for 0–20% SOC (State of Charge), rapid charging for 20–80% SOC, and slow charging for 80–100% SOC. The proposed approach is devised in order to extend the battery’s life expectancy. The SOC level is estimated using Coulomb’s counting method. In order to incorporate the technique, an algorithm is set to control the switching of the different levels of a three-level-buck converter. In addition, a proportional–integral (PI) controller-based current control mechanism is proposed to ensure fast and safe charging with an estimated value of charging current. The state of charge of the battery is used to estimate the overall charging current, to be supplied jointly by the three buck converters of the multilevel converter. The conduction losses are significantly reduced by the proposed multilevel structure. In order to inspect whether the proposed system is stable, a stability analysis is carried out using a Bode Plot. MATLAB/SIMULINK is used to validate the outcomes of the proposed system using a 48 V, 100 Ah Li-ion battery. A comparative analysis is presented to demonstrate the suitability of the proposed charging solution.

Simplified Gate Driver Design Technique for Multi-MHz Switching GaN FETs in Three-Level Buck-Based 4G/5G Envelope Tracking

Multi-MHz switching frequency converter-based envelope tracking dc power supplies are widely adopted in modern 4G/5G communication base stations to improve the efficiency of radio frequency power transmitters. The switching loss of buck converter at MHz switching frequency increases with the input dc voltage. To obtain higher output voltage range without much compromise on the efficiency, multilevel converters with discrete low voltage gallium nitride (GaN) field-effect transistors (FETs), switching at multi-MHz frequency, are used. However, the gate driving circuit and PCB layout of a multilevel buck converter are complex and occupy major portion of the board when compared with the power GaN FETs. This article proposes a simplified gate driving technique in a cascaded bootstrapping architecture for a three-level buck converter with reduced number of components that can support up to 40 MHz switching frequency. The converter can reproduce any reference envelope signal with a maximum bandwidth of 8 MHz and output voltage variation from 6 to 42 V. Hardware prototype is developed, and experimental results are presented to validate the concept.

Step-up Transformerless Seven-level DC-AC Hybrid Topology for Interconnection of Renewable-based DC Sources to Microgrids

This article introduces a new step-up transformerless multi-level DC-AC hybrid topology for interconnecting renewable DC sources to loads or microgrids. This enabling technology incorporates the best characteristics of three modified basic topologies—a DC-DC multi-level boost converter, a DC-DC multi-level buck converter, and an H-bridge—to obtain a seven-level step-up DC-AC hybrid structure using only one DC input and nine power switches for a single-phase output with field-programmable gate array based control. The advantages of the step-up seven-level structure compared to other proposals are higher efficiency, a reduced number of power switches, and high power density associated with transformerless characteristic. Furthermore, in contrast to conventional topologies, the proposed design does not require voltage/current monitoring of the capacitors or a capacitor-balancing control scheme, and only one DC source input is used. Consequently, a high-performance configuration is obtained. The laboratory results demonstrate the validity of the design and the performance of the prototype.

A multilevel buck converter based rectifier with sinusoidal inputs and unity power factor for medium voltage (4160-7200 V) applications

A novel rectifier topology for high power (0.5 to 10 MVA) current source based AC motor drives is proposed. This rectifier is composed of a multi-winding transformer, a multi-level diode rectifier and a modified multi-level buck converter. The rectifier produces near unity input power factor and sinusoidal input current under any operating conditions. In addition, the proposed rectifier features reliable operation and low manufacturing cost. In this paper, the operating principle of the proposed rectifier is introduced. A number of design issues are investigated, which include PWM switching patterns, input power factor and line current harmonic distortion. Some design considerations such as the effect of the line inductance discrepancy on system performance are addressed. Experiments on a 5 kVA/208V four-level prototype are carried out for verification.