Abstract Efficient, compact, and reliable power electronic modules are building blocks of modern day power electronic systems. In recent times, wide bandgap semiconductor devices, such as, silicon carbide (SiC) and gallium nitride (GaN), are widely investigated and used in the power electronic modules to realize power dense, highly efficient, and fast switching modules for various applications. For high power applications is it required to parallel and series several devices to achieve high current and high voltage specifications, which results in larger current conducting traces. One of the major obstacles in using these wideband gap power semiconductor devices are the internal module stray inductance that is associated with these current conducting traces. With increasing demand for higher switching frequency, the internal module parasitic inductance must be reduced to as minimum as possible in order to utilize the full potential of the wide bandgap devices. A multi-layer approach of low-temperature co-fired ceramic (LTCC) to package the wide bandgap devices is investigated. The multi-layer design freedom by using LTCC can be utilized to reduce the footprint of the overall power module, electrical interconnects, hence, reducing the package parasitic inductance. LTCC also facilitates high temperature operations and has a coefficient of thermal expansion matching with wide bandgap devices. In this paper, we report on a LTCC based power module design where LTCC is utilized as an isolation layer between the source and the drain of the power devices. A simulation based parasitic inductance analysis and electro-thermal-mechanical study is performed using ANSYS Workbench Tools to investigate the feasibility of this LTCC based design.
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