Mobility Of Thin-film Transistors Research Articles

Fabrication of In(0.75)Zn(1.5)Sn(1.0) (IZTO) Thin-Film Transistors Using Solution-Processable Materials and PZT Inkjet-Printing.

Recently, Thin Film Transistors (TFTs) have been studied widely because of potential applications in low cost, low-temperature process and flexible displays. They can be fabricated by easy processes based on solution methods. But the mobility of organic TFTs is lower and the threshold voltage is higher than amorphous Si TFTs. In order to enhance the channel mobility and satisfy with the requirement of low-cost fabrication, we prepare a low-cost, mask-free, reduced material wastage, deposited technology using transparent, directly printable, air-stable semiconductor slurries and dielectric solutions. In our investigations, we attempt to obtain a high performance and low-cost TFT via preparing materials, designing device structure, and using PZT inkjet-printing technology. A stable and non-precipitated metal oxide ink with appropriate doping was prepared for the fabrication of an InxZn1.5Sn1.0 (IZTO) by PZT inkjet-printing. The soluble direct-printing process is a powerful tool for material research and implies that the printable materials and the printing technology enable the use of all-printed low-cost flexible displays and other transparent electronic applications. Transparent materials including dielectric PVP, conductive carbon nanotube (CNT) and active IZTO were employed into the fabrication of our PZT inkjet-printing process. After annealed at 180 °C, The experimental all-printed TFT exhibit the carrier mobility of 0.194 cm2/Vs, sub-threshold slope of 20 V/decade, and the threshold voltage of 5 V, initially. All-inkjet-printed films have great transparency, potentially in transparent electronics and the transmittance pattern in visible part of the spectrum (400–700 nm) is over 80%.

Microwave Annealing as a Low Thermal Budget Technique for ZnO Thin-Film Transistors Fabricated Using Atomic Layer Deposition

Microwave annealing (MWA) and furnace annealing are compared for their low thermal budget capability to improve the characteristics of ZnO-based thin-film transistors (TFTs). Both the ZnO channel and the Al2O3 gate dielectric are fabricated using atomic layer deposition. Using Si-wafer-susceptor assisted MWA with a substantial reduction of both annealing temperature and duration, significant improvements of the characteristics of the ZnO TFTs can be attained. A multi-step MWA process is found to further improve the characteristics of the TFTs. For the same microwave power and total duration, the field-effect mobility of the multi-step MWA TFT is 42% greater than that of the one-step MWA TFT with a similar sub-threshold swing. The multi-step MWA process can serve the purpose at temperatures as low as 220 °C.

Effects of TFT mobility variation in the threshold voltage compensation circuit of the OLED display

ABSTRACTA pixel circuit that compensates for the non-uniform thin-film transistor (TFT) characteristics across a display panel is inevitably used in the organic light-emitting diode (OLED) display to exhibit uniform brightness. The existing pixel circuits aim to compensate only for the non-uniformity of the threshold voltage (Vth). They do not compensate for the deviation of the other parameters, such as the mobility and the subthreshold swing. In this study, how the OLED current changes when the mobility of a TFT in the Vth compensation circuit increases was examined. If the mobility increases, the enhanced drain current drives the TFT into a deeper subthreshold mode during the Vth compensation phase, and the |VGS| of the TFT decreases compared with the normal mobility case. The resultant OLED current, however, can be higher or lower than the normal mobility case depending on the gray level because the effects of the current increase due to the higher mobility and of the current decrease due to the reduced |VGS| appear simultaneously but differently depending on the VGS value of the TFT. The analysis results show that the OLED current increases for the high gray level but decreases for the low gray level. It remains almost unaffected by the mobility increase for the mid-gray level.

High mobility thin film transistors based on zinc nitride deposited at room temperature

In this work, the characterization of high mobility thin-film transistors based on zinc nitride films deposited at room temperature by magnetron radio-frequency sputtering is presented. The values extracted of field-effect mobility were >2cm2/Vs for long channel devices. For short channel devices, a reduction of the mobility values is found and, as a result of the analysis of the width-normalized resistance for different channel lengths and gate voltages, the reduction is attributed to the effects of a high contact resistance. The impact of the gate dielectric thickness on electrical characteristics is also presented.

Morphological Influence of Solution-Processed Zinc Oxide Films on Electrical Characteristics of Thin-Film Transistors.

We report on the morphological influence of solution-processed zinc oxide (ZnO) semiconductor films on the electrical characteristics of ZnO thin-film transistors (TFTs). Different film morphologies were produced by controlling the spin-coating condition of a precursor solution, and the ZnO films were analyzed using atomic force microscopy, X-ray diffraction, X-ray photoemission spectroscopy, and Hall measurement. It is shown that ZnO TFTs have a superior performance in terms of the threshold voltage and field-effect mobility, when ZnO crystallites are more densely packed in the film. This is attributed to lower electrical resistivity and higher Hall mobility in a densely packed ZnO film. In the results of consecutive TFT operations, a positive shift in the threshold voltage occurred irrespective of the film morphology, but the morphological influence on the variation in the field-effect mobility was evident. The field-effect mobility in TFTs having a densely packed ZnO film increased continuously during consecutive TFT operations, which is in contrast to the mobility decrease observed in the less packed case. An analysis of the field-effect conductivities ascribes these results to the difference in energetic traps, which originate from structural defects in the ZnO films. Consequently, the morphological influence of solution-processed ZnO films on the TFT performance can be understood through the packing property of ZnO crystallites.

Investigation of oxygen and argon plasma treatment on Mg-doped InZnO thin film transistors

Mg-doped InZnO (MIZO) films were prepared by sol–gel method, and bottom-gate structured thin film transistors (TFTs) were prepared by using the MIZO films. Oxygen and argon (Ar) plasma treatments were carried out on the film and TFTs. The X-ray photoelectron spectroscopy (XPS) results show that both Ar and oxygen etching can increase the oxygen deficiencies, which effectively increase the content of carrier concentration in MIZO films. After both kinds of plasma treatment, the field effect mobility of the MIZO TFTs is greatly improved and the on/off current ratio increases two orders of magnitude.

Comprehensive Depletion-Mode Model for TFT Assessment

A comprehensive depletion-mode model is developed to describe depletion-mode thin-film transistor (TFT) behavior [1]. This model is distinctly different than the square-law model, which accurately describes enhancement-mode TFT behavior and establishes the equations normally employed for carrier mobility extraction. In the comprehensive depletion-mode model, bulk mobility (μBULK) and interface mobility (μINT) are distinguished based on the assumption that carrier transport can occur within an accumulation layer and/or within the ‘bulk’ of the channel. In this work, the comprehensive depletion-mode model is used to estimate the mobility of p-channel TFTs and solution-processed n-channel TFTs, and also to estimate the free carrier concentration of within the ‘bulk’ of the channel when a TFT exhibits depletion-mode behavior. Simulation reveals that the estimated interface mobility of a depletion-mode TFT is often overestimated when mobility is improperly extracted using the square-law model. [1] F. Zhou et al., “Mobility assessment of depletion-mode oxide thin-film transistors using the comprehensive depletion-mode model,” ECS Journal of Solid State Science and Technology, 3(9), Q3027-Q3031 (2014)

Influence of Carrier Concentration at Front- and Back-Channel on Transfer Characteristics of Bottom-Gate Ιn-Ga-Zn-O Thin-Film Transistors

High drain current (I DS) is required for thin-film transistors (TFTs) to drive next-generation high-definition and large-screen flat panel displays (FPDs). An In-Ga-Zn-O (IGZO) TFT has received considerable attention for the next-generation FPDs because it has high electron mobility (µ >10 cm2V-1s-1) and large area uniformity [1]. Previously, we reported that the I DS and an apparent field-effect mobility (µ FE) of IGZO TFT was enhanced owing to a reduction of an effective channel length (L eff) when the sheet carrier concentration (N s) at back-channel interface increased [2]. However, it has not clarified the influence of carrier concentration at either front- or back-channel on transfer characteristics of the IGZO TFT. In this research, an influence of N s at front- and back-channel on transfer characteristics of bottom-gate IGZO TFT was analysed by device simulator (ATLAS). First, physical parameters of the IGZO TFT was defined to reproduce the transfer characteristics of actual fabricated TFT which was used as reference [3] (denoted hereafter as ref.-TFT). Next, a thin layer, that was modulated the N s from 6.8×1011 to 2.5×1014 cm-2, was set at the back-channel region of the TFT as shown in Fig.1 (a) (denoted hereafter as MD-TFTs). Fig.1 (b) shows the comparison of transfer characteristics of the TFTs. From Fig.1 (b), the I DS of MD-TFTs drastically increased as compared with the ref.-TFT. In addition, it can be seen that the I DS enhancement was increased with increasing N s at back-channel. From these I DS enhancement, an apparent µ FE calculated from transfer characteristics enhanced for the MD-TFTs as shown in Fig1 (c). For the case of the N s was 6.8×1011 cm-2, an apparent µ FE was increased to 29.8 cm2V-1s-1 for sub-threshold region, whereas an apparent µ FE was almost the same as ref.-TFT at on (V GS=+20 V) region. When the N s further increased to 2.5×1013 cm-2, the overestimation of an apparent µ FE was observed for both sub-threshold and on (V GS=+20 V) region. To investigate the reason for changing apparent µ FE of MD-TFT with 6.8×1011 cm-2 with gate-voltage, current density in MD-TFT with N s of 6.8×1011 cm-2 was simulated as shown Figs.2 (a) and 2 (b). In case of sub-threshold region (V GS=+3 V), the L eff at front-channel interface drastically reduce as compared with the mask-defined channel length (L m). On the other hand, the L eff at the on (V GS=+20 V) region was unchanged to the L m. As a consequence of reduction of the L eff, it was increased to apparent µ FE of MD-TFT with 6.8×1011 cm-2 at the sub-threshold region. These results suggested that N s difference between back- and front-channel interfaces are strongly related to the carrier transport mechanism in MD-TFTs, because the carrier transport path was changed by increasing N s at front-channel with gate-voltage. As a results of further analysis by device simulator, it was revealed that the enhancement of I DS and an apparent µ FE were induced owing to the difference of N s between back- and front-channel interfaces. Detail of the results will be presented at the conference. [1] T. Kamiya, K. Nomura and H. Hosono, “Present status of amorphous In-Ga-Zn-O thin-film transistors” Sci. Technol. Adv. Mater, Vol.11, pp.044305-044328, Sept. 2010. [2] D. Koretomo, T. Toda, D. Wang and M.Furuta, “Anomalous Increase of Field-Effect Mobility in In-Ga-Zn-O Thin-Film Transistors Caused by Dry-Etching Damage Through Etching-Stopper” presented at 35-4, 15th Int. Conf. IMID, 2015.[3] Mutsumi Kimura, “Practical Guidance of Parameter Extraction for Device Simulation of Thin-Film Transistors”, J. Appl. Phys., vol.51, pp.054302-1-054302-5, April 2012 Figure 1

Influence of Passivation Layers on Characteristics of High Mobility Amorphous Indium-Zinc-Tin-Oxide Thin-Film Transistors

Amorphous oxide semiconductors (AOS) have recently attracted much attention as potential channel layer in thin film transistors (TFTs) due to high carrier mobility, transparency in visible light and room-temperature deposition. Among various materials, the TFTs based on amorphous Indium Gallium Zinc Oxide (a-IGZO) are expected to be a promising technology for the next generation novel flat panel display development [1], in particular for high resolution Liquid Cristal Display (LCD) [2]. The average field-effect mobility of TFT with sputter-deposited a-IGZO thin film as a channel layer is around 10 cm2/Vs and it’s not high enough (20 cm2/Vs) for future display applications such as ultra-high definition (UHD) display, active matrix organic light-emitting diode displays (AMOLEDs) and system driving circuits integrated with the TFT array process [3, 4]. Compared with other amorphous oxide semiconductor materials, amorphous indium-zinc-tin oxide (a-IZTO) is promising candidate for achieving high mobility oxide TFTs [5, 6]. Although the properties of oxide semiconductor films can be easily controlled by radio-frequency (RF) sputtering, the subsequent processes, particularly the passivation layer growth, often cause destructive impacts on channel layer [7]. The challenge in fabricating high performance a-IZTO TFTs actually lies in the post processes rather than in the a-IZTO film deposition. Therefore, it is necessary to investigate the effect of the passivation layers on the characteristics of a-IZTO TFTs. In this study, we investigated the effect of the plasma enhanced chemical vapor deposition (PECVD) deposited passivation layer (SiO2) on the characteristics of a-IZTO TFTs. The threshold voltage (Vth ) of the TFTs was found to be highly dependent on the deposition condition of passivation layer, which is ascribed to ion bombardment induced by PECVD process. By adjusting the post annealing temperature, the Vth of the TFTs can be well controlled to the desired range. We investigated the influence of passivation-layer deposition on the characteristics of a-InZnSnO thin-film transistors (TFTs). The threshold voltage (Vth ) of the TFTs shifted markedly as a result of the ion bombardment induced by the passivation layers above. By adjusting the post annealing temperature, the performance of the TFTs can be modulated. The a-InZnSnO TFTs after passivation exhibited good performance with a field-effect mobility of 21.34 cm2 /Vs, a threshold voltage of -5.03V, and a subthreshold slope of 0.52 V/decade. Reference [1] M. A. Marrs, C. D. Moyer, E. J. Bawolek, et al., " Control of Threshold Voltage and Saturation Mobility Using Dual-Active-Layer Device Based on Amorphous Mixed Metal–Oxide–Semiconductor on Flexible Plastic Substrates," IEEE Transactions on Electron Devices, vol. 58, pp. 3428-3434, 2011. [2] T. Kamiya, K. Nomura, and H. Hosono, “Present status of amorphous In-Ga-Zn-O thin-film transistors,” Sci. Technol. Adv. Mater., vol. 11, no. 4, Aug. 2010, Art ID 044305. [3] J. U. Bae, D. H. Kim, K. Kim, K. Jung, W. Shin, I. Kang and S. Yeo, “Development of oxide TFT’s structures,” in SID Symp. Dig., Jun. 2013, vol. 44, no. 1, pp. 89–92. [4] L.F. Teng, P.T. Liu, Y.J. Lo, and Y.J. Lee, “Effects of microwave annealing on electrical enhancement of amorphous oxide semiconductor thin film transistor,” Appl. Phys. Lett., vol. 101, no. 13, p. 132901, Sep. 2012. [5] K. Jang, J. Raja, Y.J. Lee, D. Kim, and J. Yi, “Effects of carrier concentration, indium content, and crystallinity on the electrical properties of indium-tin-zinc-oxide thin-film transistors,” IEEE Electron Device Lett., vol. 34, no. 9, pp. 1151–1153, Sep. 2013. [6] N. Morosawa et al., “High-mobility self-aligned top-gate oxide TFT for high-resolution AM-OLED,” in SID Symp. Dig., Jun. 2013, vol. 44, no. 1, pp. 85–88. [7] T. T. T. Nguyen, B. Aventurier, T. Terlier, J. P. Barnes, and F. Templier, “Impact of Passivation Conditions on Characteristics of Bottom-Gate IGZO Thin-Film Transistors,” J. Display Technol., vol. 11, no. 6, pp. 554–558, June. 2015

(Invited) Unseeded Growth of Poly-Crystalline Ge with (111) Surface Orientation on Insulator by Pulsed Green Laser Annealing

Thin-film transistors (TFTs) with a high channel mobility for both electrons and holes are required for the three-dimension large scale integrations or system-on-panels. Lower temperature process is more favorable for TFT fabrication because the application of plastic substrate to system-on-panels is expected to add the flexibility function. Germanium (Ge) has higher hole and electron mobilities than Si, suggesting that large-grain poly-crystalline or single-crystalline Ge thin films lead to high channel mobility TFTs. This paper describes unseeded growth of poly-crystalline Ge with well-oriented large-size grains on insulator from amorphous Ge by scanning pulsed green laser annealing. In experimental, a 50-nm-thick amorphous Ge layer was deposited on a Si substrate with a 50-nm-thick SiO2 film. The Ge layer was patterned to narrow stripes of 2-µm-width. Then a capping layer of 650-nm-thick SiO2 was deposited. For this processed template, a scanning pulse green laser annealing was performed. Q-switch Nd:YAG laser beam with the following properties was used for annealing; a Gaussian line beam of 70 x 1400 µm2 at a laser wavelength of 532 nm, a pulse frequency of 7.5 kHz, a scanning velocity of 150 µm/s, and energy densities from 0.5 to 0.7 J/cm2. The Ge stripes were crystallized by a single scanning, where the beam was scanned perpendicular to the longitudinal direction of the beam. The Ge stripes crystallized at the optimum energy of 0.56 J/cm2 by the scanning pulsed laser annealing was characterized by electron back scattering diffraction patterns (EBSD). The EBSD mapping of normal direction to the sample surface indicates that the crystallized Ge film has (111) surface orientation in the 600 µm-long stripe. The (111) Ge crystal begins within only 2 µm after the starting point of the laser scanning. It was observed that the crystal orientation was recovered to (111) even if the prior part of crystalized Ge film was rotated from (111) surface. In the mapping of rolling direction, which corresponds to the laser scanning direction, two types of grains are dominant. One shows (101) and the other shows (112) for the laser scanning direction. From the normal direction and rolling direction images of EBSD, the Ge stripes were crystallized with the grains of 2 µm wide and ~10 µm long. The maximum grain length of 20 µm was also observed. Raman scattering was measured to evaluate the crystalline quality of the (111) surface-oriented Ge stripes. The full-width at half-maximum of 2.35 cm-1 shows good crystal quality of the film, which is smaller than the values of 3.2-3.3 cm-1 for the single crystalline Ge film obtained by lateral liquid-phase epitaxy from a Si seed. For laser fluence dependence, Ge stripes were not crystallized when the fluence was smaller than 0.56 J/cm2, and Ge stripes show non-oriented crystal with a long grain boundary in the center of stripe width when the fluence was larger than 0.67 J/cm2. Simulation analyses of thermal diffusion reveal the crystallization process. The pulse laser irradiation heats the Ge stripe and melts it. Simultaneously the underlying Si in the outside region of the Ge stripe patterns absorbs the laser energy and is also heated up. During the cooling period after each pulse a temperature gradient between the edge and the center is produced in the molten Ge stripe, because of suppression of cooling at the edge. Then the temperature at the center of the Ge stripe drops below the solid point first rather than the center. Crystal growth occurs from the center to the edges, resulting that random nucleation at the edge is suppressed and crystal growth proceeds with controlled orientation in the Ge stripe. This crystallization method is promising to realize high-mobility (111) Ge TFTs and easily extended to the glass or plastic substrate by making amorphous Si layer, which works as a laser absorbing layer, and SiO2, which works as a heat insulating layer, on the substrate.

Full-solution-processed high mobility zinc-tin-oxide thin-film-transistors

The full solution-processed oxide thin-film-transistors (TFTs) have the advantages of transparency, ease of large-area fabrication, and low cost, offering great potential applications in switching and driving fields, and attracting extensive research interest. However, the performance of the solution-processed TFTs is generally lower than that of the vacuum-deposited ones. In this article, the full-solution processed TFTs with zinc-tin-oxide (ZTO) semiconductor and aluminium (Al2O3) dielectrics were fabricated, and their mobilities in the saturation region are high. Besides, the effect of the Al2O3 dielectrics’ preparation technology on ZTO TFTs’ performance was studied. Comparing the ZTO TFTs using the spin-coated Al2O3 dielectrics of 1–4 layers, the ZTO TFT with 3-layer Al2O3 dielectrics achieved the optimal performance as its field-effect carrier mobility in the saturation region is 112 cm2/V s, its threshold voltage is 2.4 V, and its on-to-off current ratio is 2.8×105. This is also the highest reported carrier mobility of the solution-processed ZTO TFTs.

The stability of tin silicon oxide thin-film transistors with different annealing temperatures

The influence of annealing temperature on the electrical properties of tin silicon oxide (TSO) thin-film transistors (TFTs) and the corresponding bias stress stability have been investigated. With increasing annealing temperature, the TSO films present a structure which is closer to crystallization, and it is conducive to the improvement of the mobility of TSO TFTs. Meanwhile, the positive bias stress (PBS) stability of TSO TFTs is ameliorated due to the decreasing traps at the interface of dielectric layer and channel layer. The threshold voltage shifts in opposite direction after being stressed under negative bias stress (NBS), which is due to the competition between electrons captured by defects related to oxygen vacancies in the channel layer and water molecule adsorption on the back channel.

Power Consumption Model for AMOLED Display Panel Based on 2T-1C Pixel Circuit

The display device has a significant contribution to the total power, which is critical for mobile consumer-electronic devices due to a limited battery capacity. We develop a power model of the active-matrix organic light-emitting diode (AMOLED) display and analyze the power contribution of thin-film transistor (TFT), OLED, and ${V_{\rm DD}}$ line drop. Both theoretical analysis and calculation are derived from TFT mobility, OLED luminous efficiency, pixel aperture ratio, and ${V_{\rm DD}}$ line drop. The TFT mobility from ${0.1}$ to ${10}\; \text{cm}^{2}/(\text{V}\cdot \text{s})$ is a bottleneck of display power. Metal oxide TFT may be more suitable for AMOLED display since relatively high mobility and low fabrication temperature. High luminous efficiency of OLED and top emission structure can decrease power consumption abundantly. The impact of copper wire technology is also discussed in large-size panels.

Carbohydrate-Assisted Combustion Synthesis To Realize High-Performance Oxide Transistors.

Owing to high carrier mobilities, good environmental/thermal stability, excellent optical transparency, and compatibility with solution processing, thin-film transistors (TFTs) based on amorphous metal oxide semiconductors (AOSs) are promising alternatives to those based on amorphous silicon (a-Si:H) and low-temperature (<600 °C) poly-silicon (LTPS). However, solution-processed display-relevant indium-gallium-tin-oxide (IGZO) TFTs suffer from low carrier mobilities and/or inferior bias-stress stability versus their sputtered counterparts. Here we report that three types of environmentally benign carbohydrates (sorbitol, sucrose, and glucose) serve as especially efficient fuels for IGZO film combustion synthesis to yield high-performance TFTs. The results indicate that these carbohydrates assist the combustion process by lowering the ignition threshold temperature and, for optimal stoichiometries, enhancing the reaction enthalpy. IGZO TFT mobilities are increased to >8 cm(2) V(-1) s(-1) on SiO2/Si gate dielectrics with significantly improved bias-stress stability. The first correlations between precursor combustion enthalpy and a-MO densification/charge transport are established.

Capacitance Characterization of Elastomeric Dielectrics for Applications in Intrinsically Stretchable Thin Film Transistors

Stretchable electronics exhibit unique mechanical properties to expand the applications areas of conventional electronics based on rigid wafers. Intrinsically stretchable thin film transistor is an essential component for functional stretchable electronics, which presents a great opportunity to develop mechanically compliant electronic materials. Certain elastomers have been recently adopted as the gate dielectrics, but their dielectric properties have not been thoroughly investigated for such applications. Here, a charging measurement technique with a resistor–capacitor circuit is proposed to quantify the capacitance of the dielectric layers based on elastomers. As compared with conventional methods, the technique serves as a universal approach to extract the capacitance of various elastomers under static conditions, irrespective of the charging mechanisms. This technique also offers a facile approach to reliably quantify the mobility of thin film transistors based on elastomeric dielectrics, paving the way to utilize this class of dielectrics in the development of intrinsically stretchable transistors.

P-5: A Simple Dipping Method to Improve Positive Bias Stress Stability of In-Ga-Zn-O Thin-Film Transistors using Hydrogen Peroxide

We proposed a simple dipping method for improving positive bias stability of indium gallium zinc oxide (IGZO) thin-film transistors (TFTs) with homogeneous single layer using hydrogen peroxide solution which has strong oxidation potential. The stability and field-effect mobility of IGZO TFTs were significantly improved by controlling dipping time.

Metal-induced crystallization of amorphous zinc tin oxide semiconductors for high mobility thin-film transistors

Transition tantalum induced crystallization of amorphous zinc tin oxide (a-ZTO) was observed at low temperature annealing of 300 °C. Thin-film transistors (TFTs) with an a-ZTO channel layer exhibited a reasonable field-effect mobility of 12.4 cm2/V s, subthreshold swing (SS) of 0.39 V/decade, threshold voltage (VTH) of 1.5 V, and ION/OFF ratio of ∼107. A significant improvement in the field-effect mobility (up to ∼33.5 cm2/V s) was achieved for crystallized ZTO TFTs: this improvement was accomplished without compromising the SS, VTH, or ION/OFF ratio due to the presence of a highly ordered microstructure.

High-Performance Submicrometer ZnON Thin-Film Transistors With Record Field-Effect Mobility

In this letter, we demonstrate 0.6- $\mu \text{m}$ ZnON thin-film transistors (TFTs) with the field-effect mobility of 71 cm $^{\mathrm {\mathbf {2}}}$ /V-sec, which to the best of our knowledge is the highest value ever reported on submicrometer oxide–semiconductor TFTs. The drive current, field-effect mobility, and subthreshold slope of ZnON TFTs are significantly improved as compared with their counterpart ZnO TFTs of the same channel dimensions and structure. Such an improvement in the field-effect mobility primarily results from a considerable reduction in the series source/drain (S/D) resistances because of suppression in an interfacial layer formation between Al S/D pads and the channel layer.

Flexible Low-Voltage In–Zn–O Homojunction TFTs With Beeswax Gate Dielectric on Paper Substrates

Beeswax, a natural nontoxic biological material, is used as the gate dielectric of flexible low-voltage indium–zinc-oxide (IZO)-based homojunction thin-film transistors (TFTs) on paper substrates. A high specific capacitance of 5 $\mu \text{F}$ /cm2 is measured at 1 Hz in the beeswax film due to the electric-double-layer effect. The current ON/OFF ratio, subthreshold swing, and field-effect mobility of the IZO-based TFTs on paper substrate are estimated to be $7.6\times 10 ^{6}$ , 86 mV/decade, and 14.6 cm2 /Vs, respectively. In addition, our results demonstrate that the flexible oxide-based TFTs on paper substrate show a good stability after 3000 times bending and 30 days aging testing. Such flexible low-voltage oxide-based homojunction TFTs have potential applications in portable paper electronics.

Development of Back-Channel Etched In-W-Zn-O Thin-Film Transistors

Back-channel etched (BCE) thin-film transistors (TFTs) are developed using a novel oxide semiconducting material, In-W-Zn-O (IWZO). A bi-layer structure for the IWZO oxide semiconductor layer is proposed to realize both high resistance to back-channel etching damage and high TFT mobility. The developed IWZO BCE-TFTs exhibit high mobilities of up to 20.2 ${\hbox{cm}}^{2}/{\hbox{V}}\cdot{\hbox{s}}$ .