Metal-oxide-semiconductor High Electron Mobility Transistors Research Articles

Effect of proton irradiation dose on InAlN/GaN metal-oxide semiconductor high electron mobility transistors with Al2O3 gate oxide

The effects of proton irradiation on the dc performance of InAlN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) with Al2O3 as the gate oxide were investigated. The InAlN/GaN MOSHEMTs were irradiated with doses ranging from 1 × 1013 to 1 × 1015 cm−2 at a fixed energy of 5 MeV. There was minimal damage induced in the two dimensional electron gas at the lowest irradiation dose with no measurable increase in sheet resistance, whereas a 9.7% increase of the sheet resistance was observed at the highest irradiation dose. By sharp contrast, all irradiation doses created more severe degradation in the Ohmic metal contacts, with increases of specific contact resistance from 54% to 114% over the range of doses investigated. These resulted in source-drain current–voltage decreases ranging from 96 to 242 mA/mm over this dose range. The trap density determined from temperature dependent drain current subthreshold swing measurements increased from 1.6 × 1013 cm−2 V−1 for the reference MOSHEMTs to 6.7 × 1013 cm−2 V−1 for devices irradiated with the highest dose. The carrier removal rate was 1287 ± 64 cm−1, higher than the authors previously observed in AlGaN/GaN MOSHEMTs for the same proton energy and consistent with the lower average bond energy of the InAlN.

Thermal Assessment of AlGaN/GaN MOS-HEMTs on Si Substrate Using Gd2O3 as Gate Dielectric

Thermal stability of AlGaN/GaN metal–oxide–semiconductor high-electron mobility transistors (MOS-HEMTs) and diodes using Gd2O3 is investigated by means of different thermal tests. DC and pulsed $I$ – $V$ characterization of the devices before and after the processes shows that the devices with Gd2O3 dielectric layer have more than three orders of magnitude lower leakage current, higher ON/OFF ratio of about $10^{8}$ , and better thermal stability after the long thermal storage test (500 °C, 8 days) compared with conventional devices. In addition, no hysteresis and a stable threshold voltage were observed after a short thermal test (500 °C, 5 min) in the MOS diodes, in good agreement with the lower trapping effects observed in the MOS-HEMTs.

Impact of InGaN back barrier layer on performance of AIInN/AlN/GaN MOS-HEMTs

In the present work, we have discussed the effect of InGaN back barrier on device performances of 100 nm gate length AlInN/AlN/GaN metal oxide semiconductor high electron mobility transistor (MOS-HEMT) device and a wide comparison is made with respect to without considering the back barrier layer. The InGaN layer is introduced in the intension to raise the conduction band of GaN buffer with respect to GaN channel so that there is an improvement in the carrier confinement and at the same time witnessed excellent high frequency performance. The simulations are carried out using 2D Sentaurus TCAD simulator using Hydrodynamic mobility model by taking interface traps into consideration. Due to high value of two-dimensional electron gas (2DEG) density and mobility in AlInN/AlN/GaN MOS-HEMT device, higher drain current density is achieved. Simulation are carried out for different device parameters such as transfer characteristic (Id-Vg), transconductance factor (gm), drain induced barrier lowering (DIBL), Subthreshold slope (SS), conduction band energy, transconductance generation factor (gm/Id) and electric field. We have also examined the RF performance such as, total gate capacitance (Cgg), current gain cutoff frequency (fT) and power gain cutoff frequency (fmax) of the proposed devices. Use of InGaN back barrier tends to increase threshold voltage towards more positive value, reduced DIBL, and improves SS and significant growth in (gm/Id) by 5.5%. It also helps to achieve better frequency response like substantial increase in fT up to 91 GHz with current gain 60 dB as compare to 67 GHz with 56 dB for the device without considering back barrier and increase in fmax up to 112 GHz with respect 94 GHz. These results evident that use of InGaN back barrier in such devices can be better solution for future analog and RF applications.

Oxide interfacial charge engineering towards normally-off AlN/GaN MOSHEMT

In this paper a detail insight into the role of oxide/barrier interfacial charges (Nox) for shifting the threshold voltage (VT) of AlN/GaN metal oxide semiconductor high electron mobility transistors (MOSHEMTs) is gained. A model is developed for VT considering all possible charges arise at different interfaces. To validate the model the proposed device is simulated by considering different insulators and Nox into account. It is very fascinating to observe that VT is highly sensitive towards change in Nox at higher oxide dimensions, whereas at lower dimensions Nox has very negligible effect. Normally-off operation can be achieved by increasing or decreasing Nox in MOSHEMT with Al2O3 or HfO2 as gate dielectric respectively.

High-performance enhancement-mode AlGaN/GaN MOS-HEMTs with fluorinated stack gate dielectrics and thin barrier layer**Project supported by the National Natural Science Foundation of China (Nos. 61504125, 61474101, 61106130 61076120, 61505181), and the Natural Science Foundation of Jiangsu Province of China (Nos. BK20131072, BE2012007, BK2012516).

We present high-performance enhancement-mode AlGaN/GaN metal—oxide—semiconductor high-electron mobility transistors (MOS-HEMTs) by a fluorinated gate dielectric technique. A nanolaminate of an Al2O3/LaxAl1−xO 3/Al2O3 stack (x≈0.33) grown by atomic layer deposition is employed to avoid fluorine ions implantation into the scaled barrier layer. Fabricated enhancement-mode MOS-HEMTs exhibit an excellent performance as compared to those with the conventional dielectric-last technique, delivering a large maximum drain current of 916 mA/mm and simultaneously a high peak transconductance of 342 mS/mm. The balanced DC characteristics indicate that advanced gate stack dielectrics combined with buffered fluorine ions implantation have a great potential for high speed GaN E/D-mode integrated circuit applications.

High-Performance InAlN/GaN MOSHEMTs Enabled by Atomic Layer Epitaxy MgCaO as Gate Dielectric

We have demonstrated high-performance InAlN/ GaN MOS high-electron-mobility-transistors (MOSHEMTs) with various channel lengths ( $L_{\mathrm {{ch}}}$ ) of 85–250 nm using atomic-layer-epitaxy (ALE) crystalline Mg0.25Ca0.75O as gate dielectric. With a nearly lattice matched epitaxial oxide, the interface between oxide and barrier is improved. The gate leakage current of MOSHEMT is reduced by six orders of magnitude compared with HEMT. An OFF-state leakage current of $3\times 10^{-13}$ A/mm, ON/OFF ratio of $4\times 10^{12}$ , almost ideal subthreshold swing of 62 mV/decade, low drain current noise with Hooge parameter of $10^{-4}$ , and negligible current collapse and hysteresis are realized. The 85-nm $L_{\mathrm {ch}}$ MOSHEMT also exhibits good ON-state performance with $I_{d\mathrm {max}}=2.25$ A/mm, $R_{\mathrm{\scriptscriptstyle ON}}=1.3~\Omega \cdot \textrm {mm}$ , and $g_{\mathrm {max}}=475$ mS/mm, showing that ALE MgCaO is a promising gate dielectric for GaN device applications.

Atomic Layer Deposition of Gallium Oxide Films as Gate Dielectrics in AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistors.

In this study, films of gallium oxide (Ga2O3) were prepared through remote plasma atomic layer deposition (RP-ALD) using triethylgallium and oxygen plasma. The chemical composition and optical properties of the Ga2O3 thin films were investigated; the saturation growth displayed a linear dependence with respect to the number of ALD cycles. These uniform ALD films exhibited excellent uniformity and smooth Ga2O3–GaN interfaces. An ALD Ga2O3 film was then used as the gate dielectric and surface passivation layer in a metal–oxide–semiconductor high-electron-mobility transistor (MOS-HEMT), which exhibited device performance superior to that of a corresponding conventional Schottky gate HEMT. Under similar bias conditions, the gate leakage currents of the MOS-HEMT were two orders of magnitude lower than those of the conventional HEMT, with the power-added efficiency enhanced by up to 9 %. The subthreshold swing and effective interfacial state density of the MOS-HEMT were 78 mV decade–1 and 3.62 × 1011 eV–1 cm–2, respectively. The direct-current and radio-frequency performances of the MOS-HEMT device were greater than those of the conventional HEMT. In addition, the flicker noise of the MOS-HEMT was lower than that of the conventional HEMT.

Performance Analysis of InAs/AlSb MOS-HEMT by Self-Consistent Capacitance-Voltage Characterization and Direct Tunneling Gate Leakage Current

In this paper, Capacitance-Voltage (CV) characteristics and direct tunneling gate leakage performance of InAs/AlSb Metal Oxide Semiconductor High Electron Mobility Transistor (MOS-HEMT) are investigated. 1-D coupled Schrӧdinger-Poisson equations are solved for electrostatic characterization of InAs/AlSb MOS-HEMT considering wave function penetration and strain effects. Using modified Wentzel–Kramers–Brillouin (WKB) method for transmission probability, direct tunneling gate leakage current is also calculated for the MOS-HEMT structure. Dependence of CV characteristics and direct tunneling gate leakage current on some important process and physical parameters such as oxide thickness, channel thickness, capping layer composition, gate dielectric material, doping concentration of delta layer and temperature are studied in this work. Our simulation results agree the pattern of variation with the experimental results reported by H. K. Lin et al.

Modeling on oxide dependent 2DEG sheet charge density and threshold voltage in AlGaN/GaN MOSHEMT

We have developed a physics based analytical model for the calculation of threshold voltage, two dimensional electron gas (2DEG) density and surface potential for AlGaN/GaN metal oxide semiconductor high electron mobility transistors (MOSHEMT). The developed model includes important parameters like polarization charge density at oxide/AlGaN and AlGaN/GaN interfaces, interfacial defect oxide charges and donor charges at the surface of the AlGaN barrier. The effects of two different gate oxides (Al2O3 and HfO2) are compared for the performance evaluation of the proposed MOSHEMT. The MOSHEMTs with Al2O3 dielectric have an advantage of significant increase in 2DEG up to 1.2 × 1013 cm−2 with an increase in oxide thickness up to 10 nm as compared to HfO2 dielectric MOSHEMT. The surface potential for HfO2 based device decreases from 2 to −1.6 eV within 10 nm of oxide thickness whereas for the Al2O3 based device a sharp transition of surface potential occurs from 2.8 to −8.3 eV. The variation in oxide thickness and gate metal work function of the proposed MOSHEMT shifts the threshold voltage from negative to positive realizing the enhanced mode operation. Further to validate the model, the device is simulated in Silvaco Technology Computer Aided Design (TCAD) showing good agreement with the proposed model results. The accuracy of the developed calculations of the proposed model can be used to develop a complete physics based 2DEG sheet charge density and threshold voltage model for GaN MOSHEMT devices for performance analysis.

Performance Analysis of InAs/AlSb MOS-HEMT by Self-Consistent Capacitance-Voltage Characterization and Direct Tunneling Gate Leakage Current

Recently, III-V materials have attracted great interest among researchers in exploring the substitution of the Si channel in scaled logic field-effect transistors [1]. To enhance mobility and speed, High Electron Mobility Transistors (HEMTs) are being experimented with III-V materials. As a result, different material systems for HEMTs are appearing. InAs/AlSb HEMTs have appeared as a promising device as it has electron mobility as high as 30000 cm2/Vs, fT and fMAX exceeding 230 GHz [2]. However, technological limitations are the low breakdown voltage associated with the narrow bandgap of the InAs channel and additional gate leakage current due to staggered band alignment at the InAs/AlSb heterojunction. Recently high breakdown field of 5MV/cm and reduced gate leakage current of e-beam evaporated Al2O3on top of conventional InAs/AlSb HEMT structure has been reported experimentally by H. K. Lin et al [3]. But a complete self-consistent study and gate leakage current analysis of this device are yet to be done. In this work, we have performed a complete study of Capacitance-Voltage (CV) characteristics and Direct Tunneling (DT) gate leakage current using self-consistent Schrӧdinger-Poisson method in InAs/AlSb Metal-Oxide-Semiconductor HEMT (MOS-HEMT) by varying different process parameters as well as physical parameters like oxide thickness, channel thickness, capping layer composition, dielectric variation, delta doping concentration and temperature. We have investigated CV characteristics and DT gate leakage performance of the structure shown in figure 1 [3] by self-consistent simulation of 1-D coupled Schrӧdinger and Poisson equation [4]. We have used finite difference method for solving Poisson equation [5] and hamiltonian matrix formalism [6] for solving Schrӧdinger equation numerically. Strain effect is also incorporated in this simulator [7]. DT gate leakage current is obtained using the method where transmission probability is calculated using modified Wentzel–Kramers–Brillouin (WKB) method [8]. In our work, we have calculated transmission probability using transmission line analogy [9]. The conduction band diagram and carrier profile of the device obtained from the simulation are illustrated in figure 2. Figure 3 shows the CV characteristics for different channel thicknesses. There are two cross-over points in the curve which can be justified by the change of slope of sheet carried density with respect to the gate voltage. The gate leakage current decreases with channel thicknesses and this variation is shown in figure 4. This behavior can be explained by the upshift of eigen energies in the well as channel thickness is decreased which further causes reduction of transmission probability. CV characteristics are not affected by the change in dielectric material having same Equivalent Oxide Thickness (EOT) as shown in figure 5. However, gate leakage current is significantly reduced with the replacement of high-k HfO2 in place of Al2O3shown in figure 6. This can be justified by the fact that channel sheet carrier density remains same with the variation whereas gate leakage reduces due the reduction in transmission probability with the replacement of high-k dielectric. We have investigated CV characteristics and DT gate leakage current with self-consistent method for InAs/AlSb MOS-HEMT. We have observed that gate leakage current can be significantly reduced by using high-k dielectrics or thick channel layer. Our simulation work provides consistent trends of variations with the experiments [3] and shows how the performance of InAs/AlSb MOS-HEMT can be improved by varying appropriate physical/process parameters.

Investigations on MgO-dielectric GaN/AlGaN/GaN MOS-HEMTs by using an ultrasonic spray pyrolysis deposition technique

This work investigates GaN/Al0.24Ga0.76N/GaN metal-oxide-semiconductor high electron mobility transistors (MOS-HEMTs) grown on a Si substrate with MgO gate dielectric by using the non-vacuum ultrasonic spray pyrolysis deposition (USPD) technique. The oxide layer thickness is tuned to be 30 nm with the dielectric constant of 8.8. Electron spectroscopy for chemical analysis (ESCA), secondary ion mass spectrometry (SIMS), atomic force microscopy (AFM), transmission electron microscopy (TEM), C–V, low-frequency noise spectra, and pulsed I–V measurements are performed to characterize the interface and oxide quality for the MOS-gate structure. Improved device performances have been successfully achieved for the present MOS-HEMT (Schottky-gate HEMT) design, consisting of a maximum drain-source current density (IDS, max) of 681 (500) mA/mm at VGS = 4 (2) V, IDS at VGS = 0 V (IDSS0) of 329 (289) mA/mm, gate-voltage swing (GVS) of 2.2 (1.6) V, two-terminal gate-drain breakdown voltage (BVGD) of −123 (−104) V, turn-on voltage (Von) of 1.7 (0.8) V, three-terminal off-state drain-source breakdown voltage (BVDS) of 119 (96) V, and on/off current ratio (Ion/Ioff) of 2.5 × 108 (1.2 × 103) at 300 K. Improved high-frequency and power performances are also achieved in the present MOS-HEMT design.

Improved linearity and reliability in GaN metal–oxide–semiconductor high-electron-mobility transistors using nanolaminate La2O3/SiO2 gate dielectric

Improved device performance to enable high-linearity power applications has been discussed in this study. We have compared the La2O3/SiO2 AlGaN/GaN metal–oxide–semiconductor high-electron-mobility transistors (MOS-HEMTs) with other La2O3-based (La2O3/HfO2, La2O3/CeO2 and single La2O3) MOS-HEMTs. It was found that forming lanthanum silicate films can not only improve the dielectric quality but also can improve the device characteristics. The improved gate insulation, reliability, and linearity of the 8 nm La2O3/SiO2 MOS-HEMT were demonstrated.

Al0.25Ga0.75N/GaN enhancement-mode MOS high-electron-mobility transistors with Al2O3 dielectric obtained by ozone water oxidization method

Al0.25Ga0.75N/GaN enhancement-mode (E-mode) metal–oxide–semiconductor high-electron-mobility transistors (MOS-HEMTs) obtained by the ozone water oxidization method are investigated in this work. Decreased gate leakage and reduced channel depletion are obtained by forming the Al2O3 dielectric layer of the MOS gate structure by a cost-effective oxidization method. Pulse current–voltage (I–V), low-frequency noise, and Hooge coefficient measurements are compared to verify the interface quality improved by the oxide passivation effect. In comparison, a conventional Schottky-gate HEMT device is also fabricated on the same epitaxial sample. Enhanced device gain, current drive density, breakdown, on/off current ratio, and high-temperature stability up to 450 K are also investigated in this work.

Impact of interface traps on switching behavior of normally‐OFF AlGaN/GaN MOS‐HEMTs

AbstractIn this paper, we report an experimental observation of the two‐stage turn‐on characteristic in normally‐OFF Al2O3/GaN metal‐oxide‐semiconductor high electron mobility transistors (MOS‐HEMTs) on Si substrate. The impact of oxide/GaN interface traps with different energy levels on the switching behavior of the device was extensively examined by simulation and verified by measurements. The interface traps at 0.4 eV below the bottom of the conduction band (Eit = EC‐0.4 eV) of GaN buffer with a density of Dit= 6.5×1012 cm‐2 was identified responsible for the observed two‐stage turn‐on characteristic. The weak Fermi‐level pinning (WFLP) induced by the dynamic electron filling of interface traps may hamper the electron from accumulating in the Al2O3/GaN MOS‐channel and then manifests a premature turn‐on during the switching‐on process. (© 2015 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Impact of AlN Spacer on Analog Performance of Lattice-Matched AlInN/AlN/GaN MOSHEMT

In this work, a detailed investigation of the impact of spacer layer thickness on analog performance of an AlInN/AlN/GaN metal oxide semiconductor high electron mobility transistor (MOSHEMT) is carried out. A thorough analysis of the key figure-of-merits such as threshold voltage (Vth), two-dimensional electron gas sheet charge density (ns), drain current (Id), transconductance (gm), and gate leakage current are performed for various spacer thicknesses ranging from 0.5 nm to 1.8 nm. From the two-dimensional ATLAS device simulation results, it is observed that the performance of AlInN/AlN/GaN MOSHEMT is affected by the variation of spacer thickness. Also, we have developed mathematical expressions for the evaluation of Vth, ns, Id, gm and gate leakage current for the proposed device. The model results and technology computer-aided design simulation results are verified and also found to be satisfactory. Improved sheet charge density and superior analog performance is observed due to the insertion of the AlN spacer. Suppression in the forward gate current is observed due to the insertion of the AlN spacer which made it possible to apply a high gate voltage in the transistor operation. From the fabrication point of view, it is also feasible to utilize the existing complementary metal–oxide–semiconductor process flows to fabricate the proposed device.

Surface‐oxide‐controlled InAlN/GaN MOS‐HEMTs with water vapor

We have investigated the effect of oxidant sources on the performance of InAlN/GaN metal–oxide–semiconductor high electron mobility transistors (MOS‐HEMTs). We clarified that the surface‐oxide of InAlN comprises aluminum oxide (Al2O3) and indium oxide (In2O3) when using conventional oxygen (O2) plasma, and In2O3 causes the gate leakage and current collapse of InAlN/GaN MOS‐HEMTs due to its narrow bandgap and electron traps, such as oxygen vacancies. Then, we proposed water (H2O) vapor oxidation to decrease In2O3 for the surface‐oxide by focusing on the thermal stability of intermediate hydroxide. Aluminum hydroxide [Al(OH)x] is thermally stable because it changes into Al2O3 at 300 °C. On the other hand, indium hydroxide [In(OH)x] is thermally unstable because it desorbs at 150 °C. Therefore, Al2O3 was selectively increased when using 300 °C H2O vapor because of In(OH)x desorption, and the gate leakage and current collapse were successfully reduced due to the decrease in In2O3. We concluded from these results that a key role in improving the performance of InAlN/GaN MOS‐HEMTs is decreasing In2O3 for the surface‐oxide.

Off-state drain leakage reduction by post metallization annealing for Al2 O3 /GaN/AlGaN/GaN MOSHEMTs on Si

Impact of post metallization annealing (PMA) on the off-state drain leakage (Ioff) for Al2O3/GaN/AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) on Si has been investigated. After implementation of PMA at 500 °C for 10 min in N2 ambient, the Ioff can be reduced by three orders of magnitude compared to that without PMA. In consequence, a high on/off current ratio of 108 and a steep subthreshold slope of 71 mV/dec are achieved for the MOSHEMTs. The reduction of Ioff results from the suppression of source-drain surface leakage through the interface between Al2O3 and GaN. The decrease of accumulation capacitance of the MOS capacitors (MOSCAPs) after 500 °C PMA suggests an oxidation process at the GaN surface during the high temperature annealing, which was confirmed by the increase of oxide layer thickness measured by transmission electron microscopy (TEM), and also the increase of GaO/GaN bond ratio at the Al2O3/GaN interface revealed by X-ray photoelectron spectroscopy (XPS). These results suggest that the significant reduction of Ioff after 500 °C PMA can be attributed to partial surface oxidation of the GaN cap, which suppresses the conduction path at the Al2O3/GaN interface.

Low Interface Trap Densities and Enhanced Performance of AlGaN/GaN MOS High- Electron Mobility Transistors Using Thermal Oxidized Y<sub>2</sub>O<sub>3</sub> Interlayer

AlGaN/GaN metal–oxide–semiconductor high-electron mobility transistors (MOS-HEMTs) with Y2O3 interlayer have been investigated to improve the interface quality. With the HfO2/Y2O3 stack gate dielectrics, the devices show a saturated drain current density of up to $\sim 943$ mA/mm. Meanwhile, the pulsed $I_{d}$ – $V_{g}$ measurement indicates interface traps are as low as $5.2\times 10^{{ {11}}}$ cm $^{ { {-2}}}$ , and the pulsed- $IV$ measurement exhibits great resistance to current collapse. Furthermore, the devices also present good reliability under negative bias stress. Therefore, the interface engineering based on Y2O3 has a potential to open up a new avenue to high-performance AlGaN/GaN MOS-HEMTs.

Impact of a drain field plate on the breakdown characteristics of AlInN/GaN MOSHEMT

In this paper, a novel AlInN/GaN metal oxide semiconductor high electron mobility transistor (MOSHEMT) employing the drain field plate technique is proposed and the effect of a drain field plate on the breakdown voltage (BV) is investigated. A reduction of the peak electric field is required to achieve AlInN/GaN MOSHEMTs with a high BV. The proposed AlInN/GaN MOSHEMT with both gate and drain field plates simultaneously reduces the electric field concentration at the gate and the drain edge by decreasing the potential gradient along the channel for the 2 dimensional electron gas (2DEG). The reduction in the peak electric field at the drain edge of the proposed device leads to a 57% increase in BV compared with the BV for an AlInN/GaN MOSHEMT with a gate field plate only. A significantly higher BV can be achieved by optimizing the gate-to-drain distance (Lgd), the length of the drain field plate (Ldfp) and the thickness of the SiN passivation layer thickness (TSiN). A detailed breakdown analysis of the device was carried out using Silvaco Technology Computer Aided Design (TCAD). The detailed numerical simulations were done by using the non-local energy balance (EB) transport model, which was calibrated with the previously published experimental results. The results showed a great potential for applications of the drain-field-plated AlInN/GaN MOSHEMT to deliver high currents and high powers in microwave technologies.

Study on Effect of Proton Irradiation Energy in AlGaN/GaN Metal-Oxide Semiconductor High Electron Mobility Transistors

The effects of proton irradiation energy on Al2O3/AlGaN/GaN metal oxide semiconductor high electron mobility transistors (MOSHEMT) were studied. MOSHEMTs were irradiated at different irradiation energies of 5 MeV, 10 MeV, or 15 MeV with a fixed proton dose of 5 × 1015 cm-2. After the 5 MeV, 10 MeV and 15 MeV proton irradiation, MOSHEMTs’ saturation current at gate voltage of 1V were reduced by 95.3, 68.3 and 59.8% and maximum transconductance were reduced by 88, 54.4, and 40.7% respectively. The carrier removal rate of the irradiation energy employed in this study was in the range of 127-289 cm-1, having lower energy with the highest removal rate.