Memristor SPICE Model Research Articles

Compact SPICE Model of Memristor with Barrier Modulated Considering Short- and Long-Term Memory Characteristics by IGZO Oxygen Content.

This paper introduces a compact SPICE model of a two-terminal memory with a Pd/Ti/IGZO/p+-Si structure. In this paper, short- and long-term components are systematically separated and applied in each model. Such separations are conducted by the applied bias and oxygen flow rate (OFR) during indium gallium zinc oxide (IGZO) deposition. The short- and long-term components in the potentiation and depression curves are modeled by considering the process (OFR of IGZO) and bias conditions. The compact SPICE model with the physical mechanism of SiO2 modulation is introduced, which can be useful for optimizing the specification of memristor devices.

Memristor–CMOS hybrid ultra-low-power high-speed multivibrators

Memristor–CMOS (MCM) technology enables fabrication of thin film memristors over the conventional CMOS devices and has the potential to significantly reduce the silicon-area and propagation delays in VLSI chips. The memristor not only has an extremely very useful characteristic of non-volatile memory, but also has the advantage of significantly lesser ON resistance $$R_{on}$$ and lesser undesired parasitic capacitance as compared to MOSFETs. Innovative MCM hybrid re-configurable circuits can outperform conventional CMOS-only design and hence are being considered as an important device for future digital VLSI applications. This paper presents applications of $${\mathrm{TiO}}_{2-x}$$ – $${\mathrm{TiO}}_{2}$$ memristor for digital multivibrator circuits at 45 nm CMOS technology node. The threshold adaptive memristor SPICE model has been used for design and performance-benchmarking of the proposed MCM multivibrators in circuit simulator (cadence®) at 45 nm technology node. The proposed new MCM mono-stable vibrator has a delay of merely 16 ps (98% lower delay than similar CMOS design) and requires a 45% lesser silicon area. Similarly, the proposed new MCM bi-stable vibrator has a delay of merely 5 ps (87% lower delay than similar CMOS design) and requires a 25% lesser silicon area. Moreover, the proposed MCM mono-stable and bi-stable multivibrators consume merely 0.1 $$\upmu$$ W and 0.5 $$\upmu$$ W of power, respectively, as compared to the 0.47 $$\upmu$$ W and 0.98 $$\upmu$$ W power required by corresponding CMOS-only multi-vibrators. The overall decrease in power delay product is 99% and 94%, respectively, in the proposed MCM mono-stable and bi-stable multivibrators as compared to the corresponding conventional CMOS-only multivibrators.

TiO2−x–TiO2 Memristor Applications for Programmable Analog VLSI Circuits at 45 nm CMOS Technology Node

Memristor-CMOS (MCM) technology combines CMOS processing with nano-scale memristors enabling a significant reduction in the silicon area as compared to CMOS-only counterparts. Moreover, the non-volatile memory characteristics of the memristor offers opportunity for new and innovative MCM hybrid VLSI circuits that can outperform conventional CMOS designs. MCM based hybrid, homogeneous re-configurable architectures have already gained immense popularity among digital VLSI designers. This paper explores application of $$TiO_{2-x}$$ – $$TiO_{2}$$ charge trap memristor for programmable analog VLSI applications. The threshold adaptive memristor SPICE model has been used to evaluate the performance of the memristor in electronic design automation tool in conjunction with 45 nm CMOS devices. A digitally controlled MCM analog buffer, MCM binary phase shift keying modulator and a variable gain MCM differential amplifier has been presented in this paper. The MCM analog buffer has 81% greater gain-bandwidth product than the corresponding CMOS-only buffer and has an attenuation of $$-32$$ dB when the control signal is low. A MCM differential amplifier is proposed whose gain can be varied in both directions by shifting the operating point of the memristor through control signals, proving the advantages of using MCM technology for automatic gain control and other programmable analog VLSI applications. A MCM BPSK modulator circuit is also proposed which occupies 37.2% lesser silicon area than the conventional CMOS-only BPSK modulators, thus illustrating the utility of memristor in analog switching circuits.

SPICE model of HP-memristor using PWL window function for neuromorphic system design application

The nanoscale memristor device SPICE modeling is significant for memristive circuits and neuromorphic system design applications. In this paper, a novel modified piece-wise linear (PWL) window function proposed for the nonlinear property of the memristor SPICE model. The PWL window function used here can address the shortcoming of the parabola and Heaviside- step function based typical window functions proposed in the literature, those are established by symmetrical functions. However, in most of the typical window functions, the monotonically increasing and the asymmetrical functions have not been addressed. Also, using this PWL-window function based memristor model, a binary-weighted memristor-based artificial synaptic circuit has been designed. The performance of the device model demonstrated by the efficiency of designed artificial synapse sensitivity to the external input signal.

Stochastic and novel generic scalable window function-based deterministic memristor SPICE model comparison and implementation for synaptic circuit design

A memristor is a nonlinear polarity-dependent fundamental circuit element. Due to these intrinsic properties of the device, analyzing a circuit that contains multiple memristors becomes complex. In this paper, we study the characteristics of multiple-memristor series (anti-series) and parallel (anti-parallel) connections, including their transient and stable state composite properties. Also, the existing phenomenological and physics-based memristor mathematical modeling techniques have been discussed for use in SPICE simulation environment. For making a standardized comparison between memristor stochastic and deterministic models, all models presented in this paper have been implemented in a single SPICE program. In addition to the well-known previously reported Joglekar and Biolek window functions, a modified Biolek window function and a novel generic scalable window function have been used to model the intrinsic nonlinearity of memristors effectively. Furthermore, electronic synapse circuits based on memristive devices in series and parallel connections and synaptic circuits based on CMOS transistor–memristor architecture have been presented and analyzed. Based on the obtained results, artificial synaptic circuit design limitation using a single memristor has been demonstrated.

Modeling of Mean Barrier Height Levying Various Image Forces of Metal–Insulator–Metal Structure to Enhance the Performance of Conductive Filament Based Memristor Model

Memristor manifests resistive switching based memory as its inherent property. Simple nanoscale structure, nonvolatility, low-power operation, and fast computing make it viable to compete with the emerging memory technologies. In this paper, we design the mean barrier height of metal–insulator–metal structure by imposing various image forces on it. Parabolic, triangular, and rectangular nature of image force potentials are superimposed with reported rectangular potential barrier to see their impact in tunneling current. Results revealed that the triangular image force significantly lower the barrier and results in highest current density among other barriers. Parabolic image force shows a 40% improvement in current density at higher voltage range when compared with reported hyperbolic image forces, whereas rectangular image force yield least current. The resultant relations are deployed in the existing conductive filament based memristor model to investigate the pinched hysteresis I – V characteristics. To validate our design approach, we compared the results with reported experimental data of memristor as well as spice model of memristor, which includes hyperbolic image potential. It is inferred that parabolic image potential builds better agreement with reported data as compared to others and shows a maximum off-switching current $1.74\,\times \,10^{- 3}$ A and on-switching current $0.95\times 10^{- 3}\;{\rm{A}}$ . The improved model of memristor can be employed to various applications like neuromorphic computing, logic design, and memory design.

A memristor SPICE model accounting for synaptic activity dependence.

In this work, we propose a new memristor SPICE model that accounts for the typical synaptic characteristics that have been previously demonstrated with practical memristive devices. We show that this model could account for both volatile and non-volatile memristance changes under distinct stimuli. We then demonstrate that our model is capable of supporting typical STDP with simple non-overlapping digital pulse pairs. Finally, we investigate the capability of our model to simulate the activity dependence dynamics of synaptic modification and present simulated results that are in excellent agreement with biological results.

SPICE model of memristive device using Tukey window function

This paper proposes a memristor SPICE model using the Tukey window (or tapered cosine window) function. Compared with the previously proposed models based on the boundary function, the proposed model is resistant to numerical errors. From the SPICE result of a relaxation oscillator, we observe that the proposed model can be effectively used to minimise the effect of round-off errors.

FIRST-ORDER MEMRISTOR–CAPACITOR FILTER CIRCUITS EMPLOYING HP MEMRISTOR

The memristor has drawn the worldwide attention since it has been discovered at HP laboratory on 1 May 2008. Since then many researchers are taking efforts to find its applications in various areas. In this paper, we study the filter characteristics of first-order low pass and high pass filters employing memristor with a capacitor. The paper provides a comparative analysis between low pass and high pass filter circuits that utilizing ordinary resistor or memristor with a capacitor. The theoretical analyzes are verified with SPICE simulation results using a memristor SPICE model with nonlinear dopant drift and MATLAB environment. The effect of change of the input frequency and initial resistance value of memristor on the cut-off frequencies of the presented low pass and high pass filters are investigated. The memory effect of memristor is represented by simulation results.

Two Memristor SPICE Models and Their Applications in Microwave Devices

This paper presents two simple SPICE circuit models of the memristor using two different kinds of integrators. These models expand and simplify the previous methods of solving the memristor's modeling equations presented by Hewlett–Packard Lab. The behaviors of the two memristor models are investigated when they are excited by a sinusoidal voltage source. Both models satisfy the general features of memristive systems such as having a zero-crossing property in the form of an i–v Lissajous figure. In order to explore the unique characteristics and applications of the memristor in microwave devices, first we incorporate the memristor in a microstrip transmission line as a load. We do the analysis using a finite-difference time-domain simulator integrated with a nonlinear SPICE circuit solver. Furthermore, we design a reconfigurable microstrip bandpass filter based on a memristor-loaded resonator, and utilize a memristor as a carrier-wave modulator connecting the microstrip patch antenna to the ground.

Performance Analysis of Memristor Models for RRAM Cell Array Design using SILVACO EDA

Resistive Random Access Memory (RRAM) is gaining attention as one of the prominent contenders to replace the conventional memory technologies such as SRAM, DRAM and Flash. This emerging memory uses scaled CMOS devices (22 nm or less) to form the peripheral circuits such as decoder and sense amplifier; while a non-CMOS device known as memristor is used to form the cell array. Although potentially becoming the main future memory, RRAM is anticipated to be impacted by the high manufacturing defect density that in turn might lead to quality and reliability problems. This paper presents the initial work towards producing a high quality and reliable RRAM devices. A design and simulation of three memristor SPICE models published in prominent literatures were performed using Silvaco EDA simulation tool. The aim is to identify the optimal model to be used in our RRAM design, which is based on 22 nm CMOS technology. Performance analysis shows that the model proposed by D. Biolek is suitable to be used in our RRAM design.

Analysis and modeling of resistive switching mechanism oriented to fault tolerance of resistive memory based on memristor

With the progress of the semiconductor industry, resistive memories, especially the memristor, have drawn increasing attention. The resistive memory based on memrsitor has not been commercialized mainly because of data error. Currently, there are more studies focused on fault tolerance of resistive memory. This paper studies the resistive switching mechanism which may have time-varying characteristics. Resistive switching mechanism is analyzed and its respective circuit model is established based on the memristor Spice model.

A Memristor SPICE Model Accounting for Volatile Characteristics of Practical ReRAM

Realizing large-scale circuits utilizing emerging nanoionic devices known as memristors depends on the accurate modeling of their behavior under a wide range of biasing conditions. Currently, no available SPICE memristor model accounts for both nonvolatile and volatile resistive switching characteristics, the coexistence of which has been recently demonstrated to manifest on practical ReRAM. In this letter, we present a new memristor SPICE model that introduces volatile effects, which can render a rate-dependent bipolar nonvolatile switching operation. The model is demonstrated via a number of simulation cases and is benchmarked against measured results acquired by solid-state TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ReRAM.

Research on Memristor Oriented to Resistive RAM

With the process of high integration, low power consumption, small size in the semiconductor industry, resistive RAM has drawn increasing attention. The discovery of the memristor brings much more to this study. These researches focus on resistive switching characteristics of different materials and analysis of resistive switching mechanisms. We discuss the resistive switching mechanisms of different materials in this paper and analyze different materials used in resistive RAM. Finally, simulation of memristor Spice model oriented to resistive RAM has been finished

An Improved SPICE Macromodel of Memristor for General Applications

This paper introduces an improved SPICE model of memristor using dependent sources and switches. The proposed SPICE model with two parameters in dependent current source has ideal frequency and amplitude characteristics. We simulate two circuits with memristor. The results demonstrate that the memristor can “remember” last resistance value when no current passes through it, the Amplitude Modulation (AM) circuit with memristor and op-amp is simulated under the condition of high frequency. Since the memristor has great performance in frequency there might be a possible application of the memristor to be used as modulator or demodulator in wireless communication.

An automatic gain control circuit with TiO2 memristor variable gain amplifier

An automatic gain control (AGC) topology with a variable gain amplifier utilizing a titanium dioxide (TiO2) memristor is described. A system analysis technique is developed based on the published physical charge-controlled memristor models and unique properties of this passive device. A linearized feedback loop amplitude model is used to design the AGC, and a design tradeoff analysis based on distortion performance is developed. The analysis results are verified with SPICE simulation including a TiO2 memristor SPICE model.

Memristor Model for SPICE

Memristor is drawing more and more attraction nowadays after HP Laboratory announced its invention. Since then many researchers are taking efforts to find its applications in various areas of the information technology. Among the important applications, one of the interesting issues is the research on memristor circuits. To put forward such research, there is an urgent demand to establish a memristor SPICE model, such that people could conduct SPICE simulation to obtain the performance of the memristor circuits under their investigation. This paper reports our efforts to meet the urgent demand. Based on the memristor device fabrication technology parameters, as well as the theoretical description on memristor, we first propose memristor SPICE models, then verify the effectiveness of the proposed models by applying it to some memristor circuits. Simulation results are satisfactory.