A silicon-on-ceramic (SiCer) wafer-shaped substrate, allowing a simultaneous fabrication of ceramic and silicon based microsystems is presented. The substrate, based on the recently introduced 'silicon-on-ceramic integration concept', can be processed by standard MEMS and LTCC technologies. The monolithic compound is fabricated by using lamination and pressure assisted firing of a nano patterned silicon wafer with a low temperature cofired ceramic tape (LTCC). The LTCC is adapted to silicon (TCE and morphology). LTCC functionalities such as electrical and thermal vias, passives, fluidic channels, etc.,. can be pre-processed in grid dimensions or individually. Through Silicon Vias (TSV) in the silicon layer can be combined with the vias in the LTCC. The silicon layer can be fabricated as thin as necessary for the desired functionality, whereas the insulating LTCC layer ensures the mechanical stability of the SiCer wafer. In addition, the LTCC layer includes electrical functionalities like signal routing and passive integration. Using SiCer substrates, the bigger part of back-end processes for silicon microsystems such as assembly and the crucial part of packaging, can take place before any micro structuring is generated. Thus, the influence of these processes to the sensitive micro structures can be minimized. The SiCer substrate is fundamentally temperature-stable up to 1000 °C. The fabrication steps of the SiCer substrate, particularly several options for TSV's are explained. Material characteristics and new technological approaches with the SiCer substrate are presented.