Low Energy Boron Implantation Research Articles

Formation of Ultra Shallow p+/n Junction in Silicon Using a Combination of Low-Temperature Solid Phase Epitaxy and Non-Melt Double-Pulsed Green Laser Annealing

MOSFETs scaling-down is an effective way to attain high-performance CMOS operating with lower power and leakage current. However, short channel effects have become a serious problem due to the shortening of channel length. One of the promising methods to suppress this problem is by forming a shallow, highly doped and activated source/drain extension region. Fabricating ultra shallow p+/n junction is difficult due to the channeling of boron ions and anomalous boron diffusion during fabrication processes. A combination of Ge pre-amorphization implantation, low-energy boron implantation and two-step annealing, involving low-temperature solid phase epitaxy preannealing followed by non-melt laser annealing was used for forming ultra shallow p+/n junction in silicon. The physical relationship among the regrowth of implanted layer, boron activation and diffusion, and leakage current is investigated. We have succeeded in forming ultra shallow p+/n junction with junction depth of 8 nm and sheet resistance of 920 Ω/□.

Formation of lateral thin-film 700-V insulated-gate bipolar transistors by using retrograde p-well double implantation scheme

Formation of lateral thin-film 700-V insulated-gate bipolar transistors (IGBTs) on Si-semiconductor-on-insulator (Si-SOI) substrates by using retrograde p-well double implantation scheme has been proposed. With a low thermal budget for p-well formation, retrograde high-energy boron implantation is employed to cause a high dopant concentration in the bulk region, and additional low-energy boron implantation is carried out for alleviating the surface punch-through of MOSFET (metal-oxide-semiconductor-field-effect-transistor) structure. As compared to the conventional p-well formation process, the retrograde double implantation scheme can lead to better latchup immunity, due to a considerably higher dopant concentration and thus lower well resistance in the p-well bulk region. In addition, owing to a lower surface dopant concentration, the retrograde double implantation scheme can lead to better on-state characteristics than the conventional process, while achieving comparable blocking voltage.

Scaling Properties of $\hbox{Ge}$ –$\hbox{Si}_{x}\hbox{Ge}_{1 - x}$ Core–Shell Nanowire Field-Effect Transistors

We demonstrate the fabrication of high-performance Ge-SixGe1-x core-shell nanowire field-effect transistors with highly doped source and drain, and systematically investigate their scaling properties. Highly doped source and drain regions are realized by low energy boron implantation, which enables efficient carrier injection with a contact resistance much lower than the nanowire resistance. We extract key device parameters, such as intrinsic channel resistance, carrier mobility, effective channel length, and external contact resistance, as well as benchmark the device switching speed and ON/OFF current ratio.

Boron Diffusion Behavior During the Formation of Shallow p+/n Junction Using the Combination of Ge Pre-amorphization Implantation, Pre-Annealing RTA and Post-Annealing Non-Melt Excimer Laser(NLA) Processes

In this paper, we studied the behavior of boron diffusion during the formation of shallow p+/n junction. The combination of Ge-PAI with low-energy boron implantation, pre-annealing RTA and post annealing NLA processes lead to the ultra-fast-diffusion of boron which increase the junction depth of the annealed samples.

Uphill diffusion of ultralow-energy boron implants in preamorphized silicon and silicon-on-insulator

Redistribution during annealing of low-energy boron (B) implants in silicon on insulator (SOI) structures and in bulk Si has been investigated by comparing secondary ion mass spectrometry (SIMS) and simulated profiles. All the samples have been preamorphized with Ge at different implantation energies in order to investigate the effects of the position of the damage on B diffusion. Different B doses in the range between 2×1013 and 2×1015 cm−2 and annealing temperatures between 700 and 1100 °C have been investigated. All SIMS profiles show a B pileup in the first few nanometers of the Si matrix in proximity of the Si surface. The results of our simulations, performed on samples implanted at different doses (below and above the solid solubility), indicate that the B redistribution upon annealing can be explained with a simple model which considers the presence of traps in the surface region, without considering any asymmetric behavior of the dopant diffusion. The sink region is a few monolayers (1–2 nm) for doses of 2×1013 and 2×1014 cm−2, and it extends to about 7 nm for the highest dose of 2×1015 cm−3, in the region of very high B concentration where precipitates and clusters shrink the incoming B atoms. For the two lowest B doses, the amount of B trapped at the surface is maximum at temperatures around 800 °C, when more than 80% of the implanted dopant is made immobile and electrically inactive. In our experimental conditions, i.e., preamorphization performed with constant dose and different implantation energies, the amount of trapped B increases with reducing the depth of the amorphous layer and it is higher in the bulk Si than in SOI.

Ultrashallow profiling using secondary ion mass spectrometry: Estimating junction depth error using mathematical deconvolution

As implant energies get lower and lower, significant errors can be present in junction depth measurements in secondary ion mass spectrometry (SIMS) ultrashallow depth profiling. Primary beam ion mixing is one of the main sources of errors leading to overestimation of junction depths in SIMS measurements. In this article, we systematically study the correlations between the implant profile trailing edge, junction depth and primary ion beam energy for low energy boron and arsenic implants. Using a mathematical deconvolution model proposed by Yang and Odom [Mater. Res. Soc. Symp. Proc. 669, J4–16 (2001)], we are able to estimate the error of the junction depth and consistently improve the accuracy of junction depth measurements using SIMS.

Optimization of advanced PMOS junctions using Ge, B and F co-implants

The main challenges for PMOS ultra shallow junction formation remain the transient enhanced diffusion (TED) and the solid solubility limit of boron in silicon. It has been demonstrated that low energy boron implantation and spike annealing are key in meeting the 90nm technology node ITRS requirements. To meet the 65nm technology requirements many studies have used fluorine co-implantation with boron and Si+ or Ge+ pre-amorphization (PAI) and spike annealing. Although using BF2+ can be attractive for its high throughput, self-amorphization and the presence of fluorine, many studies have shown that the fluorine successfully reduce TED, its energy needs to be well optimized with respect to the boron’s, therefore BF2+ does not present the right fluorine/boron energy ratio for the optimum junction formation. In this work we optimize the fluorine energy for boron energies down to 200eV. We show the dependence of optimized junction on Ge+ energies of 2keV and 20keV. We also demonstrate that the fluorine dose needs to be carefully optimized, otherwise a reverse effect can be observed.

Investigation on boron transient enhanced diffusion induced by the advanced P+/N ultra-shallow junction fabrication processes

In this paper, we propose to characterize boron transient enhanced diffusion (TED) for processes currently used for P+/N ultra-shallow junctions (USJ) fabrication. Indeed, the fundamental understanding of boron diffusion for low energy boron implantation is mandatory to evaluate the scalability of such processes for the coming complementary metal-oxide-semiconductor (CMOS) transistor generations. In these experiments, we characterize the boron anomalous diffusion, thanks to boron buried marker-layers obtained by epitaxial growth. B+ and BF2+ ultra-low energy (ULE) implantations and plasma doping (PLAD) using BF3 as precursor gas are carried out to compare the two techniques used for advanced USJ fabrication. Boron diffusion behaviors are analyzed via secondary ion mass spectrometry for annealing at 700°C for 5min and 15min. Finally this paper brings some physical insights explaining the technological benefit coming from PLAD technique over standard ion implantation that have been demonstrated in recent publications [F. Lallement et al., Proceedings of VLSI, Honolulu, Hawaii, USA, in press [1]].

The effects of energy non-monochromaticity of 11B ion beams on 11B diffusion

We have shown that energy contamination introduced by ion beam deceleration technology that is used to increase the beam currents available for low energy boron implants, can affect fabricated junctions adversely. A 4keV 11B beam is extracted and retarded by a potential of −3.5keV for 0.5keV 11B implantation, or by a potential of −3.8keV for 0.2keV 11B implantation. Intentional beam contamination was introduced by turning off the retarding potential to allow the 4keV 11B ions to irradiate Si wafers directly. The percentage of contamination, at levels of 0.1%, 0.2% and 0.3% was introduced. Rapid thermal annealing of all the implanted samples was performed under N2 ambient at 1050°C for 1s. The dopant tail profiles themselves are not significant if the contamination levels are low. However, the much higher damage level coming from high energy contamination increases the transient enhanced diffusion of 11B more than proportionately, resulting in considerable boron diffusion. Energy contamination at a level of 0.1% can extend the profile of 0.5keV 11B implants 10nm deeper after a 1050°C spike annealing. The study shows a highly monoenergetic beam with energy contamination less than 0.1% is required for sub-micron devices.

Advanced Thermal Processing of Ultrashallow Implanted Junctions Using Flash Lamp Annealing

The use of flash lamp annealing for ultrashallow junction formation in silicon has been described. Low energy boron and arsenic implants have been heat-treated in this way using peak temperatures in the range of and effective anneal times of 20 and . Secondary ion mass spectrometry and four-point probe measurements have been undertaken to determine the junction depth and the sheet resistance, respectively. Optimum processing conditions have been identified, under which one can obtain combinations of junction depth and sheet resistance values that meet the technology node requirements and beyond.

Tight-Binding Quantum Chemical Molecular Dynamics Study on Depth Profile Prediction in Low Energy Boron Implantation Process

Creation of shallow junction for the future generation LSI is a crucial step in semiconductor industry and low-energy boron implantation process is considered to be a key technology. In this study, we have statistically investigated the effects of orientation of implantation on the dynamic behavior of boron implantation process into hydrogen-terminated Si(001) 2×1 surface by using our original tight-binding quantum chemical molecular dynamics method, which is over 5,000 times faster than conventional first-principle molecular dynamics method. It was found that depth profile of boron implantation can be controlled by orientation of boron implantation and the shallowest implantation depth was obtained in the case of tilt angle equal to 7° among the investigated tilt angles of 0°, 7°, 15°, 22.5°, 30° and 45° at the initial boron energy of 100 eV. At the boron implantation process of over 1 keV energy the tilt angle of 7° has been employed experimentally and the same tilt angle was predicted to be the best even at low-energy region of 100 eV. Furthermore, we investigated the effect of rotation angle on the depth profile and at all the investigated tilt angles the average implantation depth becomes shallower for rotation angle of 45° that is along <011> direction, than for rotation angle of 0° that is along <001>. Hence, the shallowest depth profile was obtained in the case of tilt angle of 7° and rotation angle of 45°, where the distribution of intruded boron atom was more concentrated than for the same tilt angle but rotation angle of 0°. The effect of tilt and rotation angles on the boron implantation process has not been clarified experimentally at low-energy boron implantation process of less than 1 keV and hence we concluded that theoretical optimization of low-energy boron implantation process has been succeeded by means of our original tight-binding quantum chemical molecular dynamics method.

Dopant Distribution during Low Energy Implant Anneal Due to Photoresist Breakdown and Anneal Ambient Effects

Photoresist outgassing during low energy ion implantation can affect the dosimetry of the process as well as the distribution of implanted dopants in the silicon substrate. The gaseous by-products of photoresist breakdown can become entrapped in the substrate, thereby altering the diffusion and clustering characteristics of implanted dopants during high-temperature anneal. In addition, they can lead to charge exchange reactions with incoming ions, thus affecting the dose control of the process. The latter effect is well understood and corrected for in modern ion implantation equipment. This work examines the effects of photoresist outgassing on the distribution of boron and arsenic in silicon during anneal, the diffusion and clustering of the dopants, and effects on substrate sheet resistance. Single-crystal and preamorphized silicon substrates are used as well as oxide-covered wafers in low energy boron and arsenic implants to study the dopant behavior during anneal. High carbon concentration on the wafer surface from photoresist implants has opposite effects on boron- and arsenic-implanted silicon. The transient enhanced diffusion of boron is supressed, whereas diffusion of arsenic is enhanced, with corresponding effects on sheet resistance. These effects can be minimized by the use of a thin oxide layer on the implanted substrates and careful selection of ambient during anneal.

The Analysis of p-MOSFET Performance Degradation due to BF2Dose Loss Phenomena

Continued scaling of MOS devices requires the formation of the ultra shallow and very heavily doped junction. The simulation and experiment results show that the degradation of pMOS performance in logic and SRAM pMOS devices due to the excessive diffusion of the tail and a large amount of dose loss in the extension region. This problem comes from the high-temperature long-time deposition process for forming the spacer and the presence of fluorine which diffuses quickly to the interface with boron pairing. We have studied the method to improve the pMOS performance that includes the low-energy boron implantation, spike annealing and device structure design using TCAD simulation.ጌЀ؀㜹㐮㠻䠰㄀

Advanced front-end processes for the 45 nm CMOS technology node

The process development focus for 45 nm technology node is very firmly on the transistor and substrate. Formation of ultra-shallow, abrupt and well-activated extension regions remains one of the challenges. For p-type metal oxide semiconductor (PMOS) transistors, co-implantation of fluorine and boron in a pre-amorphised substrate can significantly improve the activation, abruptness and junction depth. Here, we show results of an optimisation study of both F and Ge energies, and of F dose. The process window for optimisation was found to be reasonably large. For n-type metal oxide semiconductor (NMOS) transistor, antimony has been investigated as an option for source/drain extension formation. This study shows that a 1 × 10 15 cm −2, 5 keV antimony (Sb) implant under solid phase epitaxial regrowth conditions can meet the 45 nm node requirements. The damage evolution has also been studied in detail using medium energy ion mass spectroscopy (MEIS). On the anneal side, we report an optimisation study of Ge pre-amorphisation energies and doses for a 1 × 10 15 cm −2, 500 eV B implant using a scanning laser millisecond anneal technique and show that under the right conditions one can get very close to the 45 nm node requirements. Full melt laser thermal processing (LTP) is another option to achieve the required junctions. The activation, diffusion and de-activation behaviour of Sb under LTP conditions has been investigated. The effects of LTP on silicon-on-insulators (SOI) wafers have also been investigated for low energy arsenic implants. It was found that careful optimisation is required due to the different thermal response of the SOI substrate compared to bulk. Ultra-shallow junction formation on SOI wafers was further investigated for low energy boron implants (200 eV–5 keV) into different SOI thicknesses and an initial comparison between B and BF 2 implants was performed. The regrowth rate of amorphous layers in bulk and SOI was measured as a function of B implant dose for 500 eV B implants.

Electrical activation in silicon-on-insulator after low energy boron implantation

We have investigated the electrical activation of implanted boron in silicon-on-insulator (SOI) material using Hall effect, four-point probe, and secondary ion mass spectrometry. Boron was implanted at energies ranging from 1keVto6.5keV with a dose of 3×1014cm−2 into bonded SOI wafers with surface silicon thickness ranging from 300Åto1600Å. In one sample set, furnace anneals at 750°C were performed in a nitrogen ambient for times ranging from 5minto48h. A second sample consisted of isochronal furnace anneals performed from 450°Cto1050°C for 30min. Significantly less activation of boron is observed in SOI at temperatures below 750°C, regardless of the implant energy and surface silicon thickness. Between 750°C and 900°C, the active dose of boron in SOI is similar to that of bulk Si. As the implant energy increases, the fractional activation in thin SOI increases, due to a reduction in boron interstitial clusters (BIC) in the surface Si layer. It is concluded that an increase in the BIC population is the likely source of the low activation observed in SOI. This may be due to an increase in the interstitial supersaturation within the surface Si layer, due to the interface acting as a reflective boundary for interstitials.

Using point defect engineering to reduce the effects of energy nonmonochromaticity of B ion beams on shallow junction formation

We have shown that energy contamination introduced by deceleration technology, for increasing the beam currents available for low energy boron implants, can affect fabricated junctions adversely. Energy contamination at a level of 0.1% can extend the profile of 0.5 keV B implants 10 nm deeper after a 1050 °C spike annealing. A highly monoenergetic beam with energy contamination less than 0.1% is required for submicron devices. Furthermore, we have used MeV implantation as a technique of point defect engineering (PDE) to control boron diffusion. PDE can reduce boron clustering and enhance boron activation. Diffusion of B in the tail region has been reduced significantly and the boron profile is much sharper. PDE lowers the critical requirement for beam purity. We conclude that shallower and sharper box-like boron junctions can be achieved by PDE with sub-keV B implants with highly monoenergetic beams.

Optimization of Fluorine Co-implantation for PMOS Source and Drain Extension Formation for 65nm Technology Node

ABSTRACTThe main challenges for PMOS ultra shallow junction formation remain the transient enhanced diffusion (TED) and the solid solubility limit of boron in silicon. It has been demonstrated that low energy boron implantation and spike annealing are key in meeting the 90 nm technology node ITRS requirements. To meet the 65 nm technology requirements many studies have used fluorine co-implantation with boron and Si+ or Ge+ pre-amorphization (PAI) and spike annealing. Although using BF+2 can be attractive for its high throughput, self-amorphization and the presence of fluorine, many studies have shown that for the fluorine to successfully reduce TED its energy needs to be well optimized with respect to the boron's, therefore BF+2 does not present the right fluorine/boron energy ratio for the optimum junction formation. In this work we optimize the fluorine energy when a deep or shallow PAI is used. We also demonstrate that the fluorine dose needs to be carefully optimized otherwise a reverse effect can be observed. We will also show that the optimized junction depends less on the Ge+ energies between 2 keV and 20 keV and when HF etch is implemented after Ge+ PAI, improvements in both the junction depth and the sheet resistance are observed.

Dislocation engineered β-FeSi 2 light emitting diodes

Room temperature β-FeSi 2 light emitting diodes have been fabricated by conventional ULSI processes using a recently developed dislocation engineering approach. The devices were fabricated by iron implantation into pre-grown abrupt silicon p–n junctions followed by low energy boron implantation to form the dislocation loops. Room temperature emission at ∼1.6 μm was obtained from most of the dislocation engineered devices, in contrast to standard ion beam synthesised β-FeSi 2 diodes, where no electroluminescence was observed.

Preamorphization-induced defects in shallow P+N junctions characterized by an ac magnetic field

ABSTRACTGermanium implantation into silicon substrate is currently used to preamorphisize the crystalline structure in order to avoid boron channeling effects in shallow P+N junction manufacturing. Nevertheless, after boron doping and rapid thermal annealing, different defects are formed within the structure, such as end of range defects which are created at the amorphous/crystalline interface. Our study concerns two types of shallow P+N junctions. These junctions were fabricated using low energy boron implantation at 3 KeV with a dose of 2×1015 cm-2 into high-energy germanium preamorphized n-type crystalline silicon substrates at 2.2 MeV with a dose of 1015 cm-2. In the first type, the preamorphization was performed at ambient temperature. In the second, the preamorphization was performed at liquid nitrogen temperature. Boron doping was followed by a Rapid Thermal Annealing (RTA) step for 15 s at 950 °C. Deep Level Transient Spectroscopy (DLTS) technique was used to characterize the defects formed in each structure. The impact of an ac magnetic field on the reverse current has been studied at a given bias, when sweeping the sample temperature. The measurements were performed under a low frequency (less than 1 kHz) magnetic field of a Vrms value of 2000 G, with sample temperature varying between 80 and 260 K. The results show a high activity of defects at low frequencies (1 and 10 Hz) for the nitrogen preamorphized sample. Moreover, this activity is observed at about 200 K which corresponds to the peak of the DLTS spectra of such sample. However, the ambient preamorphized sample characterized by a lower concentration of defects seems to be insensitive to the ac magnetic field. Therefore, it appears that the preamorphization-induced defects influence strongly the response of the junction to an applied ac magnetic field.

Efficient silicon light emitting diodes made by dislocation engineering

Efficient silicon-based light emitting diodes have been fabricated using the dislocation engineering method. Crucially this technique uses entirely conventional ULSI processes. The devices were fabricated by conventional low-energy boron implantation into silicon substrates followed by high-temperature annealing, and strong silicon band edge luminescence was observed. Dislocation engineering is also shown to reduce the thermal quenching for other material systems. Dislocation engineered β-FeSi 2 and Er light emitting devices were fabricated and room temperature electroluminescence at ∼1.5 μm was observed in both cases.