Linear Modulation Region Research Articles

An Improved Zero-Current Distortion Compensation Method for the Soft-Start of the Vienna Rectifier

This paper proposes an improved zero-current distortion compensation (IZCDC) method for the Vienna rectifier. The conventional zero-current distortion compensation (ZCDC) method modifies the reference voltages by adding an offset voltage to compensate for the zero-current distortion (ZCD). However, the reference voltages occasionally exceed the linear modulation region by the offset voltage added at the driving start-point of the Vienna rectifier, where the modulation index of phase voltage is relatively large. This causes a hard-start of the Vienna rectifier accompanied by a serious surge and distortion in the phase current. In this paper, the IZCDC method is proposed for achieving the soft-start of the Vienna rectifier. When the overmodulation occurs, the proposed method modifies the conventional offset voltage to the IZCDC component, which is involved in the adjustment of the variance of the phase current, only for a certain phase among the three phases. As the IZCDC component regulates the variance of the phase current to zero, surge and distortion in the phase current can be mitigated. As a result, the Vienna rectifier starts its operation softly while ensuring its normal operation in the transients. The effectiveness of the proposed method is verified through simulations and experimental results.

Three-Dimension Space Vector Modulation for Three-Phase Series-End Winding Voltage-Source Inverters

Series-end winding voltage-source inverters (SEW-VSIs) can effectively improve the dc-link voltage utilization and provide the capabilities to handle the zero-sequence loop. However, the existing modulation schemes for SEW-VSIs cannot fully utilize the output capability of SEW-VSIs while guaranteeing simple implementation. To this end, a three-dimensional space vector modulation (3D-SVM) scheme is proposed for driving three-phase SEW-VSIs in this paper. The modulation is conducted in the 3D-space made up of the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">α-β</i> plane and the zero-sequence-axis, and the reference voltage vector in the 3D-space is synthesized by three adjacent basic voltage vectors and the null voltage vector, which can fully utilize the output capability of three-phase SEW-VSI. Then, a convenient implementation method based on a look-up table is developed to find three basic voltage vectors adjacent to the reference voltage vector. Moreover, in the 3D-space, the feasible region and the linear modulation region of the proposed 3D-SVM are investigated. Accordingly, intuitive overmodulation between different subspaces and the switching sequence generation are developed. A series of simulation and experimental results are presented to validate the effectiveness of the proposed 3D-SVM for three-phase SEW-VSI drives.

Linear Modulation Region Expansion Strategy Based on Voltage Vector Angle Regulation for PMSM Drives With Small DC-Link Capacitor

Modulation fluctuations will decrease the linear operation range and cause the reduction of DC-link utilization for reduced DC-link capacitance motor drives. In this paper, a novel strategy for expanding the linear modulation region based on voltage vector angle regulation is proposed. The phase relationship between the voltage reference and the DC-link voltage fluctuation is carried out creatively to clarify the reduction of linear modulation margin. Based on the impedance matching method, the linear modulation region can be expanded by reducing the phase differences with the regulation of voltage vector angle. According to parameter and performance analysis of the proposed method, the DC-link utilization can be improved by 13.2%. Experimental results validate that the effectiveness of the proposed method.

Overmodulation of Six-Phase Cascaded-CSI Using Optimal Harmonics Injection

This paper proposes a new and straightforward method to extend the modulation range of the six-phase cascaded current source inverter (CSI). The proposed technique employs vector space decomposition (VSD) to mitigate the inverter current harmonics and extend the linear modulation region by about 8%. For motor drive applications, increasing the fundamental output component can reflect higher torque production capability for the same drive size, given that thermal limits are not exceeded. The extension can be realized by injecting optimized xy harmonics while keeping the amplitude of the resulting phase currents under the maximum value. The method utilizes a look-up table of optimized values of the injected harmonics to extend the modulation range. The output filter capacitor effects are also studied in this paper, and a selection approach is introduced. Finally, the experimental results of a C-CSI laboratory prototype are presented and discussed to verify the feasibility of the proposed modulation technique.

A Common-Mode Voltage Suppression Strategy Based on Double Zero-Sequence Injection PWM for Two-Level Six-Phase VSIs

A common-mode voltage (CMV) suppression strategy, namely double zero-sequence injection common-mode voltage (DZICMV), is proposed in this paper for an asymmetrical six-phase induction motor fed by two-level dual three-phase voltage source inverters (VSIs). In this strategy, the sinusoidal waveforms injected by double zero-sequence signals are employed as modulation signals, and two opposite triangular waveforms are used as carriers. The fundamental period is divided into 24 sectors. In each sector, the carrier used by the medium amplitude phase is distinct from the carriers used by the other two phases in each set of three-phase windings. Using this method, the zero vectors (000) and (111) in each set of three-phase windings can be eliminated, and the peak values of sub-CMV and total CMV can be reduced from ±Udc/2 to ±Udc/6. The experiment results show that the root mean square (RMS) value of common-mode leakage current in DZICMV can be reduced by 51.83% compared with the double zero-sequence injection PWM (DZIPWM) strategy. It is also found in the other four existing benchmark CMV suppression strategies that the peak values of sub-CMV therein are nearly all ±Udc/2, and only in the low linear modulation region could one of these strategies suppress sub-CMV peak values to ±Udc/6. However, the proposed DZICMV can suppress the sub-CMV peak values to ±Udc/6 in the whole linear modulation range. Moreover, the maximum linear modulation index of the DZICMV is 1.15, which is larger than that of the four benchmark strategies, whose maximum modulation index is 1.

An Analytical Discontinuous Space-Vector PWM for Three-Level Inverters With Unbalanced DC-Link Voltages

When faced with unbalanced dc-link voltages of three-level inverters, extra harmonics will be generated with reduced linear modulation region if the conventional pulsewidth modulation (PWM) for balanced dc-link voltages is adopted. In this article, in order to suppress output harmonics and maximize the linear modulation region, as well as to reduce switching losses, the discontinuous space-vector PWM (DSVPWM) is investigated and improved for three-level inverters with unbalanced dc-link voltages. First, subsectors in the vector diagram with unbalanced dc-link voltages are optimally redivided for low switching losses, and concisely determined by a cutting-line method. Then, the modulation waves are analytically derived based on the calculated dwell times of the vector states. And an analytical DSVPWM for dealing with unbalanced dc-link voltages is proposed and implemented by a carrier-based algorithm, which can significantly reduce the computation burden. Finally, the proposed analytical DSVPWM is verified through comparative experiments, presenting its merits of high linear modulation region, high efficiency, and relatively low output harmonics.

Neutral Voltage Modulation for Maximizing the Linear Modulation Region and Limp-Home Mode Operation of Multilevel Cascaded Inverters Under DC-Link Imbalance Conditions

This paper proposes an improved neutral voltage modulation (NVM) method for symmetrical and asymmetrical three-phase multilevel cascaded inverters (MLCIs). The maximum synthesizable space vector region is analyzed using the number of healthy inverter modules and the amplitudes of the dc-link voltages in each phase. After that, the NVM strategy is proposed to maximize the balanced three-phase output voltages in the given space vector region. The proposed method matches the polarities of the neutral and the phase voltage references as well as minimizing the neutral voltage. By using the proposed method, the linear modulation region of the three-phase MLCI are fully utilized allowing no overmodulations even under severe dc-link voltage imbalances. Moreover, the proposed NVM can synthesizes rotating voltage vectors even all modules of one phase are not available. To verify the effectiveness of the proposed method, a two-by-three MLCI prototype is built and tested. The experimental results show that the proposed method reduces the total harmonic distortion (THD) and the ripple component of the phase current by 28% and 32.8%, respectively, compared to traditional modulation strategies under severe dc-link imbalance conditions.

An Over-Modulated Model Predictive Current Control for Permanent Magnet Synchronous Motors

To improve the voltage utilization rate of DC bus and reduce the voltage vector tracking error, a finite-control-set modulated model predictive control (FCS-M2PC) with overmodulation capacity for permanent magnet synchronous motor (PMSM) incorporating penalty function is proposed in this paper. Firstly, three modulation regions are determined according to the combined action of dead-beat control and model predictive control (MPC). Secondly, three, two and one voltage vectors are applied to linear modulation region (LMR), overmodulation region I (OMR-I) and overmodulation region II (OMR-II), respectively, to synthesize the reference voltage vector. Thirdly, to obtain better steady-state performance in the whole modulation region, the optimal vector dwell-times can be obtained from the uniform penalty function defined by a set of mode parameters to minimize the error between the current references and the current predictions, rather than applying a single voltage vector in the conventional finite-control-set model predictive control (FCS-MPC). The effectiveness and superiority of the proposed method are validated experimentally.

DC-Link Voltage Balancing Modulation for Cascaded H-Bridge Converters

Cascaded H-Bridge (CHB) converters have been widely employed in various applications, providing the advantages of modularity and multilevel voltage output. However, technically the CHB converters require isolated DC-link buses, which need to be regulated individually. In this context, a control scheme for the CHB converters features the voltage balancing algorithm. The voltage balancing control is typically performed by PI controller, where its control capability is limited by linear modulation region. In this work, the modulation based voltage balancing algorithm is proposed, which extends the balancing control capability and improves the dynamic performance. The proposed method is theoretically analyzed and validated through the simulation and experimental results.

A Dual Two-Vector-Based Model Predictive Flux Control With Field-Weakening Operation for OW-PMSM Drives

This article proposes a dual two-vector-based model predictive flux control (DTV-MPFC) strategy for open winding permanent magnet synchronous motor drives with two isolated voltage source inverters (VSIs). In the MPFC strategy, the reference stator flux vector can be compensated to realize field-weakening (FW) operation by controlling the value of the cost function. However, the accuracy of the cost function based FW strategy is limited when the tracking error of the stator flux vector exists. In this article, a DTV-MPFC strategy is proposed to synthesize the reference flux increment vector precisely and the FW operation boundary is kept within the linear modulation region to enhance the FW operation performance. Each inverter applies two vectors during the control period and the switching frequency of the VSIs is minimized with the proposed strategy. When the dc-link voltages of the VSIs are unequal, the number of candidate flux increment vectors and the distribution of the space vector plane are different. A generalized vector selection and duration calculation scheme is proposed to realize the DTV-MPFC strategy in this case. Experimental studies are carried out to verify the validity and effectiveness of the proposed strategy.

A Double-Modulation-Wave PWM for Dead-Time-Effect Elimination and Synchronous Rectification in SiC-Device-Based High-Switching-Frequency Converters

The adoption of fast-switching silicon carbide (SiC) devices enables power converters to operate at high switching frequencies (e.g., 100 kHz). However, as a limiting factor at high switching frequencies, the dead-time in the conventional pulsewidth modulation (PWM) can cause significant voltage losses, bring serious low-frequency voltage/current harmonics, and reduce the linear modulation region with lower dc-link voltage utilization. Using the dead-time compensation can effectively eliminate the dead-time effect but further reduce the linear modulation region. The dead-time elimination PWM essentially has no dead-time effect. But due to the abandon of drive pulses for generating synchronous rectification, it has a lower converter efficiency, as well as current jumps at zero-crossings. In this article, to overcome the drawbacks of the conventional PWM and the dead-time elimination PWM, a double-modulation-wave PWM for dead-time-effect elimination and synchronous rectification is therefore proposed, where extra drive pulses for generating synchronous rectification are added based on the dead-time elimination PWM. The added drive pulses can also help with mitigating current jumps at zero-crossings. At last, the proposed PWM is experimentally validated and compared with the conventional PWM and the dead-time elimination PWM at 100 kHz on a three-phase converter with SiC mosfets and SiC Schottky diodes, showing the merits of low voltage losses, low output harmonics, high dc-link voltage utilization, large linear modulation region, and high efficiency.

Switched-Capacitor Voltage Boost Converter for Electric and Hybrid Electric Vehicle Drives

This article presents a switched-capacitor (SC) voltage boost converter and its control methods for implementing dc–ac and ac–dc power conversion. The SC converter employs an SC circuit augmented with the main converter circuit to the power source, thus providing unique features that cannot be attained by the traditional voltage-source inverter (VSI) or boost VSI. The additional features include doubling the area of the linear modulation region and eliminating both the large inductor in the boost dc–dc stage and the large filtering capacitor, which leads to a higher energy density and a lower cost. The SC converter concept can be applied to all dc–ac, ac–dc, ac–ac, and dc–dc power conversions. To describe the operating principle and the control, we focus on one example: a bidirectional SC converter for dc–ac and ac–dc power conversion in electric and hybrid electric vehicles. This article is accompanied by a video demonstrating the change of the modulation functions with the value of $A$ .

Hybrid PWM Scheme for Pole-Phase Modulation Induction Motor Drive Using Carrier-Based Hexagonal and Octadecagonal SVPWM

In this article, the advantages of both octadecagonal space vector pulsewidth modulation (SVPWM) and hexagonal SVPWM are explored for a pole-phase modulation (PPM) induction machine (IM) drive applications. In the proposed scheme, a hexagonal SVPWM is used in the low-speed region and octadecagonal SVPWM is used during the high-speed region to achieve better performance over the entire speed range. With this proposed operation, the linear modulation region is enhanced by 9.15% as compared to conventional three-phase SVPWM in the high-speed region. The basic two-level nine-leg inverter is used to excite the nine-phase PPM IM. The finite-element model (FEM) of the PPM IM and inverter structure is simulated using ANSYS Maxwell-2D and Simplorer environment, respectively. The proposed method is verified experimentally on the prototype model of 5-hp nine-phase IM.

Low-Capacitance Modular Multilevel Converter Operating With High Capacitor Voltage Ripples

To provide a reliable approach that can significantly decrease energy storage requirements, this paper proposes a low-capacitance modular multilevel converter (MMC) operating with high capacitor voltage ripples. In the proposed MMC with high ripples (HR-MMC), the dc value of the capacitor voltage is slightly decreased by slightly increasing the number of series-connected submodules in each arm. Therefore, the MMC can operate under a higher capacitor voltage ripple without changing the peak capacitor voltage. Evaluation shows that the cost and volume of the HR-MMC can be reduced due to the reduction of energy storage requirements. The volume reduction effect is particularly obvious. The impacts of the capacitor voltage ripple on the linear modulation region are also analyzed. The obtained active and reactive power diagram shows that the active power and capacitive reactive power ratings are not affected by the high capacitor voltage ripple. The high capacitor voltage ripple only results in a reduction of inductive reactive power rating. The correctness of the theoretical analysis and the feasibility of the HR-MMC were verified through simulations and experiments.

Multiple-Positions-Coupled Sampling Method for PMSM Three-Phase Current Reconstruction With a Single Current Sensor

Three-phase current reconstruction techniques with a single current sensor have been studied for permanent magnet synchronous machines (PMSMs) drive system due to its reducing cost and volume. In order to minimize the current reconstruction dead zone in the conventional method with a single dc-link current sensor, a strategy to couple multiple available positions through the single current sensor is proposed in this paper. With the proposed method, two independent equations of the stator currents can be obtained by sampling the single current sensor twice in both zero voltage vectors and active voltage vectors. By solving these two equations, the phase current reconstruction can be achieved accurately, which moves the current reconstruction dead zone toward six corner area of the space vector hexagon. Meanwhile, in order to guarantee the proposed method suitable in the whole linear modulation region, the suitable selection of the pulsewidth modulation switching period is analyzed in detail. Furthermore, the optimal selections of multiple sampling positions are discussed to lower the actual implementation difficulty of the proposed method. Finally, the experimental results on the PMSM demonstrate that the reconstructed phase currents with the proposed method can be always in consistent with the actual measured currents under different working conditions.

A simple dead-time compensation strategy for grid-connected voltage-sourced converters semiconductor switches

This paper presents a simple strategy to compensate the distorted currents synthesized by a grid-connected voltage source converter due to dead-time, turn-on and turn-off time delays of the semiconductor switches. The algorithm consider only the polarity of the fundamental component of the currents flowing through the converter terminals and the values of the time delays and voltage drops supplied by the manufacturers to the semiconductors devices. The presented compensation belongs to the group classified as average value compensation technique methodology since it does not change the pulse pattern of the converter's semiconductor switches. A simplified mathematical description of the effects caused by these unwanted time delays is presented and used to derive a correction factor to be added, in real time, to the converter output controller in order to compensate for its terminal voltages. The asymptotic stability and robustness of the proposed methodology is investigated redrawing the converter current controllers, designed in dq-reference frame, as proportional-resonant ones, in the abc coordinates, and adding the effect of the compensating signal in the feedback loop using the concept of describing function. In addition, the minimum value of the DC bus voltage necessary is also evaluated to ensure the operation of the converter in the linear modulation region when the compensation algorithm is active. Experimental results are presented to validate the theoretical analysis and to demonstrate the effectiveness of the proposed strategy for three different operation conditions of a grid-connected converter: (i) active power injection; (ii) active power consumption and (iii) reactive power support.

A Generalised Multifrequency PWM Strategy for Dual Three-Phase Voltage Source Converters

Pulse width modulation (PWM) strategies for the control of asymmetrical six-phase drives have been widely studied since the beginning of this century. Nevertheless, space vector modulation (SVM) techniques with multifrequency voltage injection for the control of all the degrees of freedom of the multiphase model is still a subject under research. This paper deals with this topic and introduces a generalised PWM method for a two-level voltage source converters. The architecture was derived by extending a three-phase modulator proposed as an alternative to the widely studied SVM. The proposal computes the duty times straightforwardly with a fast algorithm based on an analytical solution of the voltage-time modulation law. Theoretical derivations supported by experimental results demonstrate the proper synthesis of the multifrequency target voltage in the linear modulation region as well as good frequency behaviour of the presented modulation strategy.

Ancillary Services via VSIs in Microgrids With Maximum DC-Bus Voltage Utilization

Grid-interactive inverters allow distributed generation units to provide various ancillary services in microgrids. As the linear modulation region of inverters is restricted by the dc-bus voltage, providing ancillary services may drive the fundamental positive-sequence inverter voltage to the overmodulation region. Therefore, to operate in the linear modulation region the maximum active- and reactive-power of the inverter may have to be reduced unless pulsewidth modulation (PWM) references are adjusted. In this paper, an atypical PWM method is proposed for maximizing dc-bus utilization of grid-interactive two-level voltage source inverters (2L-VSI) providing ancillary services. Two important ancillary services, i.e., negative-sequence compensation and harmonic compensation are considered in this paper. The proposed method increases the maximum active- and reactive-power that a 2L-VSI can deliver when providing ancillary services by injecting a common-mode component in the references computed based on instantaneous reference magnitudes. The validity of the proposed technique is verified through simulation, as well as experimental data obtained using a 208-V three phase grid-connected 2L-VSI.

A three-dimensional active zero state PWM for common-mode voltage reduction of a three-phase four-leg voltage-source inverter

PurposeThis paper aims to investigate the common-mode voltage (CMV) issue of a three-phase four-leg voltage-source inverter. A new space vector modulation method, named as three-dimensional active zero state Pulse-width modulation (PWM) (3-D AZSPWM), is proposed to reduce the CMV level.Design/methodology/approachPWM is a general method to generate the switching signals of the power converters in order to obtain high-quality output voltages. However, the CMV produced by PWM methods has become a serious problem. 3-D AZSPWM is proposed to solve this issue. In 3-D AZSPWM, instead of using zero voltage vectors with high CMV level, appropriate complementary non-zero vectors are introduced to synthesize reference vector. The proposed method is classified into four types of AZSPWM1(a), AZSPWM1(b), AZSPWM2(a) and AZSPWM2(b) based on different complementary vectors chosen for each type. An extend software simulation using MATLAB/Simulink is performed to verify the superior performance of the proposed methods.FindingsCompared to other reduced CMV methods, the proposed method not only reduces the CMV but also retains the positive characteristics of the three-dimensional classical space vector PWM (3-D CSVPWM).Originality/valueThe proposed method does not suffer from linear modulation region limitation and also does not impose additional switching loss. Furthermore, calculated output voltage harmonic distortion factor illuminates acceptable quality of output voltage produced by the proposed method.

PWM Common Mode Reference Generation for Maximizing the Linear Modulation Region of CHB Converters in Islanded Microgrids

Microgrid-interactive converters are increasingly expected to provide auxiliary services, particularly during islanded microgrid operation. Unbalanced, non-sinusoidal pulse width modulation (PWM) references may be required when converters provide auxiliary services, such as negative-sequence compensation. Since PWM references cannot exceed dc-bus voltage defined limits without causing overmodulation, the maximum positive-sequence voltage producible by microgrid-interactive converters may be diminished unless reference waveforms are adjusted. In this paper, a technique for maximizing the linear modulation region by injecting a common mode component into PWM references is proposed for microgrid-interactive cascaded H-bridge (CHB) converters. The technique presented can be implemented in real-time without lookup tables, is controller independent, is compatible with any carrier-based PWM method, enabling its use for symmetric and asymmetric CHB, and enables continued operation after internal fault events when utilized with fault tolerant PWM schemes. Experimental data verify the common mode injection technique.