Double-pass tunable linear cavity gain-clamped bismuth-doped fiber amplifier

Spinal motor neurons serve as the link between the nervous system and muscles. As the final common pathway of the neuromuscular system, they receive inputs from both higher‐level controllers and afferent pathways. It is often assumed that spinal motor neurons are primarily driven by continuous common inputs (cCI) within different frequency bands. Within this framework, the motor neuron pool behaves as a linear amplifier of the cCI. This implies that the frequency content of descending and spinal oscillatory signals is preserved and faithfully transmitted to the muscles; thus, the spectral content at the output of the motor neuron pool corresponds to that of the cCI. However, this framework overlooks the possibility that motor neurons could also be driven by impulsive common inputs (iCI), which can induce synchronization among them and disrupt the linear transmission of other synaptic inputs at the pool level. To test this hypothesis, computational simulations and experimental data from two different human muscles were used to characterize different aspects related to motor neuron spiking synchronization at the pool level. Our findings suggest that, indeed, iCI can account for relevant features observed in experimental data such as the presence of synchronization events at the pool level. We also observed that such impulsive inputs can affect the linearity in the transmission of cCI by the motor neuron pool. This study represents pioneering indirect evidence of the existence of iCI as inputs to motor neurons.Key pointsThe current understanding of the motor control of voluntary movements assumes a continuous control, driven by oscillatory common signals.Some aspects of motor unit pool behaviour (particularly in terms of spiking synchronization and spectral content) typically observed in experimental recordings cannot be reproduced in simulations that only use continuous common inputs (cCI) to motor neurons.This study provides evidence indicating that spinal motor neurons receive a portion of their synaptic input in the form of impulsive common inputs (iCI) that synchronize their activity.The study also shows how such iCI can affect the linear transmission of other cCI by the motor neuron pool.These findings constitute a fundamental paradigm shift in the understanding of motor control and impact the development of interfaces that extract information from the activity of spinal motor neurons.

The parallel-form switch-linear hybrid (SLH) envelope tracking power supply (ETPS) consists of a switchedmode converter and a linear amplifier connected in parallel. To reduce the power loss of linear amplifier, a triangle-wave current control (TWCC) has been proposed to reduce the voltages across the operating power devices. The output current of the switchedmode converter tracks the load current in the shape of a lowfrequency triangle-wave for reducing its switching frequency. A buck converter is usually employed as the switched-mode converter. However, it has only two voltage levels, and thus the inductor current has only a rising or falling slew rate. For the applications where the load current has a wide slew rate variation range, the inductor current of buck converter cannot effectively track the load current, resulting in large output current of the linear amplifier and thus degrading the overall efficiency. In this paper, a multi-level converter (MLC) is employed to replace the buck converter, and the TWCC applicable to MLC is proposed to dynamically adjust the slew rate of inductor current to match that of the load current by selecting appropriate voltage levels. Thus, the tracking performance can be improved, leading to enhanced overall efficiency. A prototype designed for tracking a 10 MHz envelope signal is fabricated in the lab, which is tested with a constant resistor and an actual power amplifier, respectively. The experimental results verify the effectiveness of the proposed method.

As the semiconductor industry transitions to gate-all-around architectures such as Nanosheet-FETs (NSFETs) for the 2nm node and beyond, controlling parasitic resistance through precise junction engineering is fundamental. This requires characterization methods capable of mapping active carriers with nanometer-scale resolution. This work demonstrates a significant advancement in scanning spreading resistance microscopy (SSRM) that enables, for the first time, carrier mapping within 5.5 nm thick nanosheet channels. This was achieved through a systematic optimization of sample preparation to achieve sub-nanometer topography, the use of ultra-sharp diamond probes, and the implementation of a linear current amplifier to eliminate artifacts from slow logarithmic amplifiers. SSRM measurements of NSFETs with and without a 950°C rapid thermal anneal reveal a clear increase in phosphorus diffusion due to the higher thermal budget, with carrier profiles in excellent agreement with Kinetic Monte Carlo process simulations. This demonstrates how SSRM is a valuable characterization technique for providing direct feedback on junction formation in advanced gate-all-around devices.

This paper presents an end-to-end deep learning-based approach for orthogonal frequency-division multiplexing (OFDM) communication systems impaired by nonlinear power amplifiers (PAs) and channel fading. The PA nonlinearity is modeled using the modified Rapp model, and simulations are performed on a 64-subcarrier OFDM system with a cyclic prefix (CP) of 8 and 16-quadrature amplitude modulation (16-QAM). The proposed autoencoder-based OFDM–PA (AE-OFDM-PA) system jointly optimizes the transmitter and receiver through end-to-end learning, enabling simultaneous compensation of both PA nonlinearities and channel distortions without requiring explicit channel state information (CSI) estimation. Instead, the model leverages embedded pilot sequences to learn the implicit CSI representation directly from data, allowing the receiver to correct amplitude and phase distortions adaptively. Simulation results demonstrate that AE-OFDM-PA significantly outperforms conventional OFDM and OFDM-PA systems, achieving over 70× block error rate (BLER) improvement compared with the uncompensated OFDM-PA system at an input back-off (IBO) of 3 dB. Furthermore, the proposed method achieves approximately 11.5 dB adjacent channel leakage ratio (ACLR) improvement over the classical memory polynomial digital predistortion (DPD) technique, while slightly reducing the peak-to-average power ratio (PAPR). Overall, AE-OFDM-PA provides a robust, spectrally efficient, and low-complexity solution for nonlinear and fading environments with unknown or varying CSI.

This paper proposes an optimized digital predistortion (DPD) framework. Firstly, a peak-detection-based loop-delay estimation is developed by leveraging the unique peak distribution of Orthogonal Frequency Division Multiplexing (OFDM) signals. It reduces the required number of samples to as small as two without compromising estimation accuracy. Then, a Biased Memory Polynomial (BMP) model is proposed for power amplifier modeling. It addresses low-power inaccuracies caused by circuit imperfections (e.g., DC offsets) by adding a bias term to conventional memory polynomials, improving linearization accuracy in low-power regime. Last, to improve the accuracy of coefficient derivation, Memory-Clustering Biased Memory Polynomial (MBMP) is proposed by grouping signals into clusters based on memory-attenuated input vectors and processing them with dedicated sub-models. It improves linearization accuracy in high-power regime. Experimental results demonstrate that the MBMP model reduces normalized mean square error (NMSE) by 16.12 dB, and reduces adjacent channel power ratio (ACPR) by about 12 dBm compared to conventional MP.

As 5G networks transition toward Ultra-Dense Networks (UDN) to meet the demand for multi-Gbps data rates, especially in indoor environments, they face significant physical-layer impairments. One of the most critical challenges is Passive Intermodulation (PIM), which is defined as unwanted emissions resulting from non-linearities in RF circuitry, connectors, and adjacent metallic structures. In Massive MIMO systems, the high density of antenna elements and the use of complex beamforming architectures significantly increase the likelihood of intermodulation products falling within the device's receiver band, leading to receiver sensitivity degradation. This research analyzes PIM challenges in the context of LTE/NR Dual Connectivity, where simultaneous transmissions in "difficult band combinations" generate self-interference that complicates the link budget. Furthermore, the study explores how the dense deployment of small cells in indoor scenarios amplifies these effects due to signal proximity and shared spectrum resources. Potential mitigation strategies, including advanced RF filtering, improved power amplifier linearization, and spatial coordination between access nodes, are evaluated to ensure the required network reliability and capacity.

This paper introduces a novel and generalized synthesis approach for realizing highly selective filtering amplifiers (FAs) based on a new type of Extracted-Pole Matching Filter (EPMF). Conventional FA designs often face significant trade-offs between high-order filter selectivity, integration compactness, and synthesis complexity, particularly when realizing non-bandpass responses. The proposed EPMF technique addresses these challenges by exploiting the inherent merits of the Extracted-Pole (EP) topology, which readily provides multiple, precisely controllable transmission zeros (TZs) within a compact, inline configuration. This allows the EPMF to serve as a matching network (MN) that simultaneously absorbs frequency-dependent complex impedances (from source <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Z_S</i> to load <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Z_L</i>) while shaping highly selective quasi-elliptic low-pass (LP), high-pass (HP), and band-pass (BP) filter responses. The comprehensive MF synthesis formulas are derived to facilitate the semi-analytical design. For verification, three linear amplifiers are impedance-matched using the proposed LP-/HP-/BP-EPMFs and fabricated as demonstrative single-stage Extracted-Pole FA (EPFAs). Experimental results confirm that these FAs successfully achieve stringent, high-order responses, specifically 4-pole/4-TZ for LP and HP, and 6-pole/4-TZ for BP prototypes. Notably, the measured LP-EPFA achieves an exceptional stopband rejection up to <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3.33f_cen</i> (11 GHz), and the BP-EPFA maintains rejection up to 4.3<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f_cen</i>. This work validates that the EPMF technique offers superior selectivity and design versatility compared to existing multi-stage solutions.

In the rapidly evolving telecommunications landscape, digital predistortion (DPD) techniques have emerged as an important solution for improving the linearity and power efficiency of power amplifiers (PAs), especially in the context of 5G New Radio (5G-NR) requirements. This work explores advanced DPD architectures, focusing on the comparative analysis of cascaded models and artificial neural networks (ANNs), with particular emphasis on their effectiveness in addressing the challenges posed by high bandwidth and high peak-to-average power ratio (PAPR) signals. To reduce complexity and avoid overfitting, we implement model order reduction techniques adapted to both model types. Experimental results confirm the superior performance of N-stage cascaded models and ANNs in meeting stringent linearity criteria, including adjacent channel power ratio (ACPR) and error vector magnitude (EVM). Our findings highlight that while both methods effectively address nonlinearity in dual-input wideband PAs, the choice between them depends on specific performance requirements, including computational efficiency and linearization accuracy.

This brief presents a wideband linear CMOS power amplifier (PA) for 5G millimeter wave (mm-wave) applications. In order to improve linearity, this PA adopts an analog pre-distortion (APD) linearizer using an adaptive dual-voltage-path crossing cold-FET pair (ADCCP). The proposed ADCCP is implemented by connecting the drain and gate of differential cold-FET mutually in a crossing manner, which can enhance the equivalent impedance of cold-FET significantly. Moreover, an adaptive bias circuit (ABC) with dual-voltage-path is applied to control V<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gs</sub> of ADCCP to transform the transistor from the saturation region to the turn-off region, which can further increase the equivalent impedance of the cold-FET to enhance linearity. In addition, input and interstage transformers are meticulously designed using gain shaping technique to ensure wideband performance. The implemented PA achieves a 3-dB bandwidth of 18.3-38.3 GHz, with the peak gain of 20.8 dB, peak saturated output power (P<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sat</sub>) of 22.7 dBm, and peak power-added efficiency (PAE) of 31.9%. Wideband output power and efficiency performance was achieved with OP<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub> ≥ 21 dBm, PAE<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub> ≥ 22% in 21.5-36.1 GHz (50.7% FBW).

This paper presents a mobile communication transmitter architecture that exploits bandlimited pulse-width modulation (BL-PWM) combined with outphasing to eliminate aliasing and image distortions. The proposed combined outphasing-aliasing free PWM transmitter (COAF-PWMT) shows very high linearity and high power efficiency as it can use switch-mode power amplifiers (SMPAs) or linear power amplifiers operating at peak power. The transmitter is implemented using two 130 nm CMOS class-D power amplifiers and experimentally validated with both 1.5 MHz LTE signals and 10 MHz 5G NR signals at a carrier frequency of 700 MHz. Experimental results for the 1.5 MHz LTE signal show that the COAF-PWMT achieves an ACLR of 54.3 dBc and an average efficiency of 15.7%. The architecture improves ACLR by 22.6 dB and power efficiency by 4.4% compared to the aliasing-free PWM transmitter (AF-PWMT). It also provides a 14.3 dB ACLR and 2.2% efficiency boost over the Gibbs-phenomenon-reduced aliasing-free PWM transmitter (GR-AFPWMT), and a 15.0 dB ACLR improvement over the modified aliasing-free PWM transmitter (MAF-PWMT). Compared to the aliasing-compensated PWM transmitter (AC-PWMT), the COAF-PWMT increases ACLR by 19.5 dB with similar efficiency. For the 10 MHz 5G NR signal, the COAF-PWMT reaches an ACLR of 42 dB, which is 6 dB better than the GR-AFPWMT, and improves efficiency by 1.6%. These results show the COAF-PWMT’s promise for highly linear and efficient RF transmitter design in future wireless systems.

In this article, we propose a feedforward neural network model designed to approximate the inverse transfer characteristic of a High-Power Amplifier (HPA) in order to linearize it using Digital Predistortion (DPD). This approach is particularly relevant for next-generation communication systems, such as those employing OTFS (Orthogonal Time Frequency Space) modulation envisioned for 6G, whose signals exhibit large amplitude variations that exacerbate amplifier nonlinearities. The performance of predistortion heavily depends on the learning algorithm used to train the neural model. We compared three optimization algorithms: Gradient Descent, Gauss-Newton, and Levenberg-Marquardt. The amplifier is modeled using the Rapp model. The neural network architecture consists of a single input neuron, a hidden layer with ten neurons using the hyperbolic tangent activation function, and a linear output neuron. Training and simulations were carried out in MATLAB, and the performance of each algorithm was evaluated using the Mean Squared Error (MSE) criterion, which quantifies the deviation between the ideal transfer characteristic of a linear amplifier and the characteristic obtained after predistortion. The results clearly show that the Levenberg-Marquardt algorithm provides the best approximation of the predistortion function, achieving an MSE on the order of 4.2708×10&amp;lt;sup&amp;gt;-8&amp;lt;/sup&amp;gt;, significantly outperforming Gauss-Newton 1.0481×10&amp;lt;sup&amp;gt;-4&amp;lt;/sup&amp;gt; and Gradient Descent (0.0272). This superior performance is attributed to Levenberg-Marquardt’s ability to combine the robustness of Gradient Descent with the fast convergence of Gauss-Newton, while avoiding local minimum and issues related to poor synaptic weight initialization.

High peak-to-average power ratio (PAPR) in modern modulation schemes causes power amplifier nonlinearity due to transistor saturation and results in considerable power loss. To mitigate these effects and extend the linear range, this work proposes a novel harmonic injection technique aimed at enhancing the 1-dB compression point. A new analytical model based on Taylor series expansion and drain current derivatives is developed, enabling a fully integrated injection scheme that avoids conventional components such as circulators or frequency doublers. A new biasing method is also derived from this model. To address power loss under high PAPR, a new fully CMOS-integrated hybrid envelope-tracking modulator is introduced. A custom-designed sensing circuit removes the need for sensing resistors and external voltage references, significantly reducing output ripple. Moreover, a new current management scheme is introduced that removes the ripple-filtering burden from the linear amplifier, simplifying its design. A comprehensive mathematical analysis is also provided to characterize the trade-offs between the inductor value and switching frequency, enabling a fully integrated on-chip inductor solution. Results in 180nm CMOS show improvements of 1.2 dB in output saturation power, 4.4 dB in P1dB, and 12.5% in peak PAE. PAE at P1dB improves by 14.6%, with EVM remaining below 5%.

Linear Doherty power amplifier design based on adaptive input signal power control

Emerging intelligent communication systems require transmitters capable of operating in dynamic conditions while maintaining power amplifier (PA) linearity. Existing digital predistortion (DPD) methods struggle to adapt to unseen operating states arising from dynamic scenarios without adding significant complexity. To overcome this challenge, this article proposes a novel linear-update neural network (NN)-based DPD architecture comprising a fixed shared feature extractor and an adaptive state-specific module. The shared module captures the common nonlinear characteristics across various PA states, while the state-specific module employs a linear-update mechanism to compensate for dynamic distortions in unseen states, ensuring low computational overhead. By integrating prior knowledge of PA nonlinear behavior, the state-specific module is optimized for structural simplicity, supported by an online interpolation strategy to reduce the frequency of updates. Experimental results at both Sub-6 GHz and millimeter-wave (mmWave) frequencies demonstrate that the proposed method matches the linearization performance of state-of-the-art dynamic DPD schemes while significantly reducing both update and storage requirements. This makes the method well suited to meet the dynamic demands of future communication systems.

This article presents a comprehensive industry perspective on the evolution from 5G to 6G wireless communications infrastructure. It explores the transformative potential of “connected intelligence”—the convergence of ubiquitous connectivity and artificial intelligence—to bridge the digital divide, promote sustainability, and enhance quality of life. The authors examine the lessons learned from 5G deployments, including challenges with non-standalone (NSA) and standalone (SA) architectures, spectrum allocation, and return on investment. The paper outlines the emerging vision for 6G, emphasizing integrated sensing and communications (ISAC), AI-native networks, and the role of non-terrestrial networks (NTNs). It also delves into Open RAN initiatives, functional splits, and the importance of standardized interfaces for cost-effective and energy-efficient network evolution. Advanced system-on-chip (SoC) architectures, energy-saving strategies, and joint communication-sensing capabilities are discussed, along with innovations in power amplifier (PA) linearization using dual-input architectures. Through system-level simulations and hardware validation, the article highlights the technical and economic considerations shaping the future of wireless infrastructure.

Two sparse-learning methods for recurrent neural network used as a digital predistorter for microwave power amplifier linearization are presented. Comparative analysis of investigated approaches with unstructured pruning is carried out. Described methods make it possible to build a sparse digital predistorter without using additional hyperparameters and fine-tuning. Sparse neural network, in turn, is a compact implementation of digital predistorter with reduced computational complexity. Such attractive feature allows effective digital predistortion in the transmitter path of both user equipment and multichannel base stations.

In this paper, we introduce a hybrid linear amplifier (HLA) at the interface of the passive state preparation (PSP) continuous-variable quantum key distribution (CVQKD) system to increase the protocol’s transmission performance. Specifically, we find that the noiseless linear amplifier (NLA) component of the HLA increases the maximum transmission distance of the PSP protocol, and the deterministic linear amplifier (DLA) increases the secret key rate within ten kilometres. By appropriately tuning the amplifier parameters, the key rate can be optimized for a given transmission distance. Even with a key length of 10 10 and excess noise of 0.1 dB, the protocol achieves secure transmission distances of up to 64 km and 20 km in respective scenarios, which are sufficient to meet the requirements of practical quantum communication systems. Our research provides a new technical way to improve the PSP protocol.

Abstract This paper presents an experimental overview of linearity metrics using setups based on a PNA-X and a vector signal analyzer to evaluate key performance indicators of a transistor, such as noise power ratio and error vector magnitude, under unequally spaced multi-tone (USMT) and various quadrature amplitude modulation signals. The purpose of this study is to verify the feasibility of characterizing the linearity of transistors and RF power amplifiers on a PNA-X-based measurement bench by exploiting the statistical properties of the previously developed USMT signal, which allows NPR measurement in a single pass. The measurements were performed on an $8 \times 50\,\mu\,\mathrm{m}$ gate GaN transistor from UMS Foundry,operating on-wafer at 29 GHz.

Gain-Flatness-Enhanced High-Voltage and Wideband Linear Amplifier for Ultrasonic Instrumentation