L-shaped Tunneling Field-effect Transistors Research Articles

Impact of Gaussian Traps on the Characteristics of L-shaped Tunnel Field-effect Transistor

Background: Internet of Things (IoT) applications require high-performance TFET devices that can be efficiently integrated with the cyber world and physical world. Objectives: The impact of introducing Gaussian traps in hetero-junction tunneling-field-effecttransistors (TFET) with an L-shaped gate is presented. Methods: The 2-D TCAD study of different characteristics, like input, output characteristics, and noise spectral density with trap and without trap, has been performed. Results: The simulation results showed that in L-shaped TFET (L_TFET), the high on-current of 1.93×10-5 A/μm, low off-current/leakage current of 1.09×10-13 A/μm, and steep sub-threshold slope (SS) of 24 mV/dec without traps and on-current of 8.46×10-6 A/μm, off-current of 2.86×10- 11 A/μm, and degraded SS with traps are observed. They also indicated that the presence of traps reduces gate-drain capacitance (Cgd), while gate-source capacitance (Cgs) remains unaffected. In addition, in L_TFET, the drain current noise spectral density (SID) of 7.63 E-21 (A2/Hz) at LF and 2.69 E-26 (A2/Hz) at HF while the noise voltage spectral density (SVG) of 7.33 E-4 (V2/Hz) at LF and 2.59 E-15 (V2/Hz) at HF without traps have been investigated in this study. The inverse dependence of drain current noise spectral density on frequency has been observed to lower the effect of noise at HF. Conclusion: It can be concluded that the proposed L_TFET device is free from ambipolarity conduction and can be well-suited for low-power applications.

Sensitivity Analysis of Biosensors Based on a Dielectric-Modulated L-Shaped Gate Field-Effect Transistor.

Label-free biomolecular sensors have been widely studied due to their simple operation. L-shaped tunneling field-effect transistors (LTFETs) are used in biosensors due to their low subthreshold swing, off-state current, and power consumption. In a dielectric-modulated LTFET (DM-LTFET), a cavity is trenched under the gate electrode in the vertical direction and filled with biomolecules to realize the function of the sensor. A 2D simulator was utilized to study the sensitivity of a DM-LTFET sensor. The simulation results show that the current sensitivity of the proposed structure could be as high as 2321, the threshold voltage sensitivity could reach 0.4, and the subthreshold swing sensitivity could reach 0.7. This shows that the DM-LTFET sensor is suitable for a high-sensitivity, low-power-consumption sensor field.

Compact Trap-Assisted-Tunneling Model for Line Tunneling Field-Effect-Transistor Devices

Trap-assisted-tunneling (TAT) is a well-documented source of severe subthreshold degradation in tunneling field-effect-transistors (TFET). However, the literature lacks in numerical or compact TAT models applied to TFET devices. This work presents a compact formulation of the Schenk TAT model that is used to fit experimental drain-source current (Ids) versus gate-source voltage (Vgs) data of an L-shaped and line tunneling type TFET. The Schenk model incorporates material-dependent fundamental physical constants that play an important role in influencing the TAT generation (GTAT) including the lattice relaxation energy, Huang–Rhys factor, and the electro-optical frequency. This makes fitting any experimental data using the Schenk model physically relevant. The compact formulation of the Schenk TAT model involved solving the potential profile in the TFET and using that potential profile to calculate GTAT using the standard Schenk model. The GTAT was then approximated by the Gaussian distribution function for compact implementation. The model was compared against technology computer-aided design (TCAD) results and was found in reasonable agreement. The model was also used to fit an experimental device’s Ids–Vgs characteristics. The results, while not exactly fitting the experimental data, follow the general experimental Ids–Vgs trend reasonably well; the subthreshold slope was loosely similar to the experimental device. Additionally, the ON-current, especially to make a high drain-source bias model accurate, can be further improved by including effects such as electrostatic degradation and series resistance.

Analog/RF performance of four different Tunneling FETs with the recessed channels

In this paper, the performance comparisons of analog and radio frequency (RF) in the four different tunneling field effect transistors (TFETs) with the recessed channels are performed. The L-shaped channel TFET (LTFET), U-shaped channel TFET (UTFET), U-shaped channel with L-shaped gate TFET (LGUTFET) and U-shaped channel with dual sources TFET (DUTFET) are investigated by using Silvaco-Atalas simulation tool. The transconductance (gm), output conductance (gds), gate capacitance (Cgg), cut-off frequency (fT) and gain bandwidth product (GBW) are the parameters by analyzed. Among all the considered devices, the DUTFET has the maximum gm and gds due to the improved on-state current by dual sources, and the LTFET has the minimum Cgg because of the minimum gate-to-drain capacitance (Cgd). Since analog/RF characteristics of a device are proportional to gm and inversely proportional to Cgg, the LTFET and DUTFET have better analog/RF performance compared to the UTFET and LGUTFET. The extracted largest fT is 3.02 GHz in the LTFET and the largest GBW is 1.02 GHz in the DUTFET. The simulation results in this paper can be used as a reference to choose the TFET among these four TFETs for analog/RF applications.

Investigation on the Corner Effect of <I>L</I>-Shaped Tunneling Field-Effect Transistors and Their Fabrication Method

In this work, electrical characteristics of L-shaped tunneling field-effect transistors (TFETs) have been studied and optimized by a commercial device simulator: Synopsys Sentaurus. Unlike our previous study performed by using Silvaco Atlas, there exists a kink phenomenon in a transfer curve which degrades the subthreshold swing (SS) and on-current (lon) of TFETs. According to simulation results, the kink results from abrupt source doping. Rounding the source junction edge with gradual doping profile is helpful to alleviate it. Based on those results, a novel fabrication flow has been proposed to suppress the kink effect induced by source corners. It is predicted that the performance of L-shaped TFETs is improved in terms of SS and Ion under the optimized process condition. Furthremore, the effect of high-k gate dielectric and narrow band gap material on device performance has been examined. Using 2-nm-thick HfO2 for gate dielectric and Si0.7Ge0.3 for intrinsic tunneling region, gate controllability to the channel and tunneling probability have been enhanced. As a result, its threshold voltage (Vth), SS and Ion have been improved by 0.13 V, 16 mV/dec, and 3.62 microA/microm, respectively.

L-Shaped Tunneling Field-Effect Transistors for Complementary Logic Applications

In order to implement complementary logic function with L-shaped tunneling field-effect transistors (TFETs), current drivability and subthreshold swing (SS) need to be improved more. For this purpose, highk material such as hafnium dioxide (HfO2) has been used as gate dielectric rather than silicon dioxide (SiO2). The effects of device parameters on performance have been investigated and the design of L-shaped TFETs has been optimized. Finally, the performance of L-shaped TFET inverters have been compared with that of conventional TFET ones. key words: L-shaped TFETs, subthreshold swing, steep slope, complementary logic function

Design Guideline of Si-Based L-Shaped Tunneling Field-Effect Transistors

In this work, novel L-shaped tunneling field-effect transistors (TFETs) have been proposed. The proposed L-shaped TFETs feature higher on-current (Ion) and lower subthreshold swing (SS) than conventional TFETs. It is because L-shaped TFETs have large cross-sectional area of band-to-band tunneling junction which is perpendicular to the channel direction and their tunneling barrier width (Wt) is defined by the length of an intrinsic silicon region. As the devices are based on the Si without any other material, it can be fabricated with well-established Si process technology. In addition, it can moderate some issues come from scaling down and enlarging tunneling area due to its mesa structure. Simulation results have confirmed the superiority of L-shaped TFETs over conventional TFETs. Additionally, the effect of some device parameters on device performance has been investigated for the clear verification of its operation mechanism and the optimization.

Design Guideline of Si-Based L-Shaped Tunneling Field-Effect Transistors

Design Guideline of Si-Based L-Shaped Tunneling Field-Effect Transistors