Intrinsic Amorphous Silicon Layer Research Articles

Investigation of anisotropic textured crystalline silicon surface passivation with intrinsic amorphous silicon layers: role of annealing pressure conditions during passivation recovery

Investigation of anisotropic textured crystalline silicon surface passivation with intrinsic amorphous silicon layers: role of annealing pressure conditions during passivation recovery

Potential application of novel graphene/diamane interface in silicon-based heterojunction with intrinsic thin layer solar cell

In this article, the patentability of novel graphene/diamane interface in HIT solar cell has been explored by simulated a structure modelled as: graphene (TCO) / n-diamane / a-Si: H (i) / p-cSi / Ag (back contact) with the help of software AFORS-HET version 2.5. Here, n-type diamane is used as an emitter layer and graphene as TCO. An efficiency of 31.2 % is achieved with this structure by varying various parameters of n-type diamane, p-crystalline silicon and hydrogenated intrinsic amorphous silicon layer which is pressed in between the two oppositely doped wafer (diamane and c-Si). Furthermore, when ITO is used as TCO then a comparatively low efficiency 27.15 % is achieved and when the commercially available values of silicon’s parameters is used for the validation of results then an efficiency of 24.15 % is obtained. Some parameters of a-Si: H (i) has been further optimized and the optimum efficiency 31.2 % has been found at minimum thickness of 3 nm at bandgap 1.6 eV. Finally, we have demonstrated that only carbon material has an ability that its two-dimensional allotropes can be used as an emitter layer as well as efficient transparent conducting electrode.

Open circuit voltage reduction due to recombination at the heterojunction solar cell edge

Today to achieve high efficiency solar cells, the crystalline silicon (c-Si) heterojunction (HJ) represents one of the best available options. The key factor of its success is the high open circuit voltage (Voc) achievable, because of the excellent surface passivation due to the intrinsic amorphous silicon (a-Si:H) layers. During cells manufacturing, the a-Si:H film deposition is simultaneously performed on both c-Si wafer sides, and consequently also on the edges of the wafer. However, the wafer edges could result non-passivated in many cases such as the so-called shingling manufacturing route.Moreover, at laboratory level it is quite common to manufacture small area cells from larger wafers. When a silicon edge is left uncovered by cutting, a recombining region is created due to the silicon non-passivated surface. This, in principle, leads to a reduction in the Voc of the cell.Nevertheless, this is not experienced for large area cells cut in half but it is commonly observed that cutting silicon HJ edges results in a lowering in Voc. In this work we have analyzed the correlation between the Voc, the cell area and the recombining surface introduced by cutting the cell into a smaller one. We have monitored the Voc as a function of the cell area during time, and we also have investigated the possibility of a re-passivation of the cell edges by depositing a thick a-Si:H layer after masking the sun exposed cell surface, exploring different deposition conditions to avoid re-annealing of the existing a-Si:H layers.

Performance Evaluation of an Improved Double Intrinsic Layer CdTe/a-Si Thin Film Photovoltaic Cell

This paper presents a 1μm×1.25μm×1μm heterojunction thin film photovoltaic cell having “p-i1-i2-n” cell structure. The designed “ITO/p-CdTe/i1-CdTe/i2-a-Si/n-a-Si/ITO” photovoltaic cell is investigated, optimized and simulated in Silvaco TCAD. Finite Element Analysis (FEA) has been carried out to cater all physical and numerical models to generate practical results. For improvement in cell efficiency, a 1.52 eV wide-bandgap p-layer of CdTe is used which specifically improves the short circuit current (JSC). JSC is directly involved in the improvement of conversion efficiency. For the active region, an intrinsic CdTe layer is combined with an intrinsic amorphous silicon (a-Si) layer. This combination of intrinsic layers in active region is responsible for maximum absorption of photons with a wide range of energies and results in additional electron hole pair generation. Selective absorption is used to maximize light trapping and strong scattering of incident light into active region. Indium Tin Oxide (ITO) is used as front layer and back contact layer with Aluminum (Al) because it offers low resistivity of ~10-4 Ωcm and a transmittance of greater than 90%. Results have been validated by implementing two reported cells with p-i-i-n and p-i-n structures. The results indicate achievement of 28.05% conversion efficiency of the proposed heterojunction cell. The achieved efficiency is better than the efficiencies of the related cells compared in this work and also higher than that of the 25.6% of conventional Heterojunction Intrinsic Thin-film (HIT) silicon solar cells.

Design and Simulation of Highly Efficient One-Sided Short PIN Diode Silicon Heterojunction Solar Cell

Performance of highly efficient one-sided short PIN diode heterojunction solar cell model is studied using AFORS-HET simulation software. Here, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</i> -type crystalline silicon is used as an absorber layer, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> -type amorphous silicon as emitter layer, and a thin intrinsic amorphous silicon (i-a-Si:H) layer is sandwiched in between, which acts as a passivation layer. The diode model concept has been introduced mainly to lower the reverse saturation current by appropriate selection of the cell parameters. Short diode reduces recombination phenomenon in the short quasi-neutral region (n-a-Si:H in this article), and one-sided junction allows the maximum amount of light absorption in the absorber layer (p-c-Si in this article). The one-sided junction nature has been confirmed by capacitance–voltage ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C–V</i> ) analysis. Further thickness variation of layers and role of the carrier concentration of n-a-Si layer on various parameters, such as short-circuit current density ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">J</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sc</sub> ), open-circuit voltage ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">oc</sub> ), and fill factor (FF) have also been studied. The structure has exhibited an open circuit voltage of 0.714 V, fill factor 0.80, and maximum efficiency of 24.2%. Further, experimental validation is also established by comparing the theoretical results with the fabricated NIP structure.

Improved Infrared Light Management with Transparent Conductive Oxide/Amorphous Silicon Back Reflector in High‐Efficiency Silicon Heterojunction Solar Cells

To improve the infrared (IR) response, a high‐refractive‐index intrinsic amorphous silicon (a‐Si:H) layer is introduced after metallization of bifacial silicon heterojunction (SHJ) solar cells, resulting in a transparent conductive oxide (TCO)/a‐Si:H back reflector, which functions like distributed Bragg reflector (DBR). This concept is demonstrated by both Sentaurus Technology Computer‐Aided Design (TCAD) simulation and experimental methods. The TCO/a‐Si:H back reflector can increase rear internal reflectance by reducing the transmission loss, thus improving the IR external quantum efficiency. The using of Sn‐doped In2O3 (ITO)/a‐Si:H back reflector in &gt;23.5% efficiency SHJ solar cells can improve short‐circuit current density by 0.4 mA cm−2 which is quite similar as using the more expensive ITO/Ag back reflector, while keeping a cell bifaciality of 55%. This brings its advantage for monofacial application case. Future studies would be nice to work on higher transparent back reflectors to broaden the application in bifacial case. This back‐reflector design promotes IR response of SHJ solar cells with transferring to a wide variety of TCOs.

Enhanced open-circuit voltage in p-type passivated emitter and rear cell by doped polysilicon layer as passivation contact

The most promising and feasible approach to achieving high-efficiency silicon solar cells must be passivation contact compatible with current homojunction thermal processes. In this paper, an easy-to-implement carrier-selective passivation contact with doped poly-Si/SiOx for produing p-type passivated emitter and rear cell (PERC) was proposed. The passivation contact structure consisted of an ultra-thin SiOx layer capped with an intrinsic amorphous silicon (a-Si) layer prepared by low pressure chemical vapor deposition, which was deposited onto a p-type silicon substrate and then was doped and re-crystallized by a thermal phosphorus diffusion at 850 °C for 75 min. By optimizing the diffusion profile and cleaning time, a low dark recombination current density J0 ≈ 3 fA/cm2 and large minority carrier lifetime of 3000 μs were achieved on the 180-μm-thick n-type wafers with a resistivity of 3 Ω·cm, corresponding to an implied open-circuit voltage of 700 mV. P-type PERC cells with the highly doped poly-Si/SiOx passivated emitter demonstrated 683.97 mV of open-circuit voltage, showing more than 10 mV enhancement comparing with regular PERC cells. The results demonstrated an attractive potential of the carrier-selective passivation contacts with doped poly-Si/SiOx under front metallizatin area in photovoltaic application.

Improving the Passivation of Molybdenum Oxide Hole‐Selective Contacts with 1 nm Hydrogenated Aluminum Oxide Films for Silicon Solar Cells

The intrinsic and doped amorphous silicon layers in silicon heterojunction solar cells parasitically absorb light in the short wavelength region of the solar spectrum, lowering the generation current available to the device. Herein, a promising alternative to the hole‐selective amorphous silicon contact layers using only wide bandgap, transparent oxide materials is presented. Using thermal atomic layer deposition, a 1 nm hydrogenated aluminum oxide layer is deposited followed by a 4 nm molybdenum oxide layer on n‐type crystalline silicon. This contact stack provides an effective carrier lifetime of 1.14 ms. It is shown that the molybdenum oxide layer is successfully deposited with a high work function, which facilitates efficient hole extraction and repels majority carriers from the c‐Si surface. Then the implied open‐circuit voltage, saturation current density, and contact resistivity are recorded as a function of contact annealing temperature and show that they are relatively stable up to 200 °C.

Influence of Room Temperature Sputtered Al-Doped Zinc Oxide on Passivation Quality in Silicon Heterojunction Solar Cells

Al-doped zinc oxide (AZO) is a potential candidate to substitute tin-doped indium oxide in silicon heterojunction (SHJ) solar cells due to its low cost and low ecological impact. The AZO, sputtered at room temperature (RT), is of particular interest because of low thermal budget and potential for high throughput production with the well-established industrial methods. In SHJ solar cells, high effective carrier lifetime prerequisite for the high open-circuit voltage is achieved with surface passivation by intrinsic amorphous silicon layers followed by doped silicon layers. The passivation quality may be affected by the subsequent sputtering of an AZO layer especially at RT. In this article, we investigated the influence of the AZO sputtering and postdeposition annealing on the effective carrier lifetime in symmetrical silicon layer stacks with n- or p-type doped silicon layers and solar cell precursors. It has been found that the effective carrier lifetime significantly decreased after AZO sputtering at RT. The detrimental effect of AZO sputtering is substrate temperature dependent and is smaller or even absent at elevated temperatures. However, postdeposition annealing, equivalent to the Ag paste curing, mostly recovered the effective carrier lifetime in the symmetrical stacks as well as in the cell precursors. Finally, an aperture area efficiency of 21.2% has been achieved for the 19 mm × 19 mm SHJ solar cell prepared with room temperature sputtered AZO.

Tunnel oxide passivating electron contacts for high‐efficiency n‐type silicon solar cells with amorphous silicon passivating hole contacts

AbstractThis study proposes a hybrid solar cell structure for a highly efficient silicon solar cell obtained by combining two passivating contact structures, namely, a heterojunction and polysilicon passivating contact. Given that the major cause of the loss in efficiency of crystalline silicon solar cells is carrier recombination at the metal‐semiconductor junction, a passivating contact having high‐quality passivation and a low contact resistance was introduced. In this study, two major passivating contact solar cells were combined. By applying an intrinsic thin amorphous silicon layer at the front and a tunneling oxide at the rear, a hybrid silicon solar cell with an efficiency of 21.8% was fabricated. Moreover, to evaluate the potential efficiency limit and to suggest methods for improving the cell performance of the proposed amorphous silicon emitter tunnel oxide back contact structure, the cell efficiency was simulated, and the result indicated that an efficiency of 26% could be achieved by controlling the thickness and resistivity of the wafer.

Study of Surface Passivation and Charge Transport Barriers in DASH Solar Cell

Dopant-free asymmetric heterocontact (DASH) solar cells have recently shown the potential for high efficiency with no toxic dopant gases. In this paper, we simulate both the hole [Ag/IOH/MoOx/a-Si:H(i)] and electron (a-Si:H(i)/TiOx/LiFx/Al) heterocontacts and study the surface passivation and charge transport mechanism using Sentaurus TCAD. Our simulation predicts that the intrinsic amorphous silicon layer [a-Si:H(i)] is mainly required to improve the field-effect passivation at the hole contact (>100 mV increase in V oc) and to improve the chemical passivation at the electron contact. However, it comes at the cost of degradation in fill factor (FF). To overcome the FF loss, high work function material (MoOx WF ∼ > 5.5 eV) is required at the hole contact and low work function material (Al/LiFx WF ∼ V oc - iV oc) in addition to FF loss, whereas at the electron contact, affecting only the FF unless there is a strong chemical passivation loss. This is attributed to the strong hole blocking nature of the TiOx film. This feature is used to predict the nature of the internal transport barriers by combining the terminal characteristics, surface photovoltage, and selectivity loss, which we believe will be helpful for further progress in this arena.

High efficiency n-type silicon solar cells with passivating contacts based on PECVD silicon films doped by phosphorus diffusion

Carrier-selective contacts based on silicon films deposited onto a thin SiOx layer combine high performance with a degree of compatibility with industrial solar cell metallization steps. This paper demonstrates an approach to form electron-selective passivating contacts that maximises the overlap with common industrial equipment; it is based on depositing an intrinsic amorphous silicon (a-Si) layer by PECVD and then doping and re-crystallizing it by means of a thermal phosphorus diffusion. By optimizing the intrinsic a-Si thickness and the phosphorus diffusion temperature, a low recombination current density Joc ≈ 3 fA/cm2 and a low contact resistivity of ρc ≈ 3 mΩ-cm2 have been achieved. Additionally, these electrical parameters have been found to be sensitive to the work function of the outer metal electrode. The application of these optimized electron-selective passivating contacts to n-type silicon solar cells has permitted to achieve a conversion efficiency of 24.7%. A loss analysis has been conducted through Quokka 2 simulations, which together with quantum efficiency measurements, indicate that further optimization should focus on the front boron-doped region of the device.

Implementation of full-area-deposited electron-selective TiOx layers into silicon solar cells

We examine two different silicon solar cell designs featuring full-area electron-selective contacts based on ultrathin (2–3 nm) titanium oxide (TiOx) films deposited by atomic layer deposition. The first cell design applies a layer stack to the cell front, which is composed of an ultrathin intrinsic amorphous silicon (i-a-Si:H) layer for interface passivation, the TiOx film and an indium tin oxide (ITO) layer to provide a good lateral conductance for electrons to the metal fingers. Whereas carrier lifetime measurements on test structures promise high implied open-circuit voltages Voc up to 726 mV, the realized solar cells achieve disappointingly low Voc values &amp;lt;400 mV. The J-V parameters of this cell type are negatively affected by a reverse diode occurring due to the contacting of the TiOx by the high-work function ITO layer. In the second cell type, we implement a layer stack to the cell rear, which is composed of an ultrathin silicon oxide (SiOy) layer, the TiOx film and a full-area-deposited aluminum (Al) layer. Initial Voc values of these cells are relatively low (&amp;lt;600 mV), but improve significantly after annealing at 350°C. The best cell featuring a SiOy/TiOx/Al rear contact achieves an open-circuit voltage of 661 mV and an efficiency of 20.3%. No reverse diode is observed, which is attributed to the lower work function of the Al compared to ITO in the first cell design. From internal quantum efficiency measurements, we extract a rear surface recombination velocity Srear of (52±20) cm/s for our best cell, which is well compatible with efficiencies exceeding 23%.

Measuring carrier injection from amorphous silicon into crystalline silicon using photoluminescence

AbstractIn devices with intrinsic amorphous silicon layer on a crystalline silicon substrate, the light absorbed in the amorphous layer can be weakly electronically coupled into the silicon base. Such carrier injection has previously been reported from measurements on finished devices containing stacks of intrinsic and doped amorphous silicon layers. Here, we use spectral response of photoluminescence, a contactless approach, to investigate this carrier injection on significantly simpler structures. In such devices, the effect of absorption in the front layer can be measured by the internal quantum efficiency. A highly absorbing front layer is expected to cause a drop in the quantum efficiency at short wavelengths. However, if electron‐hole pairs that are generated in the front layer are subsequently injected into the base, the optical losses will be reduced, resulting in a partial recovery of the quantum efficiency at short wavelengths. Here, we quantify the efficiency of carrier injection from the intrinsic amorphous silicon front layer to the crystalline silicon base, by measuring the spectral response of photoluminescence heterojunction test structures. For devices with just an intrinsic amorphous silicon layer, the carrier injection from the layer was found to be close to unity.

Low-Temperature Growth of Amorphous Silicon Films and Direct Fabrication of Solar Cells on Flexible Polyimide and Photo-Paper Substrates

Direct deposition of hydrogenated amorphous silicon (a-Si:H) thin films and fabrication of solar cells on polyimide (PI) and photo-paper (PP) substrates using a rf-plasma-enhanced chemical vapor deposition technique is reported. Intrinsic amorphous silicon films were deposited on PI and PP substrates by varying the substrate temperature (Ts) over 70–150°C to optimize the deposition parameters for best quality films. The films deposited on both PI and PP substrates at a temperature as low as 70°C showed a photosensitivity (σph/σd) of nearly 4 orders of magnitude which increased to 5–6 orders of magnitude when the substrate temperature was increased to 130–150°C. The increase in σph/σd is due to the presence of a few nanometer-sized crystallites embedded in the film. Solar cells (n-i-p) were fabricated directly on PI, PP and Corning 1737 glass (Corning) at 150°C for different thicknesses of an intrinsic amorphous silicon layer (i-layer). With the increase in i-layer thickness from 330 nm to 700 nm, the solar cell efficiency was found to increase from 3.81% to 5.02% on the Corning substrate whereas on the flexible PI substrate an increase from 3.38% to 4.38% was observed. On the other hand, in the case of cells on PP, the i-layer thickness was varied from 200 nm to 700 nm and the best cell efficiency 1.54% was obtained for the 200-nm-thick i-layer. The fabrication of a-Si (n-i-p) solar cells on photo-paper is presented for the first time.

Controlling the c-Si/a-Si:H interface in silicon heterojunction solar cells fabricated by HWCVD

This paper deals with the engineering of the hetero-interface between intrinsic amorphous silicon (i-a-Si:H) layer and the n-type crystalline silicon (c-Si) wafer during the fabrication of the Silicon Heterojunction (SHJ) solar cell by the Hot Wire Chemical Vapor Deposition technique. It is known that this interface and the associated surface passivation of the c-Si is key to obtaining high efficiency heterojunction solar cells. The monitoring of this interface was carried out using high-resolution transmission electron microscopy (HRTEM). The HRTEM data of the c-Si/a-Si:H interface reveals a drastic dependence on the filament temperature (Tf) used during the deposition of the i-a-Si:H layer. Detailed analysis of the solar cell characteristics indicates that the cells where one has an abrupt crystalline/amorphous interface shows higher conversion efficiency compared to those where we have a rough and a defective interface or where there are indications of local epitaxy in the a-Si:H layer. The second parameter which was engineered is the bulk defect density of the intrinsic a-Si:H layer. Though the thickness of i-a-Si:H layer in case of SHJ solar cells is only around 5nm and serves the purpose of passivating the dangling bonds on the c-Si wafer, the bulk defect density of this layer cannot be ignored. We have achieved a-Si:H films with acceptable bulk defect density without dilution of the silane gas with hydrogen. The bulk defect density of the i-a-Si:H layer has been determined by the constant photocurrent method (CPM) and is correlated to the performance of SHJ solar cells. A direct consequence of these control parameters was observed in the improvement of the external quantum efficiency near 600nm wavelength region.

Low-Temperature Drop-on-Demand Reactive Silver Inks for Solar Cell Front-Grid Metallization

Formation of high-conductivity metal contacts at low temperatures expands optoelectronic device opportunities to include thermally sensitive layers, while reducing expended thermal budget for fabrication. This includes high-efficiency silicon heterojunction solar cells with intrinsic amorphous silicon layers. Efficiencies of these cells are limited by series resistance; the primary cause of this is the relatively high resistivity of the low-temperature silver paste used to form front-grid metallization. In this paper, we report the formation of highly conductive features by drop-on-demand printing of reactive silver ink (RSI) at a low temperature of 78 °C, resulting in media resistivities of 3–5 μΩ·cm. When used as a front grid on a silicon heterojunction solar cell, RSI fingers give cell series resistance of 1.8 Ω·cm2 (without optimization of the process), which is impressively close to 1.1 Ω·cm2 for our commercially available screen-printed low-temperature silver paste metallization. We present here the promising first results of RSI as metallic finger for photovoltaics, which upon optimization of design parameters has the potential to outperform the screen-printed low-temperature silver paste counterpart.

Influence of using amorphous silicon stack as front heterojunction structure on performance of interdigitated back contact-heterojunction solar cell (IBC-HJ)

Interdigitated back contact-heterojunction (IBC-HJ) solar cells can have a conversion efficiency of over 25%. However, the front surface passivation and structure have a great influence on the properties of the IBC-HJ solar cell. In this paper, detailed numerical simulations have been performed to investigate the potential of front surface field (FSF) offered by stack of n-type doped and intrinsic amorphous silicon (a-Si) layers on the front surface of IBC-HJ solar cells. Simulations results clearly indicate that the electric field of FSF should be strong enough to repel minority carries and cumulate major carriers near the front surface. However, the over-strong electric field tends to drive electrons into a-Si layer, leading to severe recombination loss. The n-type doped amorphous silicon (n-a-Si) layer has been optimized in terms of doping level and thickness. The optimized intrinsic amorphous silicon (i-a-Si) layer should be as thin as possible with an energy band gap (E g) larger than 1.4 eV. In addition, the simulations concerning interface defects strongly suggest that FSF is essential when the front surface is not passivated perfectly. Without FSF, the IBC-HJ solar cells may become more sensitive to interface defect density.

Two dimensional simulation studies on amorphous silicon stack as front surface field for interdigitated back contact solar cells

Interdigitated back contact (IBC) solar cells have great potential for high efficiency because of their unique structure. IBC solar cells demand for high quality of front surface passivation. In this work, 2D numerical simulations have been done to investigate the potential of front surface field (FSF) offered by stack of n-type doped and intrinsic amorphous silicon (a-Si) layers on the front surface of IBC solar cells. Simulations results clearly indicate that the electric field of FSF should be strong enough to repel minority carries and cumulate major carriers near the front surface. However over-strong electric field tends to drive electrons into a-Si layer leading to severe recombination loss. The n-type doped amorphous silicon (n-a-Si) layer has been optimized in terms of doping level and thickness. The optimized intrinsic amorphous silicon (i-a-Si) layer should be as thin as possible with an energy band gap (Eg) larger than 1.4 eV. In addition, the simulations concerning interface defects strongly suggest that FSF is an essential part when the front surface is not passivated perfectly. Without FSF, the IBC solar cells become more sensitive to interface defect density.

High-quality hydrogenated intrinsic amorphous silicon oxide layers treated by H2 plasma used as the p/i buffer layers in hydrogenated amorphous silicon solar cells

The treatment of hydrogenated intrinsic amorphous silicon oxide (i-a-SiOx:H) films by H2 plasma is found through Fourier transform infrared (FTIR) spectroscopy to significantly improve the quality of the layers, which is attributed to variation in the Si–Hn bonding structure and an improvement of bonding order. Meanwhile, scanning electron microscopy (SEM) results indicate that the initial growth of a hydrogenated intrinsic amorphous silicon (i-a-Si:H) layer deposited on a treated i-a-SiOx:H film is also improved, which is beneficial to the performance of solar cells deposited on highly textured front electrodes. By inserting an i-a-SiOx:H film that is optimized in terms of H2 plasma treatment time as a p/i buffer layer in hydrogenated amorphous silicon (a-Si:H) solar cell, a significant increase in fill factor and open-circuit voltage are also observed. In this way, a high initial conversion efficiency of 11.3% can be achieved in a single-junction a-Si:H solar cell with an active layer thickness of 300nm.