Interleaving Scheme Research Articles

Reduction Method of Circulating Current in Parallel Three-Level Inverters Using Modified Discontinuous Pulse-Width Modulation Based on Interleaving Scheme

Reduction Method of Circulating Current in Parallel Three-Level Inverters Using Modified Discontinuous Pulse-Width Modulation Based on Interleaving Scheme

DC-Link Ripple Reduction for Parallel Inverter Systems by a Novel Formulation Using Multiple Space Vector-Based Interleaving Schemes

This paper proposes an analytical formulation-based minimization of DC link current ripples for interleaved parallel inverter systems. Parallel inverter systems find applications in multiple fields. The interleaved superposition of the DC link currents in these systems can potentially be adjusted to mitigate the overall harmonics consequently reducing the DC link capacitor size. To this end, a widely used approach in the literature is the Fourier analysis based on interleaving focusing on dominant harmonic mitigation. However, it leaves room for a generic analytical mechanism to provide time shifts leading to an optimal reduction in DC-link ripples. The goal of this work is to target this optimal reduction by utilizing an analytical mechanism. The paper presents an alternate way of DC-link formulation in terms of the piece-wise sinusoids of inverter output currents for space vector modulation-based systems. The formulation is then used to numerically optimize the interleaved shifts for minimum ripples. Moreover, in addition to the traditional concept of fixed time interleaving, a contemporary concept of sequence-based interleaving is utilized, which is anticipated to have more flexibility in the implementation and additional switching synchronism with PWM rectifiers for back–back converters. Therefore, the sequence interleaving has also been utilized in conjunction with the proposed ripple reduction methodology. Further, an underexplored area of using the combined impact of sequence and time interleaving has also been applied in this work. These interleaving methods are shown to provide significantly improved DC-link ripple mitigation, as compared to existing methods, using numerical assessment followed by simulations and experimental evaluation.

Comparative Study of Different Antenna Configurations for the MIMOOSTBC Technique Using FEC and the Rayleigh Fading Channel

Background: Multi-Input Multi-Output (MIMO) systems using Orthogonal Space-Time Block Coding (OSTBC) gained extensive popularity in wireless applications owing to the potential of providing improved reliability. Methods: The performance of MIMO - OSTBC systems using error-correcting code (Convolutional, Reed Solomon and Interleaving) schemes used to encode data streams in wireless communications using the Rayleigh channel is reported here. These are subjected to experimentation under modulation schemes such as Quadrature Phase Shift Keying (QPSK). Decoding occurs using the Maximum Likelihood (ML) algorithm, which provides high data rates using spatial domains under the limits of power transmission and limited bandwidths. Results: Different simulations are performed to detect the best BER performance for various antenna configurations and values of antenna configurations with Error Correction so as to use the best outcomes to model the OSTBC. Conclusion: Their effect of improving the overall can be noticed by the advantages of OSTBC with the correcting codes and the maximum number of configurations.

MMSE Equalization Based Performance of Chaotic Interleaving Scheme for Iterative IDMA System

Background: In this paper, a chaotic interleaving scheme is proposed for further performance improvement of Interleave Division Multiple Access (IDMA). Interleavers are used to generate permuted sequence of signals to be transmitted with optimum correlation. Methods: Random interleaving (RI) was the fundamental taxonomy and used to distinguish the different users in IDMA scheme. The logistic map based chaotic interleaving scheme is suggested for IDMA. The system is also combined with Minimum Mean Square Error (MMSE) equalizer to combat the effect of Inter Symbol Interference (ISI). Results: For the sake of simplicity, no pulse shaping is assumed at the transmitter and ISI channel is considered to be a fixed 3 tap channel. Simulations are performed in MATLAB. BPSK modulation is used. Furthermore, the results show that the IDMA with proposed logistic map based chaotic interleaver outperforms the traditional random interleaving scheme in terms of BER without the need of extra memory and computational complexity. Conclusion: The obtained results show the noticeable performance improvement of CI-IDMA with MMSE equalization in deep fading situations. Chaos based interleaver also offers other advantages such as less requirement of memory and small implementation complexity.

Performance Analysis of NLM Interleaving Scheme for CPM OFDM System

Performance Analysis of NLM Interleaving Scheme for CPM OFDM System

Evaluating Energy-Efficiency of DRAM Channel Interleaving Schemes for Multithreaded Programs

Evaluating Energy-Efficiency of DRAM Channel Interleaving Schemes for Multithreaded Programs

Efficient Data Transmission in LED-based Visible Light Communication Using Variable RGB Interleaving scheme

Efficient Data Transmission in LED-based Visible Light Communication Using Variable RGB Interleaving scheme

Role of Turbulences in WDM-Polarization Interleaving Scheme based Inter-Satellite Communication System

Inter-Satellite communication is the revolutionary technology used to transmit the signals between the satellites.This work is focused to carry out the investigation of turbulences in Inter-Satellite communication system by incorporating WDMPI interleaving scheme. A 6 x 20 Gbps channels are transported over Inter-Satellite link having span of 1000 km to realize the total transmission of 120 Gbps.The role of transmitter pointing errors and receiving pointing errors in the OWC link is investigated and results are reported in terms of SNR, total received power and eye diagrams.

Performance of the audio signals transmission over wireless networks with the channel interleaving considerations

This article studies a vital issue in wireless communications, which is the transmission of audio signals over wireless networks. It presents a novel interleaver scheme for protection against error bursts and reduction the packet loss of the audio signals. The proposed technique in the article is the chaotic interleaver; it is based on chaotic Baker map. It is used as a randomizing data tool to improve the quality of the audio over the mobile communications channels. A comparison study between the proposed chaotic interleaving scheme and the traditional block and convolutional interleaving schemes for audio transmission over uncorrelated and correlated fading channels is presented. The simulation results show the superiority of the proposed chaotic interleaving scheme over the traditional schemes. The simulation results also reveal that the proposed chaotic interleaver improves the quality of the received audio signal. It improves the amount of the throughput over the wireless link through the packet loss reduction.

A Chaotic Interleaving Scheme for the Continuous Phase Modulation Based Single-Carrier Frequency-Domain Equalization System

In this paper, we propose a chaotic interleaving scheme for the continuous phase modulation based single-carrier frequency-domain equalization (CPM-SC-FDE) system. Chaotic interleaving is used in this scheme to generate permuted versions from the sample sequences to be transmitted, with low correlation among their samples, and hence a better bit error rate (BER) performance can be obtained. The proposed CPM-SC-FDE system with chaotic interleaving combines the advantages of the frequency diversity, the low complexity, and the high power efficiency of the CPM-SC-FDE system and the performance improvements due to chaotic interleaving. The BER performance of the CPM-SC-FDE system with and without chaotic interleaving is evaluated by computer simulations. Also, a comparison between the proposed chaotic interleaving and the conventional block interleaving is performed. Simulation results show that, the proposed chaotic interleaving scheme can greatly improve the performance of the CPM-SC-FDE system. Furthermore, the results show that this scheme outperforms the conventional block interleaving scheme in the CPM-SC-FDE system. The results also show that, the proposed CPM-SC-FDE system with chaotic interleaving provides a good trade-off between system performance and bandwidth efficiency.

Optimal Interleaving Schemes for Two-Dimensional Arrays

Given an mtimesn array of k single random error correction (or erasure) codewords, each having length l such that mn=kl, we construct optimal interleaving schemes that provide the maximum burst error correction power such that an arbitrarily shaped error burst of size t can be corrected for the largest possible value of t. We show that for all such mtimesn arrays, the maximum possible interleaving distance, or equivalently, the largest value of t such that an arbitrary error burst of size up to t can be corrected, is bounded by lfloorradic2krfloor if kleslceil(min{m,n}) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /2rceil, and by min{m,n}+lfloor(k-lceil(min{m,n}) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2 </sup> /2rceil)/min{m,n}rfloor if kgeslceil(min{m,n}) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /2rceil. We generalize the cyclic shifting algorithm developed by the authors in a previous paper and construct, in several special cases, optimal interleaving arrays achieving these upper bounds. Additionally, for codewords of variable lengths, we solve a related array coloring problem for which the same upper bounds hold and can be achieved

Novel Mach-Zehnder interferometer structure for tunable optical interleaver

A novel optical interleaver scheme based on nested optical glass pairs is proposed. The assembly of pairs behaves as a cascaded Mach-Zehnder interferometer. The interleaver, with simple structure, low cost, and compact size, can be easily implemented with inexpensive material and mature preparation technology. Small channel spacing (50 GHz), high isolation (<–30 dB), a wide, flat passband and stop band (>2/11 period), and center-frequency tunability can be obtained simultaneously. An optimum design of a 50-GHz tunable interleaver based on this structure is given as an example. Its environmental temperature sensitivity and fabrication tolerance are also analyzed.

ACE With Frame Interleaving Scheme to Reduce Peak-to-Average Power Ratio in OFDM Systems

High peak-to-average power ratio (PAPR) is one of the major limitations to orthogonal frequency division multiplexing (OFDM) systems. In an OFDM system, as the frame size increases, the PAPR probability performance will get worse. The so-called active constellation extension (ACE) algorithm has been proposed to effectively reduce the PAPR especially when the number of sub-carriers is large. To achieve low PAPR with small number of sub-carriers, a novel scheme, ACE with frame interleaving, is proposed in this paper. In our proposal, M frames with N sub-carriers will be combined into one super frame, then ACE algorithm is applied to reduce the PAPR of the super frame, the super frame with lowered PAPR will finally be divided into M OFDM frames for the transmission. The combining and dividing process is equivalent to the time interleaving. The proposed scheme requires no side information and can significantly reduce PAPR while maintaining small number of sub-carriers.

Access latency reduction in contemporary dram memories

Performances of DRAM memories are characterized by memory latency and bandwidth. Contemporary DRAM memories more successfully satisfy demands for higher bandwidth than lower latency. In this paper solutions, which may reduce latency of these memories, are investigated. These solutions are two new controller policies called 'Write-miss Only Close-Page' and 'Write-miss Only Close-Page-Open previous Page' as well as several address remapping schemes. 'Write-miss Only Close-Page' policy is basically a combination of the policies 'Open-Page' and 'Close- Page-Autoprecharge'. For all DRAM reads 'Open-Page' policy is used. Also for all DRAM writes that cause row-buffer hits 'Open-Page' policy is used. For all DRAM writes that cause row-buffer misses 'Close- Page-Autoprecharge' policy is used. 'Write-miss Only Close-Page-Open previous Page' policy is the same as 'Writemiss Only Close-Page', except that after the precharge the previously open row is opened again. Simulations show improvements in using these combined policies. Permutation-based Page Interleaving scheme is known as an effective address remapping scheme for reducing row-buffer conflicts, which are consequence of conflict cache memory misses. This scheme is based on using xor circuits for changing bank indices of data blocks that fit into the same cache memory line set. We improve this scheme by proposing five similar schemes, with slightly better effectiveness. Three of the proposed schemes have approximately the same performances, but do not use xor circuits at all. Two of the proposed schemes use xor circuits but have slightly better performances.

Efficient Interleaving Schemes of Volume Holographic memory

Like the conventional digital storage systems, volume holographic memory can be deteriorated by burst errors due to its high-density storage characteristics. These burst errors are used byoptical defects such as scratches, dust particles, etc. and are two-dimensional in a data page. To deal with these errors, we introduce some concepts for describing them and propose efficient two- dimensional interleaving schemes. The schemes are two-dimensional lattices of an error-correction code word and have equilateral triangular and square structures. Using these structures, we can minimize the number of code words that are interleaved and improve the efficiency of the system. For large size burst errors, the efficient interleaving structure is an equilateral triangular lattice. However, for some small size burst errors, it is reduced to a square lattice.

Block and Codeword Interleaving Scheme for the High Density Digital Versatile Disc

The effect of noises from smaller dusts and scratches is higher than the conventional optical storage systems, e.g., compact disc(CD) or digital versatile disc(DVD) by the higher numerical aperture (NA=0.85) and thin cover layer (0.1 mm) of the high density DVD. Accordingly, new error correcting code (ECC) is needed to correct not only both short burst errors and random errors but also long burst errors. So, the interleaving scheme between two ECC blocks is considered to improve the error correction capability. In this paper, we will show our new block and codeword interleaving scheme (BCIS) and calculate the block error rate of BCIS after error correcting by probability method under the error model of Sony's burst error distribution and compare with the conventional reed-solomon product code(RSPC) of DVD.

Byte Merging Inter-Row Interleaving Scheme for the Error Control of High-Density Digital Versatile Disk

An efficient interleaving scheme, named byte merged inter-row interleaving (BMIRI) for an error correction code (ECC) block in the higher density digital versatile disk-random access memory (DVD-RAM) is presented. The error correction performance with the BMIRI has been investigated by computer simulations for various long burst and short burst errors. The results show that the BMIRI is effective for ECC block of higher density DVD-RAM.

Perfect Codes in the Lee Metric and the Packing of Polyominoes

Perfect Codes in the Lee Metric and the Packing of Polyominoes