Inductor Current Ripple Research Articles

A Novel Quick Response of RBCOT With VIC Ripple for Buck Converter

A novel quick response of ripple-based constant on-time with virtual inductor current ripple for Buck converter is proposed in this paper. The concept uses the capacitor and the resistor in a series to filter out the output voltage at load transient to dynamically change the width of on-time to prevent the Vout from dropping markedly. Finally, 12-V input voltage, 3.3-V output voltage, and 60-W output power with the novel quick response circuit for the IC of the proposed Buck converter are implemented to verify its viability and superiority.

Theoretical and experimental evaluation of four space‐vector modulations applied to quasi‐ Z ‐source inverters

There are three existing space-vector modulation (SVM) methods for three-phase Z-source/quasi-Z-source inverter (ZSI/qZSI), and a new one can be extended from the existing SVMs. These four SVMs are never compared and evaluated in terms of their performances. This study conducts the theoretical analysis and experimental evaluations of four SVMs. The switching control patterns, the available shoot-through duty ratio, the boost capability, the maximum voltage stress across the switch, inductor current ripple, total average switch device power, ac output current's harmonic and efficiency are fully addressed in the theoretical and experimental comparisons. A three-phase qZSI prototype is built to carry out the experimental evaluation. The valuable suggestions are summarised in the conclusion.

A 100 MHz Two-Phase Four-Segment DC-DC Converter With Light Load Efficiency Enhancement in 0.18/spl mu/m CMOS

This paper describes a high switching frequency CMOS DC-DC converter employing phase shedding/segmentation and resonant gate drivers to improve light load efficiency. A novel output inductor network with positively coupled inductors between segments and negatively coupled inductors between phases is adopted in two-phase four-segment interleaved topology to improve effective inductance and reduce inductor current ripple. To limit the contribution of the gate driver to the total converter loss under light and medium loads, a new combined high-side and low-side resonant type gate driver with partially shared inductor is presented. The DC-DC converter is implemented in 0.18 μm six-metal CMOS technology with 5 V power devices and occupies a total area of 2.55 mm × 3.0 mm. It converts 4 V input to 1 to 3 V output with peak 1.78 A current under 100 MHz switching frequency. The measured peak efficiency is 77.4% at 5.95 W output power and the tracking mode bandwidth can reach up to 8 MHz. With resonant gate drivers, 5% efficiency improvement can be reached at 1 V output. Furthermore, the converter is able to maintain peak efficiency as the output current varies from 0.1 A to 1.86 A.

Analytical Solution for Steady and Transient States of Buck DC–DC Converter in CCM

In this paper, a new method is proposed for mathematical modeling of buck dc–dc converter in continuous conduction mode. In this method, the differential equations of inductor current and capacitor voltage are firstly obtained. Then, using Laplace and Z transforms, the differential equations of inductor current and output voltage of converter are solved to obtain the relations of them. In the proposed method, the Laplace transform is used to determine the general equations of inductor current and output voltage and the Z-transform is used to determine their initial conditions. The transient and steady states responses of converter are analyzed using the obtained mathematical model. In addition, the effect of converter components on output voltage and inductor current ripples is investigated. The validity of proposed method is reconfirmed by experimental and simulation results using PSCAD/EMTDC software.

Analysis of an Interleaved Three-Level ZVS Converter With Series-Connected Transformers

This paper presents a new interleaved three-level soft-switching converter with series-connected transformers to achieve zero-voltage switching for all MOSFETs, less transformer secondary windings, and partial ripple current cancellation. Two circuit modules are adopted in the proposed circuit to share the load current and reduce the ripple currents at the input and output capacitors with the interleaved pulse-width modulation (PWM). In each circuit module, two three-level PWM circuits with the same MOSFETs are operated with the phase-shift by one-half of switching period to reduce the input ripple current. The voltage stress of all switches is clamped at Vin/2. The secondary windings of two transformers are connected in series to balance the primary side currents. The current doubler rectifiers are adopted on the secondary side to partially cancel output inductor ripple current. Experiments with a 1-kW prototype, verifying the effectiveness of the proposed converter, are described.

Analysis and Design of Coupled Inductors for Two-Phase Interleaved DC-DC Converters

Multiphase dc-dc converters are widely used in modern power electronics applications due to their advantages over single-phase converters. Such advantages include reduced current stress in both the switching devices and passive elements, reduced output current ripple, and so on. Although the output current ripple of a converter can be significantly reduced by virtue of the interleaving effect, the inductor current ripple cannot be reduced even with the interleaving PWM method. One way to solve this problem is to use a coupled inductor. However, care must be taken in designing the coupled inductor to maximize its performances. In this paper, a detailed analysis of a coupled inductor is conducted and the effect of a coupled inductor on current ripple reduction is investigated extensively. From this analysis, a UU core based coupled inductor structure is proposed to maximize the performance of the coupled inductor.

Input Differential-Mode EMI of CRM Boost PFC Converter

In this paper, the differential-mode (DM) electromagnetic interference (EMI) noise of a single-phase boost power factor correction converter operating in critical current mode was analyzed. The DM noise spectra are calculated based on the mathematical model of EMI receiver and the required corner frequencies of DM filter are obtained. It can be seen that the minimum corner frequencies are determined by the maximum noises at 150 kHz. With the relation between the magnitude of the inductor current ripple and the DM noise, the characteristics of noise at 150 kHz are obtained by analyzing the current ripple magnitude at 150 kHz; thus, the worst conditions which have the maximum noise value are figured out. Meanwhile, the maximum noises at 150 kHz for different input voltages are identical, so the DM filter can be designed based on one worst spectrum at one input voltage without testing the spectra in other conditions.

A Digital Peak Current-Mode Control PFC with Bifurcation Control

A boost power factor correction (PFC) in continuous conduction mode (CCM) by the digital peak current-mode control method with bifurcation control is discussed in this paper. The proposed method is used to prevent the inductor current bifurcation behavior, which is caused by sub-harmonic oscillation when the duty cycle is upon to 50 percent. The bifurcation behavior will increase the inductor current ripple and dissipation, then reduce the Power Factor (PF). Different from the ramp compensation signal performed with analog IC in some papers, a MCU is used to be the controller and also provides the digital compensation function in this paper. With the timer, ADC, PWM, and comparator which are built in the MCU, the necessary parameters will be measured without extra components and additional cost. The proposed method is based on those parameters. In this paper, the MATLAB/Simulink simulation results show the proposed method workable.

The isolated buck boost dc to dc converter with high efficiency for higher input voltages

An isolated buck–boost dc/dc converter for wide input-voltage range is proposed in this paper, and the fullbridge (FB) boost converter, being one of the typical topologies, is analyzed. Due to the existence of the resonant inductor (including the leakage inductor), the FB-boost converter can only adopt the two-edgemodulation (TEM) scheme with the FB cell being leading-edge modulated and the boost cell being trailing-edge modulated to minimize the inductor current ripple over the inputvoltage range, and a phase-shift-controlscheme-based TEM with the use of the market available controller IC such as UC3895 is proposed, which realizes phase-shifted control for the FB cell to achieve zero-voltage switching. In order to improve the reliability and efficiency of the FB-boost converter, a three-mode dual-frequency control scheme is proposed, in which the FBboost converter operates in boost, FB-boost and FB modes in low, medium and high input voltage regions, respectively, and for which the expression of the inductor current ripple is derived in this paper. As the input voltage in the FB-boost mode is close to the output voltage, the inductor current ripple in this mode is much smaller than that in the other modes, and the switching frequency of the boost cell in this mode can be lowered to one-(2N+1)th of the preset switching frequency to reduce the switching loss, and hence, to improve the efficiency. A 250–500 V input, 360 V output, and 6 kW rated power prototype is fabricated to verify the effectiveness of the design and control method. The average efficiency over the input-voltage range is 96.5%, and the highest efficiency attained is 97.2%. Key wordsbuck, boost,, buck-boost, Isolated buck–boost converter ,full-bridge boost converter, inductor current ripple,pulse width modulation(PWM), two-edge modulation (TEM),hysteresis modulation .

Non-Sinusoidal Injection Control Strategy of Z-Source Inverter

The modulation strategy of injecting non-sinusoidal into reference voltage is presented in this paper. Z-source inductor current ripple and the relationship of voltage gain versus modulation index are analyzed in detail. Compared to simple boost control, the non-sinusoidal injection modulation strategy can obviously decreased the switching times, thus switching loss is cut down, and the voltage stress and Z-source inductor current ripple are obviously reduced. Theoretical analysis, simulation and experimental results are presented to demonstrate the features of the control.

DM EMI Noise Prediction for Constant On-Time, Critical Mode Power Factor Correction Converters

Critical conduction mode (CRM) power factor correction (PFC) converters are widely used in industries. For CRM PFC converters, high inductor current ripples generate high differential mode (DM) electromagnetic interference (EMI) noise, which calls for big EMI filters. On the other hand, the switching frequency varies during a half line cycle. The characteristics of the EMI in CRM PFC converters have not been carefully investigated and the worst case DM EMI noise has not been identified. The design of an EMI filter is difficult. In this paper, a mathematical model based on the principle of quasi-peak noise detection is proposed to predict the EMI noise in CRM PFC converters. The developed model is verified by experimental results. Based on this model, the worst case DM EMI noise can be predicted. This will greatly help in the design of EMI filters for CRM PFC converters.

A New Single-Phase Single-Stage Three-Level Power Factor Correction AC–DC Converter

In this paper, a new three-level single-stage power-factor-corrected ac/dc converter is presented. The proposed circuit integrates the operation of a boost power factor correction converter and a three-level dc/dc converter into one converter. It does not have the problem of high component stress due to high rising intermediate bus voltages at light load conditions that other single-stage converters have because of its three-level structure. It can operate over a wider load range with significantly less output inductor current ripple; moreover, its input current has little distortion. In the paper, the operation of the new converter is explained in detail and analyzed, its steady-state characteristics are determined, and its design is discussed. Experimental results obtained from a prototype are presented to confirm the feasibility of the new converter.

MATLAB-Based Investigation of Multiphase Interleaved Buck-Boost Converter for PV System

A photovoltaic (PV) generator exhibits nonlinear voltage-current characteristics and its maximum power point varies with solar radiation. Analytical investigations of the new family of switching converters based on a parallel connection of (=4) identical buck-boost converters employed in PV system are presented. The interleaving strategy ensures that all the converters operate at the same switching frequency. Mathematical models developed using the state-space average technique are presented in this paper. Various steady-state performance expressions are also derived. The present converter system has the advantages of reduced size of the converter, and ripple in the total inductor current. The effectiveness of the four-phase interleaved dc-dc converter combined with PV system is demonstrated through simulations carried out in MATLAB environment.

A Soft Switching Three-phase Current-fed Bidirectional DC-DC Converter With High Efficiency Over a Wide Input Voltage Range

In this paper, a three-phase current-fed dual-active-bridge (DAB) bidirectional DC-DC converter is presented. Compared to the voltage source DAB converter, the proposed converter allows low RMS current and maintains zero voltage switching (ZVS) in the whole operating range by keeping the ratio between primary side and secondary side DC-link voltage constant, leading to high efficient energy conversion over a wide input voltage range. In addition, the ZVS conditions can be maintained using small DC inductors and the input current ripple still remains small because of high DC inductor current ripples being alleviated by three-phase interleaving structure. Furthermore, the proposed topology with Y-Y connected transformers is proven to have better current sharing capability compared with other three-phase topologies with different transformer connections. The operation mode analysis, soft switching conditions, and hardware design guidelines are derived in this paper. A 6-kW hardware prototype with input voltage range of 24~48 V and rated 288 V output voltage is developed and tested in the laboratory. The experimental results verified that the proposed converter could maintain high efficiency over a wide input voltage and power range.

Analysis, Design, and Implementation of Hysteresis Modulation Sliding-mode Controller for Negative-output Elementary Boost Converter

This article presents the analysis, design, and output voltage regulation of a negative-output elementary boost converter operated in the continuous conduction mode using a hysteresis modulation sliding-mode controller for applications requiring the constant power source in medical equipment, telecom, industrial, and military/aerospace telemetry applications. The negative-output elementary boost converter is a new series of attractive DC-DC converters possessing high-voltage transfer gain, high power density, high efficiency, and reduced output voltage and inductor current ripples. Due to the time-varying and switching properties of the negative-output elementary boost converter, its dynamic characteristic becomes highly non-linear. In order to improve the dynamics performance and output voltage regulation of the negative-output elementary boost converter, a hysteresis modulation sliding-mode controller is developed. The hysteresis modulation sliding-mode controller is designed for the inherently variable structure of the negative-output elementary boost converter by using a state-space average based model. The three conditions of the hysteresis modulation sliding-mode controller for the negative-output elementary boost converter—the existence, hitting, and stability conditions—are analyzed. The performance of the developed controller is validated for its robustness to perform over a wide range of operating conditions through both the laboratory prototype and MATLAB/Simulink (The MathWorks, Natick, Massachusetts, USA) models, which are compared with a proportional-integral controller. Theoretical analysis, simulation, and experimental results are presented along with the complete design procedure.

Multicarrier Interleaved PWM Strategies for a Five-Level NPC Inverter Using a Three-Phase Coupled Inductor

Multicarrier interleaved pulsewidth modulation (PWM) techniques are presented for a five-level neutral point clamped inverter using a three-phase coupled inductor. The inverter operation is demonstrated using a simple multicarrier interleaved PWM algorithm. Since both the inverter and inductor power losses are closely linked to the magnitude of the inductor current ripple, improved multilevel interleaved PWM techniques are presented based upon the concept of interchangeability of switching states in each phase. The proposed PWM techniques, which are easier to implement when compared to multilevel space-vector PWM techniques, also exploit the use of switching states with a high-effective winding inductance to minimize the inductor current ripple. Simulation results are presented to illustrate the improvements obtained in the inverter waveforms and their harmonic spectrum. Experimental results demonstrate how the inductor current ripple and the related power losses are significantly reduced using the proposed PWM scheme.

Isolated Buck–Boost DC/DC Converters Suitable for Wide Input-Voltage Range

A family of isolated buck-boost dc/dc converter for wide input-voltage range is proposed in this paper, and the full-bridge (FB) boost converter, being one of the typical topologies, is analyzed. Due to the existence of the resonant inductor (including the leakage inductor), the FB-boost converter can only adopt the two-edge-modulation (TEM) scheme with the FB cell being leading-edge modulated and the boost cell being trailing-edge modulated to minimize the inductor current ripple over the input-voltage range, and a phase-shift-control-scheme-based TEM with the use of the market available controller IC such as UC3895 is proposed, which realizes phase-shifted control for the FB cell to achieve zero-voltage switching. In order to improve the reliability and efficiency of the FB-boost converter, a three-mode dual-frequency control scheme is proposed, in which the FB-boost converter operates in boost, FB-boost and FB modes in low, medium and high input voltage regions, respectively, and for which the expression of the inductor current ripple is derived in this paper. As the input voltage in the FB-boost mode is close to the output voltage, the inductor current ripple in this mode is much smaller than that in the other modes, and the switching frequency of the boost cell in this mode can be lowered to one-(2N+1)th of the preset switching frequency to reduce the switching loss, and hence, to improve the efficiency. A 250-500 V input, 360 V output, and 6 kW rated power prototype is fabricated to verify the effectiveness of the design and control method. The average efficiency over the input-voltage range is 96.5%, and the highest efficiency attained is 97.2%.

Single-Switch Buck Converter with a Ripple-Free Inductor Current

This paper presents a single-switch buck converter with a ripple-free inductor current. In the proposed converter, the filter inductor current ripple is completely removed by utilizing an auxiliary circuit consisting of an additional winding of the filter inductor, an auxiliary inductor, and an auxiliary capacitor. Moreover, the ripple-free current characteristic is maintained under both light load and full load conditions. The theoretical analysis and performance of the proposed converter were verified with a 110W experimental prototype operating at a 107 kHz switching frequency.

Experimental Study of the Shoot-Through Boost Control Methods for the Z-Source Inverter

This paper presents a simulation and experimental comparative analysis of the Z-source inverter (ZSI) with four different shoot-through (ST) control methods, namely: the simple boost control, the maximum boost control, the maximum constant boost control and the modified space vector modulation boost control methods. A review of these methods is presented with a summary of all expressions. A prototype of a 30 kW ZSI is designed and implemented. The eZdsp™ F2808 evaluation board is used for the realization of the shoot-through control methods and the real time workshop (RTW) is used for automatic code generation. The paper compares between the different four shoot-through control methods in terms of: the line voltage harmonic, the phase current harmonic, the d.c. link voltage ripples, the switch voltage stress, the inductor current ripples, the obtainable a.c.output phase voltage and the overall efficiency with detailed simulation and experimental results. In addition, the paper presents the effect of varying the d.c. input voltage and the shoot-through duty ratio on the overall inverter efficiency.The maximum constant shoot-through boost control method seems to be the most suitable shoot-through control method for the ZSI. Also, it is shown that the efficiency of the ZSI improves with increasing the d.c. input voltage and degrades with increasing the shoot-through duty ratio.

A Two-Phase Switching Hybrid Supply Modulator for RF Power Amplifiers With 9% Efficiency Improvement

A hybrid supply modulator consisting of a parallel operation of a high-drive, low output impedance, wideband class-AB linear amplifier and a high-efficiency, wideband, low-ripple switching amplifier is presented for the application of polar transmitters. At system level, a two-phase switching is employed to lower the inductor current ripple so that both the output ripple and power loss are reduced. On-chip feed-forward bandpass filter is used to extend the tracking bandwidth of the switching amplifier, without hurting the stability of parallel control loop or the need to increase switching frequency. At circuit level, the output impedance of the linear amplifier is lowered by optimizing the design of super source-follower output stage. Inductor current sharing and two-phase ramp generator are implemented for realizing the two-phase switching scheme. Fabricated in a 0.35-μm CMOS process, the prototype chip measures 9 % static efficiency improvement over the conventional single-phase switching design in the back-off power level. Dynamic efficiency is enhanced by 8-12% by enabling the bandpass filter. Successful tracking of a 4 MHz 0.4-2.8 V full-wave rectified sine wave and a WCDMA envelope signal is demonstrated.